Professional Documents
Culture Documents
phosphorus
U3610
ﺣﺳﺎس اﻟﺑوﺻﻠﮫ
FD0407
FD0403
FL4307
FL4305
FL4306
R4309
R4308
C4307
C4306
C4309
C4308
C4305
PP0543 PP0544
J4300
PP0545
C04010 R3041
C3041
C0407
J4000
C4093 C3042
J3900
ﻛوﻧﯾﻛﺗور ﻣﻔﺗﺎح اﻟﺑﺎور واﻟﺻوت واﻟﻔﻼش C0412
RM4100
C4026 R3042
FL4330
R4330
FL4303
C4304
DZ4312
DZ4313
R4311
DZ4311
DZ4310
R4310
C4302
C4300
C4330
R4312
R4313
C4312
C4313
FL4301
FL4003
C4301
C4311 C4303
XW4300 FL3009
C4028 FL4220
C4001
C4000
C4040
C4061
C4007
DZ4280
C4010
C4096
C4008
FL4200
C4094
R4232
C4285
C4201
C4041
R4234
FL4280
FL4274
FL4271
R4240
C4240
C4200
C4284
C4270
R4288
C4274
C4271
R4287
R4230
C4232
R4273
C4234
C4287
C4288
R4270
C4273
C4230
C4220
C4221
J4200
R4000
R4001
FL4095
XW4200
FL4282
C0418
C0421 DZ4282
C0420
FL4250
FL4260
C4250 C4261 R3011
C4262
C4242
R4275
R4242
C4286
C4251
C4211
C4210
C4272
C4275
C4236
R4236
R4272
C3709 FL4210 C3715
TP0513 TP7505_S FD0404
NFC_S
C7504_S
C3720 C3721 C3722 R3802 ﻣزود طﺎﻗﮫ ال C7500_S C7516_S
Q7501_S
NFC
NFC_DCDC_S C7518_S
U3700
C3795
R7502_S C7513_S
C3790
L7502_S C7515_S
C3710 L3700 Q7502_S
C7505_S C7531_S
C3711 Camera PMU C3791
C7517_S
L7501_S
C7530_S
C3702 R3801 C7533_S
C3718 T7500_S
C3700 C7506_S C7532_S
C3719 L2710 C7526_S
C1133
C1132
R1862
L5000 C1830
PP0520
R1863
U1000
C1852
XW2800
C2744
C1832
C1812
C2780
R1871
C1851
PP0501
R1241
L2780
PP0504
R1242
R0611
R1240
R1202
PP0500 R0612
R1201
R1221
R1462
R1222
R1231
R0623
L2810 R1232
R1431
R1400
R1430
R1121
R0622
R1101
R1130
R0621
R1100
R1861
C2770
L2770 C1833
R1860
R1464
R0620
R2980
C3115
PP31_E
PP0525
R1461
FL1092
R607_E
R16 0 1
R1 000
R1480
R1460
R3061 C6332
C1198
R1194
R1150
R1602
C1194
C1193
C1092
C1122
R1470
R0610
C1123
R1621
R1622
R1623
R1620
R4800
R3044
C1850
C1120
C2740
C3044
C1121
XW2740
C2742
XW2750
C511_E C503_E
C516_E C504_E C524_E C505_E C512_E C509_E
U_MDM_E
PP25_E C2741
PP24_E PP29_E PP27_E
PP26_E PP28_E P601_E C2745 C2724
L2720
R714_E
R801_E
R702_E
R701_E
R715_E
PP22_E L2740
ﻣﻌﺎﻟﺞ اﻟﺷﺑﻛﮫ
C701_E
PP35_E
U_EEPROM_E
PP20_E
C507_E
P501_E
L2750
U6100 C510_E
L304_E L301_E
اﻟﺑﯾﺳﺑﺎﻧد
C6100 C508_E
C515_E
C2751 C2750
XW302_E
E
2_
XW404_E
XW
R 202_E
L303_E
C5 0 1 _ E
C321_E
C552_E
XW305_E Y401_E
C325_E
C514_E
C528_E C326_E
L6100
XW1_E
C517_E
C401_E
XW3_E
C6110
C6111
XW6110 L302_E L305_E
C324_E R413_E
C6112 XW303_E
R6116
C319_E
C502_E R602_E C6302 R601_E C506_E R603_E R717_E R716_E C534_E R605_E
PP23_E
PP6300 PP0562
J204_E
PP0560
XW5990
PP41_E
BS0405
R811_E PP40_E FD0406
R812_E
TP0505
SH0403
M5500
TP0504
C3511
J3500 PA_LB_E
ﻛوﻧﯾﻛﺗور اﻟﺷﺣن اﻟﻼﺳﻠﻛﻰ
800&850&900 MHZ
C3501
TP0524
TP0502
TP0523
TP0503
USB ﻛوﻧﯾﻛﺗور اﻟﺷﺣن واﻟﻣﺎﯾك واﻟﺟرس والJ6400
PA_HB_E
C6488
C6452
FL6482
C6482
C6450
C6438
C6454
C6440
FL6464
ﻣﺿﺎﻋف اﻟطﺎﻗﮫ ﻟﺗرددات اﻟﻣرﺗﻔﻌﮫ
3G
C6464
C6456
C6460
FL6460
C6466
C6462
FL6462
C6444
C6442
R6410
C6410
R6436
C4910
C6436
R6434
C3111
C6411 C6434
C3310
C6432 XW3370
C6471 R6424 C3313
C6424
DZ3300 C3390 C5130
C3312
C6470 R6422
C6422
C6420 C6421 R3311
C3325
C3302
TP0521
C6480
U_QET_E
ﻣزود اﻟطﺎﻗﮫ ﻟﻣﺿﺎﻋف طﺎﻗﮫ اﻟﺗرددات اﻟﻣﻧﺧﻔﺿﮫ
PA_UHB_E
C3303
C6489
TP0527
C6491C6492C6490
2G&4G
TP0541
C6493 R5753 C6494
C3201 R3201
TP0515
DZ3200
R3202 Q3200 Q3201
C3202
J3200
DZ3201 R5755
C3351
C5788
C3352
J5700 FL5774
C5774
XW3200
R5756
R5785 FL5766
C5756
C5766
C5785
FL5776 FL5778
C5776 C5778
C3292
FL5770
R5768
FL5764
C5770
C5764
C5768
R5754 C5705 C5811 FL5705 TP0525 TP0500 TP0531 TP0533
ﻛوﻧﯾﻛﺗور اﻟﺷﺎﺷﮫ واﻟﺗﺎﺗش
R5772
C5772
C5754 FL5700 FL5810
TP0520 TP0516 C5762 C5706
FL5762
C5752 C5700 C5810 TP0501 ZT0408
C5701
FL5864
C5751
ﻛوﻧﯾﻛﺗور اﻟﺑﺻﻣﮫ واﻟﮭومJ5800
FL5752
C5750 L5750
C5725 C5760 L5760 C5864 C5803
C5802
ﻛوﻧﯾﻛﺗور اﻟﮭواﺋﻲ
C5710
C5715 C5854 FL5800
R5848
C5862 L5750 R5852 C5800
FL5710
C5741 C5852
R5846 C5801
C5745 C5848 C5820
L5754 C5846
R5843 FL5820
L5751
R5842 C5860
C5744
C5842 C5863
C5746 FL5840
TP0530 C5840
C5779
FD0405 TP0532
L5752 R5841FL5850 R5786
TP0535 C5850 C5786
C5742 C5844 C5787
R5844
C5896 C5881
TP0534 L5733 R5880
U5890 XW5890
BS0406 C5743
C5880
PP5700
FD0500 PP5800
JUAT1_EF
C7751_EF
R7753_EF
C7752_EF
R2002_E
C2102_E
R7751_EF
C2001_E
C7753_ER F7752_EC F7754_EF
R2103_E
FLQPLX_E
LNA_GPS_E
FL2002_EF
JU
AT
2_
EF
L2011_E
C2101_E
L7752_EF
R1615_E L1607_E L7753_EF R1610_E L1604_E EF
51_
L77
C2002_E
L1608_E
R1613_E L7750_EF
L2109_E
DSM_HB_E
R1506_E L1504_E
C0402
R1508_E FL1501_E R1611_E
L1503_E FL1601_E
L1605_E ﻣﻐﺗﺎح ھواﺋﻲ اﻟﺗردد اﻟﻌﺎﻟﻰ L1606_E
R1612_E
DSM_LB_E
L2102_E R2102_E R1617_E
C1604_E
FD0402 FD0412
L1502_E C1504_E
FL2101_E
C1603_E
R1507_E
C0401
R2101_E
L2101_E
R1609_E
C1602_E
R1608_E C0403
C3990
C3950
C3931
C3930
C3940
C3951
C3941
C1601_E
C3992
C3991
R3901
C4091
C3993 C3928
R4005
C4006
C4092
FL6701_EF FL6702_EF
L1603_E
R1600_E
R1601_E
L1601_E
R1603_E
R1602_E
L1602_E
R1607_E
FL6700_EF FL6703_EF
C6701_EF C6705_EF
C6702_EF C6703_EF
R3900 C3925
W2XSW_W
C4324
C0404
C0413
C0414
FD0411
PP0580
C4051
C4030
C4050
C7716_W FD0409 PP0582
C4031
FL3901 C3909
C4192
C4196
C4195
C4191
C4190
C4197
C7608_W
C3926
PP0581 C4320
C4326
C7607_W
C0415
C0416
C3995
C3901
FL3995
C3906
C3900
C3908
C3961
C3994
L2103_E R1501_E L1501_E
R3905
C3996
C4310
R3908
C3907
R7720_W PP0583 C0405
WLAN_W
C3960 R3907 L7704_W C7708_W
PP7614_W
L7700_W
C0406
PP7615_W MCEW_EF
L7701_W
PP7619_W
W2BPF_W
PP7613_W
PP7601_W PP7625_WPP7618_WC7606_W
C7701_W L7703_W R7702_W C7709_W
PP7606_W
W25DI_W
C7609_W
PP7611_W
W5BPF_W
R7701_W C7703_W
PP7608_W
WiFi
PP7604_W
PP7603_W
C7711_W
PP7605_W
R7711_W
PP7600_W C7702_W
R7700_W
PP7607_W
PP7609_W
C7700_W
PP7624_W
PP7621_W
PP7620_W
PP7622_W
PP33_E PP7610_W PP0595
SH0400
PP7623_W PP7617_W
C7600_W
C7601_W
C3615
C3616
R3615
R7600_W R1300
R3616
C5000
C5791
PP7616_W
C7603_W
C5001
C5749
C5790
PP0523 C7502_S C5011
C2710
C1843 C1301 C1731
C5019 C5012
R1420
C3703 C5025
U5000
ﻣ
R1421
L2712
C7604_W
ﻛﺑر
C5018
L 2711
R1212
ا
L7600_W
ﺷﺎر
R1211 C5006
C2716
R5004
ه اﻟ
C2800
R5001
TP0504 C5008
C2713
ﺟر
C1296
سا
C1393 C1394 C1290
C5024
L2800 C1396
ﻟﻌﻠ
C1738
C1291
C1741 C2714 C1737 C1739
C2802
C2712
وى
C2715
C1736 C5026
C1721 C1782
TP0510
C5015
C2791 C5029
C2731 C5027
C1734
C1781
C1720
C1860
C1723
C5016
C2730
C5028
C1740
C1735
C1730
C2711
TP0529
L2790
C2790
C2792
L2730
C2782
C2781
C1810
C1760
C1805
R3071
C1813 PP0516 PP0514 PP0513 C3112
C1762
C1802 C1395
C1761
PP0515 C2911
C2752 C2810
C1390
C3070
C1391
C2720
C2812
C2811
C1764
C2813
C2853
C2732
C1861
C1793
C1794
C1791
C1792
C2862
C2859
C2868
C1804
C3071
C2858
C1392
U2700
C2866
L2811
C2771
C1842
C2863
C1703
C1710
C1707
C1773
C1711
C2701
C1772
C1722 C2703
C1763 C1713 TP0528
C2906 PP0522
C2723 C1801
C2801
C2970
C2702
C1880
C1881
C1880
C1691
C1862 C1803
C1095
C2872
C2907 C1090
C1199
L2703
C3030 C3190 C2704
C2901
C1690
C1750
C4811
C2852
U3100
C2981 C4805 C1841 C1831
C3020 R3009
PP0524
BOOST
C2971
C1853
C2990
C3110
R3010
R3020
C3010
C3113
C3111
C3114
C1870
C2864 ﻣﺣول اﻟطﺎﻗﮫ اﻟرﺋﺳﻲ
C2915
PP0521
C2760 C2876 C2860 C2857 C2856 C1093 C2855 C2874 C2903 R1198
C4814
C2722
Y1000
U4700
C4801
L2721 R1011 C1010
24M
L2760 C2721 ﻛرﯾﺳﺗﺎﻟﮫ ﺑﺎور اﻟﻣﻌﺎﻟﺞ
C2992
R1010 C1011
C2762 R1465
C4813
ﻣﻌﺎﻟﺞ اﻟﺻوت C4804
L2741 PP32_E R4801
R713_E
C2743 C2850
C2910
R4802
R3000
32.768KHz
C1191
C2761 R4830
R422_E R415_E R418_E R403_E
C549_E
C537_E
C545_E
Y3000
C543_E
C3000
C14_E
C4803
R410_E
C303_E C307_E
C316_E C315_E
C548_E C4815
C317_E
R604_E
R409_E
U_PMIC_E
C553_E
C323_E
C302_E C313_E
C539_E
C533_E
C520_E
C4802
R404_E
C526_E
C542_E
R4701
C554_E
C555_E
C4701
C4820
C4700
R4700
C4812
C546_E
C318_E C4809
C314_E
C2913
C4817
C4824
C322_E
R402_E
C6303
C525_E
C305_E
C550_E
R430_E
R431_E
C404_E
C544_E C547_E
C551_E
C522_E
U3600
C540_E
PP21_E
C3601
R417_E
R416_E
R6200 R3601
C6211
C536_E
PP34_E
U6200
C402_E
C309_E
C530_E
C513_E
C541_E
C527_E
C556_E
C320_E
C327_E
PP2_E USB
C6290
C306_E
C1102
C1100
C1101
C6200
R6210
C1103
R1441
C5870
R1440
R3332
R3062
R4710
R5600
U1602 C5872
R201_E
R407_E
C407_E
R408_E
PP0535
PP0130
PP48_E
PP47_E
PP51_E
PP52_E
C2609 C2636 C2620 C2618 C2611 R2600 R2604PP0563C2617 C2610 R0600 R0601
C2650
NAND U2600
C2616
اﻟزاﻛره اﻟرﺋﯾﺳﯾﮫ
C2647
C2602
C2613
C2643
C2627 C2635
C2630
C2615
C2646
C2632
C2628
MCNS_EF
DZ203_E
C2614
C3_E
C2640
C3370
R3370
C2642
C2606
C2612
C2603
C2623
C2629
C2644
C2641
C2626
R3330
C2605
C2601 R3331
C2645 R2601
ACC
C2622
C2621
U5900
C5902
R5903
C5900
R5901
C2619
R5902
C2649 C2651 C2631 DZ202_E PP0564 R1450 R1451 C2652 C2634 R6300 C6300 DZ5900
C203_E
FD0410
L6301
L6300
C6331
FD0408
C6335
C6321
U6300
C6322
C6333
C6330
C5125
ﻣﻧظم ﻋﻣل اﻟﺷﺣن وال C6312
USB
R3460
C6334
C6311
C3465 C3462 C3464 C3463 C3466 C3461
PP0550
C6390
C6395
C6391
R3450
C6336
D3403
D3402
C3403 C3402
C3454
D3401
C1105_E
D3400
R301_E R1105_E
C3455
C1115_E C1114_E C1112_E R6912_EF C3407 C3406
C1102_E
L2104_E
R1107_E
L2106_E
C3451
GPOLAT_EF
C6916_EF
FL2102_E
C1111_E C804_E
R920_E
C6917_EF C3411
R922_E
U3400
C1109_E
C1104_E
C816_E
R2105_E L2105_E C3410
FL6902_EF
C3452
C805_E
R1206_E
C1208_E
C1107_E
C810_E
C817_E
R806_E
C827_E C3404
R810_E
C824_E
C812_E
C820_E C6914_EF
و
C3414
ها
C1110_E C3510
ﻟ
ﺷﺣ
C822_E C3413
C3415 C3425
U_WTR_E
نا
C808_E
C1308_E
ﻟﻼ
ﻣ
C3416
ﺳﻠ
R3423
R3430
ﻌﺎﻟ
C2107_E
C3424
ﺷﺎر
R3424
C6430
C826_E
C3421
C3417
C3420
ها
C1207_E PP3404
FL6430
C806_E
PP3433PP0305
ﻻر
R1205_E
C1103_E
FL6452
ﺳﺎل
C4927
R1101_E C4928 C4903 FL6450
U4900
C4930
FL6454
واﻻ
C1202_E
C815_E FL6438
C818_E
C4904
ﻣﻛﺑ
ﺳﺗﻘ
C821_E FL6440
را
C4922
ﺑﺎل
C825_E
C801_E
C4931
ره
C5127
C4934
C819_E R6466
اﻟ
ﺟر
FL6432
س
R1302_E
C4907 C6416
C1307_E
R3043 FL6442
C5134
اﻟ
ﺳﻔ
FL6444
C1204_E
R1201_E
C823_E
C3043
C1200_E
C809_E
R808_E
C803_E
PP53_E
C811_E
C802_E
ﻠﻰ
C6415
PP54_E
U3300
R3350
C3316 C3320
و
C3327
C3318
ﺣد
L1103_E C3315
C1810_E
C1212_E
R1209_E
C1206_E R1211_E
ها
C3317
R1108_E
L1101_E
R1104_E
C3326
ﻟﺷ
R1810_E
C1805_E
C1804_E
L1
C3301
ﺣن
E
10
C3305
5_
2_
R1203_E
81
C1205_E
R1
C1801_E
R1202_E
CPL2_E
R1210_E
C1209_E
اﻻ
C3306
FL6411
R1812_E
C1802_E
Q3350
ﺳﺎ
CPL2G_E
C1211_E
R1207_E
C3340
ﺳﯾﮫ
R901_E
ﻣوﺳﻔت اﻟﺷﺣن
ﻛوﺑﻠر اﻟﺷﺑﻛﮫ
C3360
L1302_E
R1808_E
C1318_E R1305_E C3353 C3341 C3342 C3343
R6420
C3294
C3350
C5126
R1806_E
R1807_E
R1300_E R6419
C5135
C1811_E
R1803_E C1312_E
U5100
C5129 C5142
R1802_E C5128
C1808_E
L5100
L1301_E
C1807_E
ﻣﻛﺑ
FLTRI_E
C5136
را
L1310_E
C1317_E
C4925
ره
R1307_E
C1321_E R1306_E
اﻟ
R5108
ﺟر
C1319_E C5131
C1311_E
C1001_E C4926
س
C1320_E
R1001_E C1000_E C1316_E
L1901_E
R1903_E
C1305_E
C1301_E
C1323_E C1302_E
R1006_E
C1001_E
C1306_E C1901_E
R1006_E
C7712_W
C5612 C5614
C5665
C5653
C5662
C5664
C5615
C5613
C5610
C5655
C5651
C5654
L7705_W
L5610
U5610 C5652
C7713_W
ﻣﺣول طﺎﻗﮫ اﻟﺑﺻﻣﮫ
C5721
FL5720
C5611
D5661
U5660 U5650
C5660
L5651
داﯾود اﻻﺿﺎءه
D5650
دراﯾﻔر اﻻﺿﺎءه
دراﯾﻔر اﻻﺿﺎءه
C5603
C5604
C5650
D5651
U5600
FL5860 FL5715
C5716
PP0590 C5731
C5606
در
C5730
73
اﯾﻔ
R5
L5600
ر
C5608
ﺑﯾ
C5732
ﺎﻧﺎ
تا
C5734
C5607
ﻟ
ﺷﺎ
R5787 C5733
ﺷﮫ
C5735
C5895 C5602 C5703 C5702
R5735
8 7 6 5 4 3 2 1
CK
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD
REV ECN DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. DATE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
10 0008927012 ENGINEERING RELEASED 2017-06-06
PAGE CSA CONTENTS SYNC DATE PAGE CSA CONTENTS SYNC DATE
1 1 TABLE OF CONTENTS sync 06/19/2016 46 62 I/O: USB PD sync 04/14/2017
2 2 SYSTEM: BOM TABLES (1/2) sync 02/24/2017 47 63 I/O: Hydra sync 04/14/2017
3 3 SYSTEM: BOM TABLES (2/2) test_mlb 03/17/2017 48 64 I/O: B2B DOCK sync 10/10/2016
4 4 SYSTEM:MECH COMPONENTS sync 04/14/2017 49 65 SYSTEM: I2C MAP sync 04/14/2017
5 5 SYSTEM: Testpoints sync 04/14/2017 50 80 RADIOS D21_MLB_DOE 07/18/2016
6 6 BOOTSTRAPPING sync 09/19/2016 51 1 page1
7 10 SOC: JTAG,USB,XTAL sync 04/14/2017 52 75 NFC
8 11 SOC: PCIE sync 04/14/2017 53 1 FRONT PAGE
9 12 SOC: MIPI + ISP sync 04/14/2017 54 2 HIERARCHY
10 13 SOC: LPDP sync 04/14/2017 55 3 PMIC: BUCKS & LDOS
11 14 SOC: SERIAL + SMC sync 04/14/2017 56 4 PMIC: CLOCKS & CONTROL
12 15 SOC: GPIO + UART sync 04/14/2017 57 5 BB: POWER
13 16 SOC: AOP sync 04/14/2017 58 6 BB: CONTROL & HS PERIPHERALS [6]
14 17 SOC: Power (1/3) sync 04/14/2017 59 7 BB: GPIOS & QLINK
15 18 SOC: Power (2/3) sync 04/14/2017 60 8 XCVR
C 16 19 SOC: Power (3/3) sync 04/14/2017 61 9 XCVR C
17 26 NAND sync 04/14/2017 62 10 QPOET MODULE
18 27 SYSTEM POWER: PMU Bucks (1/4) sync 04/14/2017 63 11 LB PAD
19 28 SYSTEM POWER: PMU Bucks (2/4) sync 04/14/2017 64 12 HB PAD
20 29 SYSTEM POWER: PMU LDOs (3/4) sync 04/14/2017 65 13 UHB PAD
21 30 SYSTEM POWER: PMU (4/4) sync 04/14/2017 66 14 2G PA
22 31 SYSTEM POWER: Boost sync 04/14/2017 67 15 LB DSM
23 32 SYSTEM POWER: B2B Battery sync 04/14/2017 68 16 HB DSM
24 33 SYSTEM POWER: Charger sync 04/14/2017 69 17 COUPLER2
25 34 SYSTEM POWER: Iktara sync 04/14/2017 70 18 LOWER ANTENNA
26 35 SYSTEM POWER: B2B Cyclone sync 04/14/2017 71 19 UPPER ANTENNA
27 36 SENSORS sync 04/14/2017 72 20 GNSS
28 37 CAMERA: PMU (1/2) sync 04/14/2017 73 21 SIM, DEBUG CONN
29 38 CAMERA: PMU (2/2) sync 04/14/2017 74 22 TEST POINTS PROBE POINTS 07/18/2016
30 39 CAMERA: B2B Wide (KY) sync 04/14/2017 75 1 FRONT PAGE
31 40 CAMERA: B2B Tele (TN) sync 04/14/2017 76 2 METROCIRC
32 41 CAMERA: Strobe Drivers sync 04/14/2017 77 3 UAT MATCH AND TUNER
B 33 42 CAMERA: FCAM + FOREHEAD sync 04/14/2017 78 4 RFFE TO GPO TRANSLATOR B
34 43 CAMERA: B2B Strobe + Buttons sync 04/14/2017 79 1 SymbolPorts
35 47 AUDIO: CODEC (1/2) sync 04/14/2017 80 4 Guinness WIFI 11/28/2016
36 48 AUDIO: CODEC (2/2) sync 04/14/2017 81 5 WiFiANTFeeds 11/28/2016
37 49 AUDIO: Speaker Amp Bottom sync 04/14/2017
38 50 AUDIO: Speaker Amp Top sync 04/14/2017
39 51 ARC: Driver sync 04/14/2017
40 55 CG: Niki sync 04/14/2017
41 56 CG: PMUs sync 04/14/2017
42 57 CG: B2B DISPLAY + TOUCH sync 04/14/2017
43 58 CG: B2B ORB + MESA sync 04/14/2017
44 59 I/O: Overvoltage Cut-Off Circuit sync 04/14/2017
45 61 I/O: Accessory Buck sync 04/14/2017
A
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
TABLE_5_HEAD
TABLE_5_ITEM
Sub Designs TABLE_HIERARCHY_CONFIG_HEAD
SYNC_MASTER=sync
DRAWING TITLE
TABLE OF CONTENTS
SCH,MLB,D21
SYNC_DATE=06/19/2016
TABLE_5_ITEM
REVISION
820-00846 1 PCBF,MLB,D21 PCB ? D21 RADIO_MLB 0.122.0 S 2017_06_06_17:14:31
TABLE_HIERARCHY_CONFIG_ITEM
10.0.0
D20 NFC_MLB 0.50.0 S 2017_05_26_07:54:42 NOTICE OF PROPRIETARY PROPERTY: BRANCH
TABLE_HIERARCHY_CONFIG_ITEM
TABLE_5_HEAD
D21x Specific
TABLE_ALT_ITEM
825-7691 1 EEEE FOR (MLB,639-04441,JP,ULTRA) EEEE_J08R CRITICAL EEEE_ULTIMATE 685-00152 685-00151 BOM_TABLE_ALTS SUBBOM_CAP SUBBOM,MLB,CAP,SOFT,D21
TABLE_5_ITEM
825-7691 1 EEEE FOR (MLB,639-03377,JP,EXTREME) EEEE_HNV8 CRITICAL EEEE_EXTREME 138S00049 138S0831 TYPICAL_CAP ALL CAP,0201,2.2UF,6.3V,KYOCERA
TABLE_5_ITEM
D21x Specific PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
TABLE_5_HEAD
D
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_HEAD
TABLE_5_ITEM
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: T2 138S00159 2 CAP,SOFT-TERM,2.2uF,6.3V,0201,KYOCERA C3351,C3352 SOFT_CAP
PART NUMBER
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
RCAM B2Bs
TABLE_ALT_ITEM
TABLE_ALT_ITEM
FOREHEAD B2Bs
138S00159 2 CAP,SOFT-TERM,2.2uF,6.3V,0201,KYOCERA C4250,C4261 SOFT_CAP
TABLE_5_ITEM
138S0831 2 TYPICAL_CAP
C
CAP,TYPICAL,2.2UF,6.3V,0201,MURATA C4250,C4261
SIPs
TABLE_5_ITEM
PART NUMBER
138S0831 5 CAP,TYPICAL,2.2UF,6.3V,0201,MURATA C4805,C4809,C4914,C4926,C4929 TYPICAL_CAP
TABLE_ALT_ITEM
D21x Specific
TABLE_5_ITEM
339M00011 339M00010 BOM_TABLE_ALTS M5500 NIKI, STATS SIP 138S00159 5 CAP,SOFT-TERM,2.2uF,6.3V,0201,KYOCERA C5016,C5018,C5134,C5029,C5136 SOFT_CAP
TABLE_ALT_ITEM
TABLE_5_ITEM
339M00013 339M00012 BOM_TABLE_ALTS M4100 HUNT, STATS SIP 138S0831 5 CAP,TYPICAL,2.2UF,6.3V,0201,MURATA C5016,C5018,C5134,C5029,C5136 TYPICAL_CAP
TABLE_5_ITEM
B B
TABLE_5_ITEM
Footprint is ONSEMI
685-00171 1 SUBBOM,MLB,SCHOTTKY DIODES,DIODES,D21 SUBBOM_DS
TABLE_5_ITEM
A SYNC_MASTER=sync SYNC_DATE=02/24/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
1uF,25V,0402,X5R,10%
377S0106 132S0288
TABLE_5_ITEM
197S0446 132S0275
TABLE_5_ITEM TABLE_CRITICAL_HEAD
155S0576 132S0249
TABLE_CRITICAL_ITEM
D
TABLE_ALT_HEAD TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM
D
155S00168 132S0245
TABLE_CRITICAL_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: 138S0683 CAP,CER,X5R,1UF,10%,25V,0402 132S00008 CAP,CER,0.1UF,10%,50V,X7R,0402
335S00288 335S00287 U2600 S,BiCS3,ULTIMATE
TABLE_CRITICAL_HEAD
TABLE_ALT_ITEM TABLE_ALT_ITEM
TABLE_ALT_ITEM TABLE_ALT_ITEM
TABLE_ALT_ITEM TABLE_ALT_ITEM
TABLE_ALT_ITEM TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
Isolator Switch
CAP,CER,X5R,0.22UF,20%,6.3V,01005
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM
132S0396 131S00053
TABLE_CRITICAL_HEAD
TABLE_ALT_ITEM
132S0316 118S00068
TABLE_CRITICAL_ITEM
TABLE_ALT_HEAD TABLE_ALT_ITEM
TABLE_ALT_ITEM
BOM_TABLE_ALTS
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM
Mamba LDO
138S00143 138S00144 ALL
TABLE_CRITICAL_HEAD
BOM_TABLE_ALTS CAP,0402,22UF,4V,KYOCERA
CRITICAL PART# COMMENT
TABLE_ALT_ITEM
BOM_TABLE_ALTS
C
CAP,0201,4UF,4V,MURATA
138S00139 0201,3uF@1V
C PART NUMBER ALTERNATE FOR
PART NUMBER
BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_CRITICAL_HEAD
BOM_TABLE_ALTS CAP,0402,20UF,6.3V,KYOCERA
353S00932 353S00576 BOM_TABLE_ALTS U5890 STMICRO LDO TABLE_CRITICAL_ITEM
TABLE_ALT_ITEM
138S00146 0402,5.1uF@3V
138S00141 138S00140 BOM_TABLE_ALTS ALL CAP,0201,4UF,6.3V,MURATA
Load Switch
TABLE_ALT_ITEM
BOM_TABLE_ALTS CAP,0201,3UF,6.3V,SAMSUNG
CRITICAL PART# COMMENT
TABLE_ALT_ITEM
BOM_TABLE_ALTS CAP,0201,3UF,6.3V,SAMSUNG
TABLE_ALT_HEAD
138S00141 0201,1.1uF@3V
TABLE_ALT_ITEM
BOM_TABLE_ALTS CAP,0402,22UF,4V,TY
353S00999 353S01039 BOM_TABLE_ALTS U6100 TI,LOAD SW,TPS22915C
TABLE_ALT_ITEM
BOM_TABLE_ALTS CAP,0201,4UF,4V,TY
353S01007 353S01039 BOM_TABLE_ALTS U6100 ONSEMI,LOAD SW,NCP333
TABLE_ALT_ITEM
Crystal Alts
TABLE_ALT_ITEM
TABLE_ALT_ITEM
197S0612 197S00118 BOM_TABLE_ALTS Y1000 NDK,XTAL,24MHz,1.6x1.2 197S00118 XTAL, 24M, 1612, TDK
197S00120 197S00118 BOM_TABLE_ALTS Y1000 EPSON,XTAL,24MHz,1.6x1.2 197S0612 XTAL, 24M, 1612, NDK
TABLE_CRITICAL_ITEM
B B
PART NUMBER
PMID1 Zener Diode 155S0581 155S00067 BOM_TABLE_ALTS ALL FERR, 240OHM, 0.38OHM DCR, 0201
TABLE_ALT_ITEM
TABLE_ALT_ITEM
CRITICAL PART# COMMENT
TABLE_CRITICAL_HEAD
TABLE_CRITICAL_ITEM
TABLE_ALT_HEAD
155S00194 155S0610 BOM_TABLE_ALTS ALL FERR BD, 150OHM, TDK 155S0610 FERR BD, 150OHM, 01005
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:
PART NUMBER
TABLE_ALT_ITEM
TABLE_ALT_ITEM
155S00200 155S0610 BOM_TABLE_ALTS ALL FERR BD, 150OHM, TY
TABLE_ALT_ITEM TABLE_CRITICAL_HEAD
Boost Alt 152S00720 152S00640 BOM_TABLE_ALTS ALL IND,0.47UH,55MOHM,3.8A,2012,H=.65 152S00651 IND,1.2UH, 3A, 2016, 0.65Z
152S00650 IND,0.47UH,6.6A,3225,0.8Z
TABLE_CRITICAL_ITEM
SYNC_MASTER=test_mlb SYNC_DATE=03/17/2017
A
PAGE TITLE
TABLE_ALT_ITEM
155S00340 155S0876 BOM_TABLE_ALTS ALL FERR BD,10OHM,1.1A,50MOHM DCR,01005 DRAWING NUMBER SIZE
051-02159 D
Apple Inc.
TABLE_ALT_ITEM
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
O
NORTH_SCREW_EXPOSED FD0401
O
radio_mlb_ff: SUAT2_RF FID
1 C0413 1 C0414 1 C0415 1 C0416 0P5SM1P0SQ-NSP
220PF 56PF 18PF 4PF 1
D
5%
2 10V
5%
2 25V
2%
2 16V
+/-0.1PF
2 16V
FD0402
ROOM=ASSEMBLY
D
BS0407 C0G-CERM
01005
NP0-C0G-CERM
01005
CERM
01005
NP0-C0G
01005
FID
STDOFF-2.6OD1.6ID-0.96H-TH 0P5SM1P0SQ-NSP
1 1
ROOM=ASSEMBLY
FD0403
FID
BS0401 BS0402 BS0403 0P5SM1P0SQ-NSP
STDOFF-2.6OD1.6ID-0.96H-TH STDOFF-2.56OD1.4ID0.99H-SM STDOFF-2.9OD0.81H-SM1 1
ROOM=ASSEMBLY
1 CHASSIS_GND_BS401 1 CHASSIS_GND_BS402 1 CHASSIS_GND_BS403
FD0404
4 34 4 4
FID
Changed to 860-00746 in P2 0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
FD0405
FID
0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
FD0406
FID
0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
34 4 CHASSIS_GND_BS401
1 C0401 1 C0402 1 C0403 1 C0404 1 C0405 1 C0406
220PF 220PF 100PF 56PF 18PF 4PF
5% 5% 5% 5% 2% +/-0.1PF
2 10V
C0G-CERM 2 10V
C0G-CERM 2 16V
NP0-C0G 2 25V
NP0-C0G-CERM 2 16V
CERM 2 16V
NP0-C0G
01005 01005 01005 01005 01005 01005
FD0407
C 4 CHASSIS_GND_BS402 FID
0P5SQ-SMP3SQ-NSP C
1 C0407 1 C0408 1 C0409 1 C0410 1 C0411 1 C0412 1
ROOM=ASSEMBLY
220PF 220PF 100PF 56PF 18PF 4PF
5%
2 10V
5%
2 10V
5%
2 16V
5%
2 25V
2%
2 16V
+/-0.1PF
2 16V
FD0408
C0G-CERM C0G-CERM NP0-C0G NP0-C0G-CERM CERM NP0-C0G FID
01005 01005 01005 01005 01005 01005 0P5SQ-SMP3SQ-NSP
1
Front Shields
ROOM=ASSEMBLY
4 CHASSIS_GND_BS403 FD0409
FID
1 C0417 1 C0418 1 C0419 1 C0420 1 C0421 1 C0422 0P5SQ-SMP3SQ-NSP
1
220PF 220PF 100PF 56PF 18PF 4PF ROOM=ASSEMBLY
5% 5% 5% 5% 2% +/-0.1PF
2 10V
C0G-CERM 2 10V
C0G-CERM 2 16V
NP0-C0G 2 25V
NP0-C0G-CERM 2 16V
CERM 2 16V
NP0-C0G FD0412
1
01005 01005 01005 01005 01005 01005
SH0401 FID
0P5SQ-SMP3SQ-NSP
SM 1
ROOM=ASSEMBLY
SHIELD-FRONT-UPPER-D21
1 FD0410
SH0403 FID
0P5SM1P0SQ-NSP
SM 1
ROOM=ASSEMBLY
SHIELD-LOWER-FRONT-D21 FD0411
FID
BS0405 0P5SM1P0SQ-NSP
1
STDOFF-2.57OD1.43ID-0.899H-SM
B 1
ROOM=ASSEMBLY
B
Back Shields
1
SH0400
SM
SHIELD-SOFT-UPPER-BACK-D21
BS0404
STDOFF-2.57OD1.43ID-0.899H-SM
1
1
SH0402
SM
SHIELD-SOFT-LOWER-BACK-D21
ZT0408
2.50R1.70-NSP
1
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
BS0406
STDOFF-2.6OD0.869H-TH SYSTEM:MECH COMPONENTS
DRAWING NUMBER SIZE
1
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
TOP SIDE
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
4 OF 80
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 4 OF 81
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SOC CPU/GPU
ROOM=TEST
TP0522
1 TP0501 PP0560
P2MM-NSM
TP-P55
A 43 PP16V0_MESA_CONN 1
A SWD_AP_BI_NAND_SWDIO 1
SM
17 13
ROOM=TEST TP-P55 IN PP ROOM=TEST
ROOM=TEST
TP0525 18 14 IN
BUCK1_FB Per #27963227: BUCK1 is GPU PP0561
P2MM-NSM
39 38 37 32 28 25 24 22 20 19
50 48 47 45 44 42 41 40
PP_VDD_MAIN 1
A VDD_MAIN MAKE_BASE=TRUE Change to BUCK1_FB to save 1 via in layout
SWD_AOP_TO_MANY_SWCLK 1
SM
OMIT 50 17 13 ROOM=TEST
TP-P55 IN PP
ROOM=TEST
XW0510
LCM
ROOM=TEST
C A
C
18 14 IN
1
PP_DISPLAY_BL12_CAT2_CONN TP0531
1
ROOM=SOC TP-P55
PP0564
ROOM=TEST 42 A LCM BACKLIGHT SINK2 SHORT-20L-0.05MM-SM
P2MM-NSM
TP-P55 PP0512
P2MM-NSM 17
NAND_ANI0_VREF 1
SM
ROOM=TEST
TP0528 ROOM=TEST IN PP
1 AP_CPU_PCORE_SENSE 1
SM
A LVCC TP 21 14 IN PP ROOM=TEST
TP0532
BB UAT Debug
TP-P55
OMIT ROOM=TEST 42 PP_DISPLAY_BL12_ANODE_CONN 1
A LCM BACKLIGHT SOURCE PP0513
XW0520 TP-P55 P2MM-NSM
LVCC_CPU_GND TP0529 ROOM=TEST AP_VDD_GPU_SENSE SM
2 1 1
A LVCC GROUND 21 14 IN
1
PP ROOM=TEST PP0580
P2MM-NSM
ROOM=SOC TP-P55
SHORT-20L-0.05MM-SM ROOM=TEST
PP_DISPLAY_BL34_CAT1_CONN TP0533 LCM BACKLIGHT SINK3 PP3V0_S2 1
SM
ROOM=TEST
PP0514
50 48 47 46 44 33 20
42 1 A IN PP
TP-P55 P2MM-NSM
IKTARA_COIL1_CONN TP0523
1 ROOM=TEST TP_SOC_SENSE 1
SM
26 25
TP-P55
A
TP0534
14 IN PP ROOM=TEST PP0581
P2MM-NSM
PP_DISPLAY_BL34_CAT2_CONN
ROOM=TEST
CALLISTO 42 1 A LCM BACKLIGHT SINK4 PP0515 41 36 25 23 21 18 15 13 11 PP1V8_S2 1
SM
ROOM=TEST
TP0524
IN PP
TP-P55 P2MM-NSM 50 48 47 46 45 43
IKTARA_COIL2_CONN 1 ROOM=TEST TP_VSS_CPU_SENSE 1
SM
A
PP0582
26 25
16 IN PP ROOM=TEST
TP-P55
P2MM-NSM
ROOM=TEST
PP_DISPLAY_BL34_ANODE_CONN TP0535
1 LCM BACKLIGHT SOURCE (3/4) PP0516 UAT_TUNER_RFFE_CLK 1
SM
42 A P2MM-NSM
50 IN PP ROOM=TEST
TP-P55 TP_VSS_SENSE SM
DFU
1
ROOM=TEST 16 IN PP ROOM=TEST
PP0583
P2MM-NSM
UAT_TUNER_RFFE_DATA SM
PMU Debug
50 1
IN PP ROOM=TEST
TP0514
SENSE TP
47 21 12 PMU_HYDRA_TO_AP_FORCE_DFU 1
A
FORCE DFU PP0520
BACKLIGHT Debug
TP-P55
ROOM=TEST
P2MM-NSM
OMIT AOP_TO_DDR_SLEEP1_READY SM
PP0504
P2MM-NSM XW0540 15 13 IN
1
PP
DFU_STATUS 1
SM SHORT-20L-0.05MM-SM
AP_GPU_GND_SENSE TP0540 GPU GROUND SENSE
ROOM=TEST
PP0590
B 12 PP 2 1
ROOM=SOC
1
A
TP-P55
PP0521
P2MM-NSM 41 11
DWI_PMGR_TO_BACKLIGHT_DATA
P2MM-NSM
1
SM
ROOM=TEST
B
ROOM=TEST IN PP
SPMI_PMU_BI_PMGR_SDATA 1
SM
PP0591
21 11 IN PP
E75
ROOM=TEST P2MM-NSM
#29098531:GPU THROTTLE PP0522 41 11 IN
DWI_PMGR_TO_BACKLIGHT_CLK 1
SM
PP ROOM=TEST
P2MM-NSM
21 7 IN
PMU_TO_AP_THROTTLE_GPU1_L 1
SM
PP
90_HYDRA_DP1_CONN_P TP0502
1 ROOM=TEST
48 47 A
TP-P55
ROOM=TEST
#29282469:SOCHOT PP0523
P2MM-NSM
21 7
AP_TO_PMU_SOCHOT_L 1
SM
IN PP
TP0503
Sensor SPI
ROOM=TEST
48 47 90_HYDRA_DP1_CONN_N 1
A
TP-P55
ROOM=TEST #29162687:CODEC BCLK PP0524
PP0540 I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK_R
P2MM-NSM
TP0504
SM
P2MM-NSM 1
48 47 90_HYDRA_DP2_CONN_P 1
A 27 13
SPI_AOP_TO_IMU_SCLK 1
SM 38 36 13 IN PP
IN PP ROOM=TEST ROOM=TEST
TP-P55
48 47 90_HYDRA_DP2_CONN_N
ROOM=TEST
TP0505
1
A 27 13
SPI_AOP_TO_IMU_MOSI
PP0541
P2MM-NSM
1
SM
#29794618:CCG2
CCG2_TO_SMC_INT_L
PP0525
P2MM-NSM
SM
RF Debug PP0595
TP-P55
IN PP ROOM=TEST 46 11 1 P2MM-NSM
IN PP
ROOM=TEST WLAN_TO_AP_TIME_SYNC 1
SM
PP0542 ROOM=TEST 50 12 IN PP ROOM=TEST
PP_HYDRA_ACC2_CONN TP0507
1
PP0543 ROOM=TEST
A
PCIE Refclk
P2MM-NSM
A
A
48
TP-P55 27 13 IN
SPI_AOP_TO_COMPASS_CS_L 1
SM
ROOM=TEST
PP ROOM=TEST SYNC_MASTER=sync SYNC_DATE=04/14/2017
PP0530
PAGE TITLE
TP0516
1
PP0544
P2MM-NSM 90_PCIE_AP_TO_NAND_REFCLK_P
P2MM-NSM
SM
SYSTEM: Testpoints
TP-P55
A TP IS TO HELP WITH USB SI COMPASS_TO_AOP_INT 1
SM 17 8 IN
1
PP DRAWING NUMBER SIZE
10.0.0
HYDRA_CON_DETECT_CONN_L TP0508
1 PHOSPHORUS_TO_AOP_INT 1
SM
90_PCIE_AP_TO_NAND_REFCLK_N 1
SM
NOTICE OF PROPRIETARY PROPERTY:
48
TP-P55
A FOR DIAGS 27 13 IN PP ROOM=TEST 17 8 IN PP
ROOM=TEST THE INFORMATION CONTAINED HEREIN IS THE
BRANCH
D D
BOOTSTRAPPING:BOARD REV
BOARD ID
BOOT CONFIG
NOSTUFF
R0623
BOARD_REV3 1
1.00K 2 PP1V8_IO
12 7 8 9 11 15 17 18 28 29 30 31
1/32W
5%
MF
01005
33 40 42 BOARD_REV[3:0]
ROOM=SOC FLOAT=LOW, PULLUP=HIGH
0=MLB, 1=DEV
01=D20x, 10=D21x
NOSTUFF 0=EUREKA, 1=KAROO
R0610
BOARD_ID3 1
1.00K 2
11
1/32W MF
5% 01005
ROOM=SOC
R0611 BOOT_CONFIG[2:0]
B 12
BOARD_ID2
1/32W
1
1.00K 2
MF FLOAT=LOW, PULLUP=HIGH
B
5% 01005
ROOM=SOC 000 SPI0
001 SPI0 TEST MODE
NOSTUFF SELECTED --> 010 SPI0 NAND
R0612 011 SPI0 NAND TEST
BOARD_ID1 1
1.00K 2 100 n/a
12
1/32W MF
5% 01005 101 n/a
ROOM=SOC 110 SLOW SPI0 TEST
111 FAST SPI0 TEST
No connect
BOARD_ID0 5 12
17 11 5
SPI_S4E_TO_AP_MISO_BOOT_CONFIG2 No connect
1 C1090
0.1UF
20%
2 6.3V
D
X5R-CERM
01005
ROOM=SOC
D
FL1092
240OHM-25%-0.2A-0.9OHM
PP1V8_XTAL 1 2
01005
1 C1092 ROOM=SOC 1 C1093
0.1UF 2.2UF
20% 20%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
01005 0201
ROOM=SOC ROOM=SOC
1 C1095
0.1UF
20%
2 6.3V
X5R-CERM
01005
ROOM=SOC
VDD18_XTAL AU28
VDD33_USB AN14
VDD_FIXED_USB AN15
VDD18_USB AP14
VDD12_UH1_HSIC0 AT7
C C
U1000
TMIT78B1-C5
WLCSP
SYM 1 OF 16
ROOM=SOC
NC
BA4 UH1_HSIC0_DATA ANALOGMUX_OUT AT27 AP_TO_PMU_AMUX_OUT OUT 21
AY4 CRITICAL
NC UH1_HSIC0_STB
OMIT_TABLE
AV6 JTAG_TRST*
NC
AT9 JTAG_TDO
NC
NC
AT12 JTAG_TDI USB_VBUS AV7 USB_VBUS_DETECT IN 24
47 BI
SWD_DOCK_BI_AP_SWDIO AT10 JTAG_TMS
SWD_DOCK_TO_AP_SWCLK AT13 JTAG_TCK USB_ID AW6
R1020 USB Reference
47 IN NC
1
10K 2 PMU_TO_SYSTEM_COLD_RESET_R_L AU7 COLD_RESET*
5% MF
USB_REXT AU8 AP_USB_REXT
1/32W 01005
47 41 21 IN
PMU_TO_AP_HYDRA_ACTIVE_READY AT34 CFSB
PMU_TO_SYSTEM_COLD_RESET_L ROOM=SOC AV5 CFSB_AON 1 R1000
B PMU_TO_AP_THROTTLE_PCORE_L
B
21 IN
CPU_TRIGGER0 AT22
AP_TO_PMU_TEST_CLKOUT V2 AW21 PMU_TO_AP_THROTTLE_ECORE_L
IN 21
200
21 5 OUT TST_CLKOUT CPU_TRIGGER1 IN 21 1%
1/32W
MF
17 OUT
AP_TO_NAND_RESET_L AF34 SSD_RESET* GPU_TRIGGER0 AD2 PMU_TO_AP_THROTTLE_GPU0_L IN 21
2 01005
ROOM=SOC
GPU_TRIGGER1 AD3 PMU_TO_AP_THROTTLE_GPU1_L
17 OUT
AP_TO_NAND_FW_STRAP AG38 SSD_BFH
IN 5 21
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
SOC: JTAG,USB,XTAL
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D
X5R-CERM
01005
ROOM=SOC
X5R-CERM 2
0201
ROOM=SOC
D
PCIe Clock Request Pull-Ups
PP1V8_IO
30 29 28 18 17 15 11 9 8 7 6
42 40 33 31 VDD_FIXED_PCIE_xxx:0.765V - 0.84V @ 140mA MAX
R1100 1 R1130 1 PP0V8_SOC_FIXED_S1
100K 100K 7 9 10 14 15 18
5%
1/32W
5%
1/32W
R1194
1 C1193 1 C1192 1 C1191
MF
01005 2
MF
01005 2 0.00 0.1UF 1.0UF 2.2UF
20% 20% 20%
ROOM=SOC ROOM=SOC PP0V8_SOC_FIXED_PCIE_REFBUF 1 2 6.3V
2 X5R-CERM 2 6.3V 2 6.3V
VOLTAGE=0.9V X5R X5R-CERM
17 8 PCIE_NAND_BI_AP_CLKREQ_L 1 C1194 0%
1/32W
01005
ROOM=SOC
0201-1
ROOM=SOC
0201
ROOM=SOC
VDD18_PCIE AM29
VDD18_PCIE AM31
VDD_FIXED_PCIE_REFBUF AM27
VDD12_PCIE_REFBUF AN26
VDD_FIXED_PCIE_ANA AN30
VDD12_PCIE_REFBUF AP26
VDD_FIXED_PCIE_ANA AP29
VDD_FIXED_PCIE_ANA AP31
VDD_FIXED_PCIE_REFBUF AP27
50 8 PCIE_WLAN_BI_AP_CLKREQ_L 0.1UF MF
01005
20% ROOM=SOC
2 6.3V
X5R-CERM
01005
ROOM=SOC
C
SYM 2 OF 16
C 17 8 BI
PCIE_NAND_BI_AP_CLKREQ_L AL38 PCIE_CLKREQ0* PCIE_CLKREQ3* AJ36 PCIE_WLAN_BI_AP_CLKREQ_L BI 8 50
PCIE LINK 3
C1100 1 2 0.22UF C1130 1 2 0.1UF
20% 6.3V 90_PCIE_WLAN_TO_AP_RXD_C_P
GND_VOID=TRUE
20% 6.3V
17 IN
90_PCIE_NAND_TO_AP_RXD_P GND_VOID=TRUE
X5R 01005-1 90_PCIE_NAND_TO_AP_RXD_C_P AV29 PCIE_RX0_P PCIE_RX3_P BA36
X5R-CERM 01005
90_PCIE_WLAN_TO_AP_RXD_P IN 50
90_PCIE_NAND_TO_AP_RXD_N ROOM=NAND
90_PCIE_NAND_TO_AP_RXD_C_N AW29 PCIE_RX0_N PCIE_RX3_N AY36 90_PCIE_WLAN_TO_AP_RXD_C_N ROOM=SOC 90_PCIE_WLAN_TO_AP_RXD_N
C1101 C1131
17 50
2 0.22UF 0.1UF
IN IN
1 1 2
PCIE LINK 0
90_PCIE_AP_TO_NAND_TXD_N ROOM=SOC
90_PCIE_AP_TO_NAND_TXD_C_N BA30 PCIE_TX0_N PCIE_TX3_N AW35 90_PCIE_AP_TO_WLAN_TXD_C_N ROOM=SOC 90_PCIE_AP_TO_WLAN_TXD_N
C1103 C1133
17 50
2 0.22UF 0.1UF
OUT OUT
1 1 2
GND_VOID=TRUE 20% 6.3V 17 8 OUT PCIE_AP_TO_NAND_RESET_L AJ37 PCIE_PERST0* PCIE_PERST3* AH36 PCIE_AP_TO_WLAN_RESET_L OUT 8 50
GND_VOID=TRUE
20% 6.3V
X5R 01005-1 X5R-CERM 01005
ROOM=SOC
ROOM=SOC
LINK0 LINK3
NC
AW26 PCIE_REF_CLK1_P PCIE_REF_CLK2_P AV25 90_PCIE_AP_TO_BB_REFCLK_P OUT 50
NC
AY26 PCIE_REF_CLK1_N PCIE_REF_CLK2_N AW25 90_PCIE_AP_TO_BB_REFCLK_N 50
B
OUT
B
C1120 0.1UF
PCIE LINK 2
1 2
GND_VOID=TRUE
20% 6.3V
NC
AV31 PCIE_RX1_P PCIE_RX2_P BA34 90_PCIE_BB_TO_AP_RXD_C_P X5R-CERM 01005
90_PCIE_BB_TO_AP_RXD_P IN 50
AW31 PCIE_RX1_N PCIE_RX2_N AY34 90_PCIE_BB_TO_AP_RXD_C_N ROOM=SOC 90_PCIE_BB_TO_AP_RXD_N
C1121
50
NC 1 2 0.1UF IN
GND_VOID=TRUE
20% 6.3V
X5R-CERM 01005
ROOM=SOC
C1122 1 2 0.1UF
GND_VOID=TRUE
20% 6.3V
NC
AY32 PCIE_TX1_P PCIE_TX2_P AV33 90_PCIE_AP_TO_BB_TXD_C_P X5R-CERM 01005
90_PCIE_AP_TO_BB_TXD_P OUT 50
BA32 PCIE_TX1_N PCIE_TX2_N AW33 90_PCIE_AP_TO_BB_TXD_C_N ROOM=SOC 90_PCIE_AP_TO_BB_TXD_N
C1123
50
NC 1 2 0.1UF OUT
NC
AK38 PCIE_PERST1* PCIE_PERST2* AJ38 PCIE_AP_TO_BB_RESET_L OUT 8 50
GND_VOID=TRUE
20% 6.3V
LINK1 LINK2 X5R-CERM 01005
ROOM=SOC
AU30 PCIE_EXT_REF_CLK_P
AT30 PCIE_EXT_REF_CLK_N
SOC: PCIE
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
1
R1201 1
R1202
1.00K 1.00K
5% 5%
1/32W 1/32W
MF MF
2 01005
ROOM=SOC 2 01005
ROOM=SOC
I2C0_ISP_SCL
D
30 9
I2C0_ISP_SDA
D VDD_FIXED_MIPI:0.765V - 0.84V @ 40mA MAX VDD18_MIPI:1.62V - 1.98V @ 10mA MAX 30 9
18 15 14 10 8 7
PP0V8_SOC_FIXED_S1 PP1V8_IO 6 7 8 9 11 15 17 18 28 29 30 31
33 40 42
G12
G14
F11
F13
5% 5%
1/32W 1/32W
MF MF
2 01005 2 01005
VDD_FIXED_MIPI
VDD18_MIPI
ROOM=SOC ROOM=SOC
31 9 I2C1_ISP_SCL
31 9 I2C1_ISP_SDA
U1000
TMIT78B1-C5
WLCSP
ISP I2C2
SYM 3 OF 16 PP1V8_IO
33 BI
90_MIPI_FCAM_TO_AP_DATA0_P B12 MIPI0C_DPDATA0 ISP_I2C0_SCL W35 I2C0_ISP_SCL OUT 9 30
30 29 28 18 17 15 11 9 8 7 6
42 40 33 31
33 BI
90_MIPI_FCAM_TO_AP_DATA0_N A12 MIPI0C_DNDATA0 ISP_I2C0_SDA V38 I2C0_ISP_SDA BI 9 30
1
R1221 1
R1222
2.2K 2.2K
FCAM MIPI
5% 5%
33 IN
90_MIPI_FCAM_TO_AP_DATA1_P B14 MIPI0C_DPDATA1 ISP_I2C1_SCL W36 I2C1_ISP_SCL OUT 9 31
#29684166: Freq change to 400K, change PU to 2.2K 1/32W 1/32W
MF MF
33 IN
90_MIPI_FCAM_TO_AP_DATA1_N A14 MIPI0C_DNDATA1 ISP_I2C1_SDA Y36 I2C1_ISP_SDA BI 9 31
2 01005 2 01005
ROOM=SOC ROOM=SOC
C 33 IN
90_MIPI_FCAM_TO_AP_CLK_P A13 MIPI0C_DPCLK ISP_I2C2_SCL Y34 I2C2_ISP_SCL OUT 9 33
I2C2_ISP_SCL
C
33 IN
90_MIPI_FCAM_TO_AP_CLK_N B13 MIPI0C_DNCLK ISP_I2C2_SDA Y38 I2C2_ISP_SDA BI 9 33
33 9
I2C2_ISP_SDA
33 9
42 BI
90_MIPI_AP_TO_DISPLAY_DATA0_P A10 MIPID_DPDATA0 SENSOR2_CLK R37 AP_TO_FCAM_CLK_R 1% 32 29 9
I2C3_ISP_SCL
1/32W
42 BI
90_MIPI_AP_TO_DISPLAY_DATA0_N B10 MIPID_DNDATA0 MF 29 9
I2C3_ISP_SDA
01005
ROOM=SOC
42 OUT
90_MIPI_AP_TO_DISPLAY_DATA3_P B9 MIPID_DPDATA1 R1242
42 OUT
90_MIPI_AP_TO_DISPLAY_DATA3_N A9 MIPID_DNDATA1 SENSOR0_RST V34
NC 1
33.2 2 AP_TO_FCAM_CLK
ISP_TO_TELE_SHUTDOWN_L
Display MIPI
33
SENSOR1_RST U35 31
OUT
OUT
1%
42 OUT
90_MIPI_AP_TO_DISPLAY_DATA2_P A7 MIPID_DPDATA2 SENSOR2_RST AB34 ISP_TO_WIDE_SHUTDOWN_L OUT 30 1/32W
MF
42 OUT
90_MIPI_AP_TO_DISPLAY_DATA2_N B7 MIPID_DNDATA2 SENSOR3_RST AC37
NC
01005
ROOM=SOC
SENSOR4_RST AA35 ISP_TO_FCAM_SHUTDOWN_L OUT 33
42 OUT
90_MIPI_AP_TO_DISPLAY_DATA1_N A6 MIPID_DPDATA3
42 OUT
90_MIPI_AP_TO_DISPLAY_DATA1_P B6 MIPID_DNDATA3 #30699217: Change camera shutdown pins
B 42 OUT
90_MIPI_AP_TO_DISPLAY_CLK_P A8 MIPID_DPCLK SENSOR0_ISTRB V36 AP_DEBUG3 OUT 5 B
42 OUT
90_MIPI_AP_TO_DISPLAY_CLK_N B8 MIPID_DNCLK SENSOR1_ISTRB U36
NC
1 R1252 NC
AA4 DISP_I2C_SCL
200 AA5 DISP_I2C_SDA
1% NC
1/32W
MF
2 01005 Y4 DISP_POL
ROOM=SOC NC
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
20 15 14 8
PP1V2_SOC PP0V8_SOC_FIXED_S1 7 8 9 10 14 15 18
G16
G18
F15
F17
F16
VDD12_LPDP_TX M9
VDD_FIXED_PLL_LPDP R9
VDD_FIXED_LPDP_TX P9
VDD12_PLL_LPDP T9
VDD12_LPDP_RX
VDD_FIXED_LPDP_RX
30
90_LPDP_WIDE_TO_AP_D0_P A26 LPDPRX_RX_D0_P LPDP_TX0P M3
IN NC
90_LPDP_WIDE_TO_AP_D0_N B26 LPDPRX_RX_D0_N LPDP_TX0N M4
30 IN
U1000 NC
TMIT78B1-C5
WLCSP
SYM 4 OF 16
30
90_LPDP_WIDE_TO_AP_D1_P A25 LPDPRX_RX_D1_P LPDP_TX1P L4
IN NC
90_LPDP_WIDE_TO_AP_D1_N
C
B25 L5
C 30 IN LPDPRX_RX_D1_N LPDP_TX1N NC
30
90_LPDP_WIDE_TO_AP_D2_P A24 LPDPRX_RX_D2_P LPDP_TX2P K3
IN NC
30
90_LPDP_WIDE_TO_AP_D2_N B24 LPDPRX_RX_D2_N LPDP_TX2N K4
IN NC
31
90_LPDP_TELE_TO_AP_D2_P A21 LPDPRX_RX_D3_P LPDP_TX3P J4
IN NC
31
90_LPDP_TELE_TO_AP_D2_N B21 LPDPRX_RX_D3_N LPDP_TX3N J5
IN NC
D21 Only
31
90_LPDP_TELE_TO_AP_D1_P A19 LPDPRX_RX_D5_P LPDP_AUX_P G4
IN NC
31
90_LPDP_TELE_TO_AP_D1_N B19 LPDPRX_RX_D5_N LPDP_AUX_N G5
IN NC
LPDP_CAL_DRV_OUT H3
NC
LPDP_CAL_VSS_EXT H6
NC
30 BI
LPDP_WIDE_BI_AP_AUX D21 LPDPRX_AUX_D0_P
D20 LPDPRX_AUX_D1_P EDP_HPD Y6
NC NC
D19 LPDPRX_AUX_D2_P DP_WAKEUP Y2
B 31 BI
LPDP_TELE_BI_AP_AUX
NC
D17 LPDPRX_AUX_D3_P
NC
B
D16 LPDPRX_AUX_D4_P
NC
D15 LPDPRX_AUX_D5_P
NC
18 15 14 10 9 8 7
PP0V8_SOC_FIXED_S1 B23 LPDPRX_RCAL_P
R1300 1
300
1%
1/32W
MF
01005-1 2
ROOM=SOC
AP_LPDPRX_RCAL_NEG A23 LPDPRX_RCAL_N
C1301 1
100PF D18 LPDPRX_EXT_C
5% NC
16V
NP0-C0G 2
01005
ROOM=SOC
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
SOC: LPDP
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
R1400 1 R1401 1
4.3K 4.3K
1% 1%
1/32W 1/32W
MF MF
01005 2 01005 2
ROOM=SOC ROOM=SOC
45 41 21 11
I2C0_AP_SCL
I2C0_AP_SDA
D
45 41 21 11
D
R1460 AP I2C1
I2S_AP_TO_CODEC_MCLK1 1
33.2 2 I2S_AP_TO_CODEC_MCLK1_R AV23 AG3 I2C0_AP_SCL 30 29 28 18 17 15 11 9 8 7 6
PP1V8_IO
I2S0_MCK I2C0_SCL
36 OUT
I2S_AP_TO_CODEC_ASP3_BCLK AW23 U1000 AG2 I2C0_AP_SDA
OUT 11 21 41 45 42 40 33 31
1%
1/32W
36 OUT
I2S_AP_TO_CODEC_ASP3_LRCLK AT24
I2S0_BCLK
TMIT78B1-C5
I2C0_SDA BI 11 21 41 45
R1410 1 R1411 1
MF
01005
36 OUT I2S0_LRCK WLCSP 2.2K 2.2K
ROOM=SOC 36 IN
I2S_CODEC_ASP3_TO_AP_DIN AT25 I2S0_DIN I2C1_SCL AD38 I2C1_AP_SCL OUT 11 34 48
5%
1/32W
5%
1/32W
SYM 6 OF 16 #29545367:100kHz uses 2.2kohm
36 OUT
I2S_AP_TO_CODEC_ASP3_DOUT AT26 I2S0_DOUT I2C1_SDA AD36 I2C1_AP_SDA BI 11 34 48
MF
01005 2
MF
01005 2
ROOM=SOC ROOM=SOC
NC
AH38 I2S1_DIN I2C3_SDA AC38 I2C3_AP_SDA BI 11 41 42 48
NC
AG37 I2S1_DOUT 30 29 28 18 17 15 11 9 8 7 6
PP1V8_IO
SMC_I2CM0_SCL AY16 I2C0_SMC_SCL 42 40 33 31
R1464 OUT 11 22 23 24 25 46
I2S_BB_TO_AP_BCLK
NC
AG4
AG5
I2S3_MCK
I2S3_BCLK
SEP_SPI0_SCLK
SEP_SPI0_MISO
AL6
AM5
NC AP I2C3
PP1V8_IO
50
NC
C
IN
C 50 IN
I2S_BB_TO_AP_LRCLK
I2S_BB_TO_AP_DIN
AH2
AH6
I2S3_LRCK SEP_SPI0_MOSI AM4
NC
30 29 28 18 17 15 11 9 8 7 6
42 40 33 31
50 IN
I2S_AP_TO_BB_DOUT AH4
I2S3_DIN
R1430 1
R1431 1
50 OUT I2S3_DOUT 1.43K 1.43K
SEP_I2C_SCL AL2 I2C4_AP_SCL 40 CKPLUS_WAIVE=I2C_PULLUP 1% 1%
OUT 1/32W 1/32W
SEP_I2C_SDA AM3 I2C4_AP_SDA 40 CKPLUS_WAIVE=I2C_PULLUP MF MF
BI 01005 01005 2
ROOM=SOC 2 ROOM=SOC
SPI_S4E_TO_AP_MISO_BOOT_CONFIG2 AV22 48 42 41 11
I2C3_AP_SCL
SPI0_MISO
R1465
17 6 5 IN
SPI_AP_TO_S4E_MOSI_BOOT_CONFIG1 BA21 48 42 41 11
I2C3_AP_SDA
SPI0_MOSI
SPI_AP_TO_S4E_SCLK_BOOT_CONFIG0 1
0.00 2
17 6 IN
SPI_AP_TO_S4E_SCLK_BOOT_CONFIG0_R BA22
SMC I2C0
17 6 IN SPI0_SCLK
0% 6 IN
BOARD_ID3 AU22 SPI0_SSIN
1/32W
MF
01005
41 36 25 23 21 18 15 13 11 5
PP1V8_S2
ROOM=SOC
R1470
50 48 47 46 45 43
#30765511:Add back R1461
SPI_TOUCH_TO_AP_MISO AU23
R1461
42 IN
SPI_AP_TO_TOUCH_MOSI AY22
SPI1_MISO
AV21 SPMI_PMGR_TO_PMU_SCLK_R 1
0.00 2 SPMI_PMGR_TO_PMU_SCLK R1440 1 R1441 1
0.00 42 OUT SPI1_MOSI SPMI_SCLK OUT 21 2.2K 2.2K
42 OUT
SPI_AP_TO_TOUCH_SCLK 1 2 SPI_AP_TO_TOUCH_SCLK_R AW22 SPI1_SCLK SPMI_SDATA AW20 SPMI_PMU_BI_PMGR_SDATA BI 5 21 0% #29673218: Change R1440, R1441 to 2.2K 5%
1/32W
5%
1/32W
1/32W
0% 42 OUT
SPI_AP_TO_TOUCH_CS_L AT23 SPI1_SSIN MF MF
01005 2
MF
01005 2
1/32W 01005
MF ROOM=SOC ROOM=SOC ROOM=SOC
01005 DWI_CLK AE36 DWI_PMGR_TO_BACKLIGHT_CLK
I2C0_SMC_SCL
OUT 5 41
ROOM=SOC
DWI_DO AF36 DWI_PMGR_TO_BACKLIGHT_DATA 46 25 24 23 22 11
SPI_CODEC_TO_AP_MISO AE4 SPI2_MISO
OUT 5 41
I2C0_SMC_SDA
R1462
36 IN 46 25 24 23 22 11
SPI_AP_TO_CODEC_MOSI AE2 SPI2_MOSI
SPI_AP_TO_CODEC_SCLK 1
0.00 2
36 OUT
SPI_AP_TO_CODEC_SCLK_R AD5 SPI2_SCLK
SMC I2C1
36 OUT
0% 36 OUT
SPI_AP_TO_CODEC_CS_L AE6 SPI2_SSIN
1/32W
MF
01005
ROOM=SOC 41 36 25 23 21 18 15 13 11 5
PP1V8_S2
50 48 47 46 45 43
SPI_MESA_TO_AP_MISO AE38 SPI3_MISO
R1463
43 IN
CLK24M_OUT AV19 AP_TO_TOUCH_CLK32K_RESET_L R1450 1 R1451 1
SPI_AP_TO_MESA_MOSI AE35 SPI3_MOSI
OUT 42
R1480
B 0.00 4.7K 4.7K B
43 OUT
SPI_AP_TO_MESA_SCLK 1 2 SPI_AP_TO_MESA_SCLK_R AF38 SPI3_SCLK 0.00 5% 5%
43 OUT
NAND_SYS_CLK BA20 AP_TO_NAND_SYS_CLK_R 1 2 AP_TO_NAND_SYS_CLK 1/32W 1/32W
0% 43 IN
MESA_TO_AP_INT AE37 SPI3_SSIN
OUT 17
MF MF
1/32W 0% 01005 01005
MF 1/32W ROOM=SOC 2 ROOM=SOC 2
01005 MF
01005
ROOM=SOC
ROOM=SOC 47 11
I2C1_SMC_SCL
47 11
I2C1_SMC_SDA
SPI: Route as Daisy-Chain (No T's Allowed)
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
U1000
TMIT78B1-C5
WLCSP
SYM 5 OF 16
EAST
50 OUT
UART0_RXD AF3 UART_AP_DEBUG_RXD
AP_TO_BB_RESET_L N37 GPIO_5
IN 47
50 OUT
L37 UART0_TXD AF2 UART_AP_DEBUG_TXD OUT 47
NC GPIO_6
AP_TO_BB_IPC_GPIO1 K38 GPIO_7
50 OUT
K34 UART1_CTS* P34 UART_BT_TO_AP_CTS_L IN 50
GPIO_8
NC
L35 UART1_RTS* L36 UART_AP_TO_BT_RTS_L OUT 50
GPIO_9
NC UART1_RXD P36 UART_BT_TO_AP_RXD
AP_TO_GNSS_WAKE D33 GPIO_10
IN 50
OUT
C34 UART1_TXD M37 UART_AP_TO_BT_TXD OUT 50
NORTHEAST
NC GPIO_11
AP_TO_BT_WAKE D32
C 50 OUT
AP_TO_SPKRAMP_TOP_RESET_L D29
GPIO_12
GPIO_13
UART2_CTS* B28 UART_GNSS_TO_AP_CTS_L IN C
38 OUT
B33 UART2_RTS* B29 UART_AP_TO_GNSS_RTS_L OUT
GPIO_14
NC UART2_RXD C28 UART_GNSS_TO_AP_RXD
AP_TO_NFC_FW_DWLD_REQ A32 GPIO_15
IN
50 5 OUT
P6 UART2_TXD B30 UART_AP_TO_GNSS_TXD OUT
NC GPIO_16
AP_TO_TOUCH_MAMBA_RESET_L P4 GPIO_17
42 OUT
UART3_CTS* D30 UART_NFC_TO_AP_CTS_L
BOARD_ID0 R4 GPIO_18
IN 50
6 5 IN
UART3_RTS* B32 UART_AP_TO_NFC_RTS_L
SPKRAMP_TOP_TO_AP_INT_L R3 GPIO_19
OUT 50
38 IN
UART3_RXD C32 UART_NFC_TO_AP_RXD
CAMPMU_TO_AP_IRQ_L R2 GPIO_20
IN 50
29 IN
UART3_TXD D31 UART_AP_TO_NFC_TXD
50 OUT
AP_TO_BBPMU_RADIO_ON_L T5 GPIO_21
OUT 50
AP_TO_WLAN_DEVICE_WAKE T4 GPIO_22
50 OUT
UART4_CTS* K36 UART_WLAN_TO_AP_CTS_L
WEST
T3 GPIO_23
IN 50
NC
T2 UART4_RTS* M35 UART_AP_TO_WLAN_RTS_L OUT 50
GPIO_24
NC UART4_RXD N36 UART_WLAN_TO_AP_RXD
BOARD_ID1 U6 GPIO_25
IN 50
6 IN
UART4_TXD N35 UART_AP_TO_WLAN_TXD
47 21 5 IN
PMU_HYDRA_TO_AP_FORCE_DFU U4 GPIO_26
OUT 50
DFU_STATUS U2 GPIO_27
5 OUT
UART6_RXD AF5 UART_ACCESSORY_TO_AP_RXD
BOARD_ID2 V5 GPIO_28
IN 47
6 IN
UART6_TXD AF4 UART_AP_TO_ACCESSORY_TXD
6 IN
BOARD_ID4 V4 GPIO_29
OUT 47
21 OUT
AP_TO_PMU_AMUX_SYNC V3 GPIO_30 R5
UART7_RXD
50 OUT
AP_TO_BB_TIME_MARK AJ3 GPIO_31 P2
NC
UART7_TXD
50 IN
BB_TO_AP_RESET_DETECT_L AJ4 GPIO_32 NC
SOUTHWEST
42 OUT
TOUCH_TO_AP_INT_L AJ5 GPIO_33
6 IN
BOARD_REV3 AJ6 GPIO_34
6 IN
BOARD_REV2 AK3 GPIO_35
6 IN
BOARD_REV1 AK4 GPIO_36
6 IN
BOARD_REV0 AK5 GPIO_37
B B
21 IN
PMU_TO_AP_BUTTON_POWER_KEY_L AB2 REQUEST_DFU1
21 IN
PMU_TO_AP_BUTTON_VOL_DOWN_L AC4 REQUEST_DFU2
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
SOC - AOP
D D
41 36 25 23 21 18 15 13 11 5
PP1V8_S2
50 48 47 46 45 43
1 C1690 1 C1691
2.2UF 0.1UF
20% 20%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
0201 01005
ROOM=SOC ROOM=SOC
AP13
AP15
AP17
AP19
VDDIO18_AOP
VDDIO18_AOP
VDDIO18_AOP
VDDIO18_AOP
AOP_TO_DDR_SLEEP1_READY AT11 AON_DDR_RESET*
15 5 OUT
U1000
SPI_AOP_TO_COMPASS_CS_L AU14 TMIT78B1-C5
27 5 OUT AOP_FUNC_0 WLCSP
COMPASS_TO_AOP_INT AU13 AOP_FUNC_1 SYM 7 OF 16
27 5 IN
AOP_PDM_CLK0 BA16 CODEC_TO_AOP_GPIO1
ACCEL_GYRO_TO_AOP_DATARDY AW10 AOP_FUNC_2
IN 36
27 IN
AOP_PDM_DATA0 AW18 CODEC_TO_AOP_GPIO2
27 OUT
SPI_AOP_TO_ACCEL_GYRO_CS_L AW11 AOP_FUNC_3 AW17
IN 36
AOP_PDM_DATA1
27 IN
ACCEL_GYRO_TO_AOP_INT AT16 AOP_FUNC_4 NC
SPI_AOP_TO_PHOSPHORUS_CS_L AV11 BA18 PMU_TO_AOP_CLK32K
C 27 OUT
PHOSPHORUS_TO_AOP_INT AY10
AOP_FUNC_5
AOP_FUNC_6
RT_CLK32768 IN 21
C
27 5 IN
AOP_SWD_TCK_OUT AV20 SWD_AOP_TO_MANY_SWCLK
43 OUT
AOP_TO_MESA_I2C_ISO_EN AV12 AOP_FUNC_7
OUT 5 17 50
43 IN
MESA_TO_AOP_FDINT AY11 AOP_FUNC_8 AY17
AU16 AOP_SWD_TMS0 NC
AOP_FUNC_9
NC AOP_SWD_TMS1 AT21 SWD_AOP_BI_BB_SWDIO
DISPLAY_TO_MANY_BSYNC AV16 AOP_FUNC_10
BI 50
50 42 29 22 21 IN
AT17 SWD_TMS2 AC5 SWD_AP_BI_NAND_SWDIO BI 5 17
AOP_FUNC_11
PMU_TO_AOP_IRQ_L
NC
AV13 SWD_TMS3 AC2
NC PP1V8_S2 5 11 13 15 18 21 23 25 36 41 43
21 IN AOP_FUNC_12 45 46 47 48 50
AOP_TO_SPKRAMP_BOT_ARC_RESET_L AW12
39 37 OUT
SPKRAMP_BOT_ARC_TO_AOP_INT_L AV14
AOP_FUNC_13
AOP_I2CM0_SCL BA9 R1620 1 R1621 1
39 37 IN AOP_FUNC_14
AOP_I2CM0_SDA AV9 2.2K 2.2K
36 OUT
AOP_TO_CODEC_CLP_EN AW13 AOP_FUNC_15 5%
1/32W
5%
1/32W
48 39 36 BI
I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT AU17 AOP_FUNC_16 AOP_I2CM1_SCL AV10 MF
01005
MF
01005
33 PROX_BI_AOP_INT_L_PWM AV15 AOP_FUNC_17 AOP_I2CM1_SDA AW9 ROOM=SOC 2 ROOM=SOC 2
BI
AY13 AOP_FUNC_18 I2C0_AOP_SCL
NC OUT 33
36 OUT
AOP_TO_CODEC_RESET_L BA11 AOP_FUNC_19 I2C0_AOP_SDA 33
BI
33 IN
ALS_TO_AOP_INT_L AV17 AOP_FUNC_20 PP1V8_S2
BA10 AOP_FUNC_21
5 11 13 15 18 21 23 25 36 41 43
45 46 47 48 50
NC
NC
AT18 AOP_FUNC_22 R1622 1 R1623 1
43 OUT
AOP_TO_MESA_BLANKING_EN AW14 AOP_FUNC_23 1.00K 1.00K
5% 5%
38 36 5 IN
I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK_R AV18 AOP_FUNC_24 1/32W 1/32W
#30638490: Route U1000/U5000 ASP1 BCLK, LRCLK with _R MF MF
38 36 I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK_R BA12 AOP_FUNC_25 01005 01005 2
ROOM=SOC 2
IN
ROOM=SOC
39 38 37 36 IN
I2S_CODEC_ASP1_TO_AOP_AMPS_DIN AY14 AOP_FUNC_26
I2C1_AOP_SCL OUT 37 39 43
I2C1_AOP_SDA BI 37 39 43
SPI_AOP_TO_IMU_SCLK_R AV8
27 5 OUT AOP_SPI_SCLK
1%
1/32W
MF 50 IN
UART_BB_TO_AOP_RXD AT14 AOP_UART0_RXD DOCK_ATTENTION BA17 HYDRA_TO_NUB_INT IN 47
01005
ROOM=SOC 50 OUT
UART_AOP_TO_BB_TXD AY8 AOP_UART0_TXD AY19 HYDRA_TO_NUB_DOCK_CONNECT
DOCK_CONNECT IN 47
50 OUT
AOP_TO_WLAN_CONTEXT_A BA8 AOP_UART1_RXD
50 OUT
AOP_TO_WLAN_CONTEXT_B AW8 AOP_UART1_TXD
42 IN
TOUCH_TO_AOP_GPO AU11 AOP_UART2_RXD
42 OUT
AOP_TO_TOUCH_PROX_STATE AT15 AOP_UART2_TXD
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
SOC: AOP
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
C1772
ROOM=SOC
C1773 AC9 U12
ROOM=SOC
C1791
ROOM=SOC
C1792
ROOM=SOC
C1793
1 C1794 AJ16 T25
VDD_CPU_SRAM VDD_ECPU 4.7UF AJ18 T27
15UF 15UF AC14 V13 15UF 15UF 15UF 20%
20% 20% 20% 20% 20% 2 4V AJ22 U16
4V 4V AE20 V15 4V 4V 4V CER-X5R
0201 AJ24 U18
B X5R
0402-D2X-1
1
X5R
0402-D2X-1
3
AF14
U14
Y13
Y15 1
X5R
0402-D2X-1
3 1
X5R
0402-D2X-1
3
X5R
0402-D2X-1
1 3
ROOM=SOC
AJ28 U22 B
1 3 AK13 U24
1.06V @ 1.1A MAX 2 4 21 5 OUT
AP_CPU_PCORE_SENSE AH21 VDD_CPU_SENSE 2 4 2 4 2 4 AK15 U28
2 4 AK19 U30
0.80V @ 0.63A MAX
0.675V @ 0.19A MAX AK21 V19
AK25 V21
PP_GPU_SRAM N26
18
AK27 V25
H13
ROOM=SOC ROOM=SOC 0.8V @ 6mA MAX AL12 V27
C1781 C1782 H17
VDD_FIXED_CPU W14 PP0V8_SOC_FIXED_S1 AL16 W18
15UF 15UF H21 7 8 9 10 14 15 18
F22
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
AL26
AB3 PP1V8_S2
AM11 5 11 13 15 18 21 23 25 36
41 43 45 46 47 48 50
AB37
AM23 VDD_FIXED
D39 AW3
1 C1840 1 C1841 1 C1842 1 C1843
AP11 4.7UF 4.7UF 4.7UF 4.7UF
F39 AW37 20% 20% 20% 20%
AP21 2 4V 2 4V 2 4V 2 4V
K31 VDD1 B3 CER-X5R CER-X5R CER-X5R CER-X5R
AP24 0201
ROOM=SOC 0201
ROOM=SOC 0201
ROOM=SOC 0201
ROOM=SOC
P31 B37
F19 VDDQL_DDR3
P39 Y3
F23
T39 Y37
M11
V39
M17 AA2
N14 AA38
N20 1.06V - 1.17V @ (inc in VDD2) AC39
P11 AH39
PP1V1_S2 AR6 VDDIO11_RET_DDR0
P17 20 18 15
AJ1
AN34 VDDIO11_RET_DDR1
P29 AK39
E6 VDDIO11_RET_DDR2
R14 AM1
G34 VDDIO11_RET_DDR3
R20 1.2V @ 16mA MAX AN39
R26 AP1
PP1V2_SOC AJ11 VDDIO12_PLL_DDR0 1.06V - 1.17V @ 2.2A MAX
T11 20 14 10 8
AV2
AK29 VDDIO12_PLL_DDR1
T17 0.875V @ 0.8A MAX AV37
D9 VDDIO12_PLL_DDR2 PP1V1_S2
B T23 AW2
B
15 18 20
0.730V @ 0.51A MAX VDD2
T29
T31 0.600V @ 0.35A MAX
VDDIO12_PLL_DDR3 AW38 1 C1850 1 C1851 1 C1852 1 C1853
U20 C2 4.7UF 4.7UF 4.7UF 4.7UF
20% 20% 20% 20%
U26 18
PP_DCS_S1 AJ10 C3 2 4V
CER-X5R 2 4V
CER-X5R 2 4V
CER-X5R 2 4V
CER-X5R
AP10 VDD_DCS_DDR0 C38 0201 0201 0201 0201
1 C1860 1 C1861 1 C1862 1 C1863 D38 ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
4.7UF 4.7UF 4.7UF 4.7UF AE30 H39
20% 20% 20% 20%
2 4V
CER-X5R 2 4V
CER-X5R 2 4V
CER-X5R 2 4V
CER-X5R AK30 VDD_DCS_DDR1 J1
0201 0201 0201 0201 K39
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
F10 M1
Place one cap per SoC corner L10 N39
VDD_DCS_DDR2
5 OUT
TP_VDD_DCS_SENSE A4 P1
W1
K30
R30 VDD_DCS_DDR3
PAGE TITLE
D23 VDDIO18_GRP3 VDD18_TSADC_SOC2 J31
D A2 U1000
TMIT78B1-C5
AE31 AL35 U1000
TMIT78B1-C5
AU3 C1 U1000
TMIT78B1-C5
G3 M2 U1000
TMIT78B1-C5
U23 D
A3 AE34 AL36 AU4 C5 G6 M5 U25
WLCSP WLCSP WLCSP WLCSP
A5 AE39 AL39 AU5 C6 G11 M6 U27
A11 SYM 13 OF 16 AF6 AM2 SYM 14 OF 16 AU6 C7 SYM 15 OF 16 G15 M22 SYM 16 OF 16 U29
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
A18 AF15 AM6 AU9 C8 G17 M24 U31
A27 AF22 AM12 AU31 C9 G19 M28 U34
A29 AF24 AM14 AU33 C10 G23 M34 U39
A31 AF26 AM16 AU34 C11 G25 M36 V6
A33 AF28 AM18 AU35 C12 G31 M38 V14
A35 AF30 AM20 AU36 C13 G36 M39 V16
A36 AF35 AM22 AU37 C14 G37 N1 V18
A37 AF37 AM24 AU38 C15 G38 N2 V20
A38 AG1 AM26 AU39 C16 G39 N3 V22
A39 AG6 AM28 AV3 C17 H2 N4 V24
AA1 AG14 AM30 AV4 C18 H4 N5 V26
AA6 AG20 AM36 AV24 C19 H5 N6 V28
AA11 AG23 AM37 AV26 C20 H14 N9 V30
AA13 AG25 AM38 AV28 C21 H16 N11 V35
AA15 AG27 AM39 AV30 C22 H18 N13 V37
AA17 AG29 AN1 AV32 C23 H20 N15 W2
AA19 AG34 AN2 AV34 C24 H22 N17 W3
AA21 AG39 AN3 AV36 C25 H24 N19 W6
AA23 AH3 AN4 AV38 C26 H26 N21 W9
AA25 AH5 AN5 AW1 C27 H30 N25 W13
AA27 AH9 AN6 AW4 C29 H36 N27 W15
AA29 AH11 AN11 AW24 C31 H37 N34 W17
AA31 AH13 AN17 AW28 C33 H38 P3 W19
C AA34 AH15 AN21 AW30 C35 J2 P5 W21 C
AA36 AH17 AN23 AW32 C36 J3 P10 W23
AA39 AH19 AN25 AW34 C37 J6 P12 W25
AB1 AH22 AN29 AW36 C39 J11 P14 W27
AB5 AH24 AN31 AW39 D10 J17 P16 W29
AB10 AH26 AN36 AY1 D14 J19 P18 W31
AB12 AH28 AN37 AY2 D2 J21 P20 W34
AB14 AH35 AN38 AY3 D3 J23 P22 W37
AB16 AH37 AP2 AY5 D4 J25 P26 W38
AB20 AJ13 AP3 AY7 D5 J27 P28 W39
AB22 VSS VSS AJ15 AP4 VSS VSS AY9 D6 VSS VSS J29 P30 VSS Y1
AB24 AJ17 AP12 AY12 D7 J34 P35 Y5
AB26 AJ19 AP16 AY15 D22 J35 P37 Y14
AB28 AJ21 AP18 AY18 D24 J36 R1 Y18
AB30 AJ23 AP20 AY21 D25 J37 R6 Y20
AB35 AJ25 AP22 AY23 D26 J38 R11 Y22
AB39 AJ27 AP28 AY25 D27 J39 R13 Y24
AC1 AJ34 AP34 AY27 D34 K1 R15 Y26
AC3 AJ35 AP35 AY28 D35 K2 R17 Y28
AC6 AJ39 AP36 AY29 D36 K5 R19 Y30
AC15 AK1 AP37 AY31 D37 K6 R21 Y35
AC21 AK2 AP38 AY33 E1 K10 R23 Y39
AC23 AK6 AR1 AY35 E2 K12 R25
VSS_CPU_SENSE AG21 TP_VSS_CPU_SENSE
AC25 AK10 AR2 AY37 E34 K16 R27 OUT 5
AC27 AK12 AR3 AY38 E35 K18 R31 VSS_SENSE P24 TP_VSS_SENSE OUT 5
AC29 AK14 AR4 AY39 E36 K20 R34
B AC31 AK16 AR37 B1 E37 K22 R39 B
AC34 AK18 AR38 B2 E38 K24 T6
AC35 AK20 AR39 B4 TP_DDR_VSS_SENSE OUT 5
E39 K28 T10
AD4 AK22 AT2 B5 F12 K35 T14
AD6 AK24 AT3 B11 F14 K37 T16
AD14 AK26 AT4 B18 F18 L1 T18
AD20 AK28 AT5 B27 F2 L2 T20
AD22 AK34 AT28 B35 F3 L3 T22
AD24 AK35 AT29 B36 F4 L6 T24
AD26 AK36 AT31 B38 F5 L9 T26
AD28 AL1 AT32 B39 F6 L11 T28
AD34 AL3 AT33 BA1 F20 L17 T30
AD35 AL5 AT37 BA2 F24 L23 T34
AD37 AL11 AT38 BA3 F26 L29 T36
AE1 AL13 AU1 BA5 F30 L34 T38
AE3 AL15 AU2 BA7 F34 L38 U1
AE5 AL17 AU12 BA23 F35 L39 U3
AE9 AL19 AU15 BA25 F36 M10 U5
AE15 AL21 AU18 BA26 F37 M12 U9
AE21 AL23 AU21 BA29 F38 M14 U11
AE23 AL25 AU24 BA31 G1 M16 U13
AE25 AL27 AU25 BA33 M18 U15
AE27 AL29 AU26 BA35 U17
AL31 AU27 BA37 U19
BA38
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
391mA MAX
29 28 18 17 15 11 9 8 7 6
PP1V8_IO
42 40 33 31 30
1 C2626 1 C2610
4.7UF 0.1UF
20% 20%
2 4V
CER-X5R 2 6.3V
X5R-CERM
0201 01005
ROOM=NAND ROOM=NAND
D D
1 C2629 1 C2630
18UF 18UF
20% 20%
2 6.3V
CER-X5R 2 6.3V
CER-X5R
0402-0.1MM 0402-0.1MM
ROOM=NAND ROOM=NAND
932mA MAX
20
PP0V9_NAND
1 C2602 1 C2605
22UF 22UF
20% 20%
2 4V
X5R 2 4V
X5R
C 0402-0.1MM
ROOM=NAND
0402-0.1MM
ROOM=NAND
1300mA MAX (1us peak power) C
PP3V0_NAND 20
1 C2603 1 C2606 1 C2609 1 C2614 1 C2620 1 C2628 1 C2649 1 C2650 1 C2651 1 C2652
22PF 68PF 100PF 47PF 220PF 220PF 3.9UF 3.9UF 3.9UF 3.9UF
5% 5% 5% 5% 5% 5% 20% 20% 20% 20%
2 16V
CERM 2 16V
NP0-C0G 2 16V
NP0-C0G 2 16V
CERM 2 10V
C0G-CERM 2 10V
C0G-CERM 2 6.3V
CER-X5R 2 6.3V
CER-X5R 2 6.3V
CER-X5R 2 6.3V
CER-X5R
01005 01005 01005 01005 01005 01005 0201 0201 0201 0201
ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
ANI0_VREF G12
E10
E12
L12
PCI_AVDD_CLK_2 M9
G6
G8
G4
PCI_AVDD_CLK_1 N6
PCI_VDD_1 N8
R6
R8
N2
D3
R2
VDD_PLL R4
E2
K9
P9
T5
VPP F3
AVDD18_PLL L2
L6
L8
PCI_AVDD_H J6
PCI_VDD_2 J8
ANI1_VREF J4
J2
B B
VDD
VDDIO
VCC
U2600
H23Q2T8QK6MES-BC
11 IN
AP_TO_NAND_SYS_CLK M3 CLK_IN LGA EXT_D0/BOOT0 B3 PMU_TO_NAND_LOW_BATT_BOOT_L IN 21
EXT_D1/BOOT1 C4 AP_TO_NAND_FW_STRAP
90_PCIE_AP_TO_NAND_REFCLK_P K11 PCIE_REFCLK_P BOMOPTION=OMIT_TABLE IN 7
8 5 IN
CRITICAL EXT_D2/BOOT2/SPINAND_SCLK B5 SPI_AP_TO_S4E_SCLK_BOOT_CONFIG0
90_PCIE_AP_TO_NAND_REFCLK_N J12 PCIE_REFCLK_M IN 6 11
8 5 IN
EXT_D3/SWD_UID0/SPINAND_MISO C6 SPI_S4E_TO_AP_MISO_BOOT_CONFIG2 OUT 5 6 11
8 BI
PCIE_NAND_BI_AP_CLKREQ_L P5 PCIE_CLKREQ_N EXT_D4/UART_RX B7
NC
EXT_D5/SWD_UID1/SPINAND_MOSI C8 SPI_AP_TO_S4E_MOSI_BOOT_CONFIG1
PCIE_NAND_RESREF H7 PCI_RESREF B9
IN 6 11
EXT_D6/UART_TX NC
1
R2604 8 IN
90_PCIE_AP_TO_NAND_TXD_P M11 PCIE_RX0_P EXT_D7/SPF B11 SYSTEM_ALIVE IN 15 21 24
EXT_CLE/JTAG_TDI D5 NC
EXT_ALE/JTAG_SEL D9
DROOP_N T3
AP_TO_NAND_RESET_L L4 RESET* PP1V8_IO
7 IN
WP_N G2 PP1V8_IO 6 7 8 9 11 15 17 18 28 29 30 31
A A
33 40 42
G10 TRST* MAKE_BASE=TRUE
SYNC_MASTER=sync SYNC_DATE=04/14/2017
NAND
ZQ_C
NAND_ZQ_N C10 ZQ_N
MISS_P_DIFFPAIR
R2600 R2601
DRAWING NUMBER SIZE
1 1
100 300 051-02159 D
0.1% 0.1% Apple Inc. REVISION
1/32W
MF
01005
1/32
MF
01005
VSS 10.0.0
2ROOM=NAND 2ROOM=NAND NOTICE OF PROPRIETARY PROPERTY: BRANCH
A2
A4
A6
A8
A10
A12
B1
B13
C2
C12
D1
D11
D13
F1
F5
F7
F9
F11
F13
H1
H3
H5
H9
H11
H13
J10
K1
K5
K7
K13
L10
M1
M5
M7
M13
N4
N10
P1
P3
P7
P11
P13
R10
T1
T7
T9
T13
U2
U4
U6
U8
U10
U12
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
26 OF 80
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 17 OF 81
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
0.47UH-20%-3.3A-0.053OHM
13.8A MAX
N17 PIWA2012FE-SM
BUCK0
ROOM=PMU
1 2 BUCK4_LX1 V9 BUCK0_LX1 N18 CRITICAL
D
#29079575: Add 22uF cap to BUCK2 and BUCK4 W9
PIWA2012FE-SM BUCK4_LX1
D ROOM=PMU
CRITICAL Y9 L2702 1 C2706
0.1UH-20%-6.1A-0.031OHM 22UF
OMIT 20%
R16 BUCK0_LX2 1 2 2 4V
XW2740
SHORT-20L-0.05MM-SM
R17 PINA1608-SM
X5R
0402-0.1MM
BUCK0_LX2 ROOM=PMU
2 1 BUCK4_FB T8 BUCK4_FB R18 CRITICAL
ROOM=PMU
ROOM=PMU
L2703
L2750 0.1UH-20%-6.1A-0.031OHM
1UH-20%-2.5A-0.052OHM U16 BUCK0_LX3 2 1
15 14 10 9 8 7
PP0V8_SOC_FIXED_S1 2 1 BUCK5_LX0 V3 BUCK0_LX3 U17 PINA1608-SM
ROOM=PMU
VOLTAGE=0.8V PIWA20160H-SM W3 U18 CRITICAL
1 C2752 1 C2751 1 C2750 ROOM=PMU
CRITICAL Y3
BUCK5_LX0
22UF 22UF 220PF
1.7A MAX
BUCK5
20% 20% 5%
2 4V
X5R 2 4V
X5R 2 10V
C0G-CERM OMIT
0402-0.1MM
ROOM=PMU
0402-0.1MM
ROOM=PMU
01005
ROOM=PMU XW2750
SHORT-20L-0.05MM-SM BUCK0_FB R13 BUCK0_FB IN 14
2 1 BUCK5_FB T4 BUCK5_FB
ROOM=PMU
L2710 0.67V - 0.92V
L2760 1UH-20%-3.6A-0.062OHM 1.03V for overdrive only
1UH-20%-2.4A-0.06OHM A15 BUCK1_LX0 1 2 PP_GPU 14
PP1V25_S2 2 1 BUCK6_LX0 H1 BUCK1_LX0 B15 0806
28 20
PIWA2016FE-SM H2 BUCK6_LX0 ROOM=PMU 1 C2710 1 C2711 1 C2712 1 C2713 1 C2714 1 C2715 VOLTAGE=1.03V
1.2A MAX
CRITICAL
VOLTAGE=1.25V
C2762 C2761 C2760 220PF 22UF 22UF 22UF 22UF 22UF
BUCK6
1 1 1 ROOM=PMU
L2711
13.8A MAX
CRITICAL 5% 20% 20% 20% 20% 20%
22UF 22UF 220PF OMIT 0.47UH-20%-3.8A-0.055OHM 2 10V 2 4V 2 4V 2 4V 2 4V 2 4V
BUCK1
20% 20% 5% C0G-CERM X5R X5R X5R X5R X5R
2 4V
X5R 2 4V
X5R 2 10V
C0G-CERM XW2760
SHORT-20L-0.05MM-SM
A13 BUCK1_LX1 2 1
01005
ROOM=PMU
0402-0.1MM
ROOM=PMU
0402-0.1MM
ROOM=PMU
0402-0.1MM
ROOM=PMU
0402-0.1MM
ROOM=PMU
0402-0.1MM
ROOM=PMU
0402-0.1MM 0402-0.1MM 01005
ROOM=PMU ROOM=PMU ROOM=PMU 2 1 BUCK6_FB H4 BUCK6_FB BUCK1_LX1
B13 PIWA2012FE-SM
C
ROOM=PMU
C ROOM=PMU C13 CRITICAL
CRITICAL CRITICAL
22UF 22UF 220PF
20% 20% 5%
2 4V 2 4V 2 10V OMIT
X5R X5R C0G-CERM
0402-0.1MM
ROOM=PMU
0402-0.1MM
ROOM=PMU
01005
ROOM=PMU XW2770
SHORT-20L-0.05MM-SM
2 1 BUCK7_FB W14 BUCK7_FB A9
NC
ROOM=PMU BUCK1_LX3 B9
NC #30278265: Remove 4th phase on GPU buck
C9
NC
0.80V - 0.92V L2780
1UH-20%-2.1A-0.1OHM
14
PP_GPU_SRAM 2 1 BUCK8_LX0 A17
VOLTAGE=1.06V PIWA2012FE-SM B17 BUCK8_LX0 F15 BUCK1_FB
1 C2782 1 C2781 1 C2780 ROOM=PMU
BUCK1_FB IN 5 14
2.1A MAX
4.9A MAX
14
BUCK2
W5 PIWA20160H-SM
L2790
BUCK2_LX0
Y5
ROOM=PMU
CRITICAL
1 C2720 1 C2721 1 C2722 1 C2723 1 C2724 VOLTAGE=0.8V
1UH-20%-2.1A-0.1OHM 220PF 22UF 22UF 22UF 22UF
5% 20% 20% 20% 20%
2 10V 2 4V 2 4V 4V 2 4V
15
PP_DCS_S1 2 1 BUCK9_LX A6 L2721 C0G-CERM
01005
X5R
0402-0.1MM
X5R
0402-0.1MM
2 X5R
0402-0.1MM
X5R
0402-0.1MM
0.47UH-20%-3.3A-0.053OHM
B VOLTAGE=0.875V 1 C2792 1 C2791 1 C2790
PIWA2012FE-SM
ROOM=PMU
B6 BUCK9_LX0
V7 BUCK2_LX1
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
B
BUCK9
2 1
1.2A MAX
BUCK2_FB T7 BUCK2_FB IN 14
L2730
1UH-20%-2.4A-0.06OHM
F1 BUCK3_LX0 1 2 PP1V8_S2 5 11 13 15 21 23 25 36
BUCK3_LX0 F2 PIWA2016FE-SM
41 43 45 46 47 48 50
1.7A MAX
BUCK3
ROOM=PMU 1 1 1 VOLTAGE=1.8V
CRITICAL
OMIT 220PF 22UF 22UF
5% 20% 20%
XW2730
SHORT-20L-0.05MM-SM
2 10V
C0G-CERM 2 4V
X5R 2 4V
X5R
01005 0402-0.1MM 0402-0.1MM
BUCK3_FB G4 BUCK3_FB 1 2 ROOM=PMU ROOM=PMU ROOM=PMU
ROOM=PMU
C1
VBUCK3_SW C2
B2
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
D D
U2700 L2800
D2422B0 1UH-20%-2.1A-0.1OHM
WLCSP
20 IN
VDD_MAIN_SNS P7 VDD_MAIN_SNS SYM 3 OF 5
A4 BUCK10_LX 1 2 PP0V6_VDDQL_S1 15
ROOM=PMU BUCK10_LX0 B4
1.2A MAX
PIWA2012FE-SM VOLTAGE=0.875V
PP_VDD_MAIN C2800 C2801 C2802
BUCK10
39 38 37 32 28 25 24 22 20 5
E5 VDD_MAIN_1 ROOM=PMU 1 1 1
50 48 47 45 44 42 41 40
K5 VDD_MAIN_2
CRITICAL
220PF 22UF 22UF
5% 20% 20%
1 C2850 1 C2851 1 C2852 1 C2853 R7 VDD_MAIN_3 OMIT 2 10V
C0G-CERM 2 4V
X5R 2 4V
X5R
18UF 2.2UF 2.2UF 18UF XW2800
BAT/USB
U14 VDD_MAIN_4 01005 0402-0.1MM 0402-0.1MM
20% 20% 20% 20% ROOM=PMU ROOM=PMU ROOM=PMU
L14 SHORT-20L-0.05MM-SM
2 6.3V 2 6.3V 2 6.3V 2 6.3V VDD_MAIN_5
CER-X5R
0402-0.1MM
X5R-CERM
0201
X5R-CERM
0201
CER-X5R
0402-0.1MM F14 BUCK10_FB E4 BUCK10_FB 2 1
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU VDD_MAIN_6
OMIT_TABLE OMIT_TABLE ROOM=PMU
M15
M16 L2810
1 C2854 1 C2855 1 C2856 1 C2857 1 C2858 1UH-20%-3.2A-0.06OHM
M17 VDD_BUCK0_01
2.2UF 2.2UF 2.2UF 2.2UF 2.2UF G17 BUCK11_LX0 1 2 PP_CPU_ECORE
20% 20% 20% 20% 20% M18 BUCK11_LX0
14
3.0A MAX
T16 2 10V 2 4V 2 4V
L2811
BUCK11
VDD_BUCK0_23 C0G-CERM X5R X5R 2 4V
X5R
T17 01005 0402-0.1MM 0402-0.1MM
0.47UH-20%-3.3A-0.053OHM ROOM=PMU ROOM=PMU ROOM=PMU
0402-0.1MM
ROOM=PMU
T18
J17 BUCK11_LX1 2 1
1 C2859 1 C2860 1 C2862 1 C2863 BUCK11_LX1 J18 PIWA2012FE-SM
2.2UF 2.2UF 2.2UF 2.2UF A14 ROOM=PMU
20% 20% 20% 20% CRITICAL
2 6.3V 2 6.3V 2 6.3V 6.3V
2 X5R-CERM B14
X5R-CERM X5R-CERM X5R-CERM
C 0201
ROOM=PMU
0201
ROOM=PMU
0201
ROOM=PMU
0201
ROOM=PMU
C14
D14
VDD_BUCK1_01 C
OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE
B10
1 C2864 1 C2865 1 C2866 1 C2868 C10 VDD_BUCK1_23
2.2UF 2.2UF 2.2UF 2.2UF D10
20% 20% 20% 20%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
0201 0201 0201 0201 V6
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU W6
OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE VDD_BUCK2
Y6
BUCK INPUT
E1
1 C2870 1 C2871 1 C2872 E2 VDD_BUCK3
2.2UF 2.2UF 2.2UF
20% 20% 20% V10
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
0201 0201 0201 W10 VDD_BUCK4
ROOM=PMU ROOM=PMU ROOM=PMU Y10
OMIT_TABLE OMIT_TABLE OMIT_TABLE
V2
W2
1 C2874 1 C2875 1 C2876 Y2
VDD_BUCK5
2.2UF 2.2UF 2.2UF
20% 20% 20%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM J1
0201 0201 0201 J2 VDD_BUCK6
ROOM=PMU ROOM=PMU ROOM=PMU
OMIT_TABLE OMIT_TABLE OMIT_TABLE
B Y15
Y16
B
VDD_BUCK7
Y17
B18
C18 VDD_BUCK8
A7
B7 VDD_BUCK9
A3
B3 VDD_BUCK10
H17
H18 VDD_BUCK11
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
38 37 32 28 25 24 22 20 19 5
50 48 47 45 44 42 41 40 39
PP_VDD_MAIN
XW2990
OMIT 1 C2990 1 C2992
SHORT-20L-0.05MM-SM
18UF 18UF
20% 20%
19 OUT VDD_MAIN_SNS 2 1 2 6.3V
CER-X5R 2 6.3V
CER-X5R
ROOM=PMU
0402-0.1MM 0402-0.1MM
ROOM=PMU ROOM=PMU
D OMIT D
XW2991
SHORT-20L-0.05MM-SM
21 OUT PMU_PRE_UVLO_DET 2 1
ROOM=PMU
U2700
D2422B0
WLCSP
38 37 32 28 25 24 22 20 19 5
PP_VDD_MAIN K4 VDD_LDO0 SYM 1 OF 5 VLDO0 K3 VOLTAGE=2.5V PP2V5_LDO0_S2 20
50 48 47 45 44 42 41 40 39
50 43 41 36 28 22 20
PP_VDD_BOOST N4 VDD_LDO1
ROOM=PMU
VLDO1 N3 VOLTAGE=3.3V PP3V3_USB 7 LDO1
M4 VDD_LDO2 VLDO2 M3 VOLTAGE=1.8V PP1V8_AUDIO_VA_S2 36 37 38 39 LDO2
18 15
PP1V1_S2 R5 VDD_LDO3 VLDO3 P5 VOLTAGE=3.0V PP3V0_CONVOY 33 LDO3
PP_VDD_BOOST N1 N2 VOLTAGE=0.7V PP0V7_VDD_LOW_S2 LDO4
C2980 C2981
50 43 41 36 28 22 20
1 1 VDD_LDO4 VLDO4 14
VOLTAGE=3.0V PP3V0_NAND
XW2995
OMIT 1 C2970 1 C2971 2.2UF 2.2UF
V1
W1
VDD_LDO5 VLDO5 U1 17 LDO5
SHORT-20L-0.05MM-SM
2.2UF 2.2UF 20%
6.3V 2
20%
6.3V 2 VDD_LDO5
20% 20% X5R-CERM X5R-CERM L1 VLDO6 L2 VOLTAGE=3.3V PP_ACC_VAR LDO6
21 OUT PMU_LDO5_UVLO_DET 2 1 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 0201 0201 VDD_LDO6 45 47
LDO INPUT
OMIT_TABLE OMIT_TABLE M1 VDD_LDO7 VLDO7 M2 VOLTAGE=3.0V PP3V0_S2 5 33 44 46 47 48 50 LDO7
R2 VDD_LDO8 VLDO8 P2 VOLTAGE=0.9V PP0V9_NAND 17 LDO8
M6 VDD_LDO9 VLDO9 N6 VOLTAGE=1.8V PP1V8_ALWAYS 21 24 LDO9
R6 VDD_LDO10
28 18
PP1V25_S2 R4 VDD_LDO11
L4 VDD_LDO12 VLDO10 P6 VOLTAGE=3.0V PP3V0_MESA_S2 43 LDO10
R3 VDD_LDO13 VLDO11 P4 VOLTAGE=1.2V PP1V2_SOC 8 10 14 15 LDO11
C T1 VDD_LDO14 VLDO12 L3 VOLTAGE=1.8V PP1V8_MESA_S2 LDO12 C
LDO
43
D2422B0
WLCSP E14 VPP_OTP
A1 SYM 5 OF 5 K17
A12 ROOM=PMU K18
A16 L16
A18 L6
A5 M7 VBUF_1V2 N5 VOLTAGE=1.2V PP1V2_LPADC 15 VBUF_1V2
A8 M11 T14 TP_DET
NC
B12 N7
B16 N15 1 C2901 1 C2906 1 C2909 1 C2911 1 C2913
B5 N8 VPUMP D3 PMU_VPUMP 2.2UF 2.2UF 1.0UF 2.2UF 2.2UF
20% 20% 20% 20% 20%
B8 N9 6.3V
2 X5R-CERM 2 6.3V 2 6.3V 2 6.3V 2 6.3V
X5R-CERM X5R X5R-CERM X5R-CERM
C12 P10 0201 0201 0201-1 0201 0201
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
C15 P11 OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE
C16 P15 CRITICAL
C17 P16 1 C2920 1 C2900 1 C2903 1 C2907 1 C2910 1 C2912 1 C2915
C3 P17 47NF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 0.22UF
20% 20% 20% 20% 20% 20% 20%
C4 P18 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R
C5 P8 01005 0201 0201 0201 0201 0201 01005
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
C6 P9 OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE
C7 R15
C8 R8
VPUMP: 10nF min @4.6V
B D11
D12
T3
T5
PMU_VSS_RTC 21
B
D13 T6
D15 T9
D16 U10
D17 VSS VSS U11
D18 U12
D8 U15
D9 U3
E11 U4
E12 U5
E13 U6
E18 U7
E3 U8
F16 U9
F17 V12
F18 V15
F3 V16
F5 V17
G1 V18
G15 V4
G16 V8
G2 N12
G3 W12
G5 W15
H16 W4
A H3
H5
W8
Y1 SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
J13
J14
Y12
Y13 SYSTEM POWER: PMU LDOs (3/4)
J16 DRAWING NUMBER SIZE
Y14
051-02159 D
J5
K14
Y18
Y4
Apple Inc. REVISION
K16 Y8 10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
1
R3061 1
R3062
100K 100K
5% 5%
1/32W 1/32W
D 2
MF
01005
ROOM=PMU
MF
2 01005
ROOM=PMU
D
SYSTEM_ALIVE 15 17 21 24 R3010
PMU_TO_SYSTEM_COLD_RESET_L 7 21 1
200K 2
U2700 1%
1/20W
D2422B0 MF
WLCSP 201
ROOM=PMU
AP_TO_PMU_WDOG_RESET P13
RESET_IN1 SYM 4 OF 5
PMU_IREF
C3010
7
IREF R10
IN ROOM=PMU
#28476673:1000PF CAP ON ANSEL AMUX 47 HYDRA_TO_PMU_HOST_RESET P12
RESET_IN2
IN
AP_TO_PMU_SOCHOT_L N13 0.22UF
Chestnut / Ansel AMUX PMU_VREF
RESET_IN3
RESETS
7 5
VREF R9 1 2
IN
REFS
21 7 OUT PMU_TO_SYSTEM_COLD_RESET_L R12
RESET*
H15 SHDN 20%
NC 6.3V
CHESTNUT_TO_PMU_AMUX X5R
21 41
#29404057:Damping R for ACTIVE_RDY 0201
CAMPMU_TO_PMU_AMUX 21 29
ROOM=PMU
COMPARATOR
24 21 17 15 OUT OUT 7
50 42 29 22 13 IN
DISPLAY_TO_MANY_BSYNC M13 FORCE_SYNC VDROOP11 L15 PMU_TO_AP_THROTTLE_ECORE_L OUT 7
#29300440:Connect PMU crash to SoC
NTCs #29300440:Connection Not Needed L12 DBL_CLICK_DET
NC VDROOP0_DET R14 AP_CPU_PCORE_SENSE
PMU_TO_AOP_IRQ_L N14 IRQ* IN 5 14
13 OUT
VDROOP1_DET E15 AP_VDD_GPU_SENSE IN 5 14
I2C0_AP_SDA L8 SDA
45 41 11 BI
PRE_UVLO_DET L13 PMU_PRE_UVLO_DET
SPMI_PMGR_TO_PMU_SCLK K7 SCLK
IN 20
11
LDO5_UVLO_DET U2 PMU_LDO5_UVLO_DET
C
IN
C 1
FOREHEAD_NTC
OMIT 11 5 BI
SPMI_PMU_BI_PMGR_SDATA L7 SDATA
IN 20
C3041 1
R3041 21
XW3041 IBAT T11
100PF SHORT-20L-0.05MM-SM
T10
NC
5%
16V
10KOHM-1% FOREHEAD_NTC_RETURN 1 2 VBAT NC
NP0-C0G 2 N11 HYDRA_TO_PMU_USB_BRICK_ID
ADC
01005 BRICK_ID1 IN 21 47
01005 ROOM=PMU
ROOM=PMU 2 ROOM=NEO
7 IN
AP_TO_PMU_AMUX_OUT D4 AMUX_A0 BRICK_ID2 N10
NC
21
PMU_ADC_IN D5 AMUX_A1 ADC_IN R11 PMU_ADC_IN 21
29 21 IN
CAMPMU_TO_PMU_AMUX D6 AMUX_A2
AP_TO_PMU_AMUX_SYNC D7 AMUX_A3
12 IN
F9 BUTTON1 G14 BUTTON_VOL_DOWN_L IN 34
AMUX_A4
NC BUTTON2 H14 BUTTON_POWER_KEY_L
REAR CAMERA NTC HYDRA_TO_PMU_USB_BRICK_ID F10 AMUX_A5
IN 34
47 21 IN
BUTTON3 F13 BUTTON_VOL_UP_L
DISPLAY_TO_CHESTNUT_PWR_EN
BUTTONS
E6 AMUX_A6
IN 34
BUTTON_RINGER_A
AMUX
42 41 IN
BUTTON4 G13
1 45 IN
ACC_BUCK_TO_PMU_AMUX E7 AMUX_A7
IN 34
OMIT 5
PMU_AMUX_AY E8 AMUX_AY BUTTONO1 K6 PMU_TO_AP_BUTTON_VOL_DOWN_L 12
XW3042
OUT OUT
BUTTONO3 J6 NC
25
100PF 10KOHM-1% RCAM_NTC_RETURN 1 2
IN
5%
16V 01005 R3011 1 NC
G7 AMUX_B1
NP0-C0G 2 ROOM=PMU 200K NC
G8 AMUX_B2
01005 2 ROOM=B2B_WIDE_RCAM
1%
ROOM=PMU #25244799:200K pull-down 1/32W 7 5 IN
AP_TO_PMU_TEST_CLKOUT F7 AMUX_B3 GPIO1 F11 PMU_TO_NFC_EN OUT 50
MF
01005 2 50 21 IN
PMU_TO_WLAN_CLK32K E9 AMUX_B4 GPIO2 F12 PMU_TO_AP_THROTTLE_GPU1_L OUT 5 7
ROOM=PMU
NC
E10 AMUX_B5 GPIO3 G9 TIGRIS_TO_PMU_INT_L IN 24
41 21 IN
CHESTNUT_TO_PMU_AMUX F8 AMUX_B6 GPIO4 G10 WLAN_TO_PMU_HOST_WAKE IN 50
NC
H7 AMUX_B7 GPIO5 G11 NFC_TO_PMU_HOST_WAKE IN 50
#25244799:CHESTNUT AMUX AND PWR_EN ON SAME CHANNEL 5 OUT PMU_AMUX_BY H8 AMUX_BY GPIO6 G12
NC
RADIO PA NTC #28748132:CHESTNUT AMUX AND PWR_EN SWAP BETWEEN A6/B6 GPIO7 H9 PMU_TO_GNSS_EN OUT
21
FOREHEAD_NTC T12 TDEV1 GPIO8 H10
NC
1
21
REAR_CAMERA_NTC T13 TDEV2 GPIO9 H11 PMU_TO_BT_REG_ON OUT 50
RADIO_PA_NTC
B C3043 R3043 XW3043
OMIT 21
U13 TDEV3 GPIO10 H12 BT_TO_PMU_HOST_WAKE IN 50
B
GPIO
NTC
1 RADIO_PA_NTC 21 21
AP_NTC V13 TDEV4 GPIO11 J8 CODEC_TO_PMU_WAKE_L 36
100PF 10KOHM-1% SHORT-20L-0.05MM-SM
CHARGER_NTC J9
IN
5%
16V
PA_NTC_RETURN 1 2 40 21
W13 TDEV5 GPIO12 NC
01005 PMU_TCAL V14 J10
NP0-C0G 2
01005 2 ROOM=RADIO_PAD
ROOM=PMU TCAL GPIO13
J11
NC
PMU_TO_WLAN_REG_ON R3071
C3020 GPIO14 20.0K 2
R3020
50
ROOM=PMU
1 1 OUT
PMU_HYDRA_TO_AP_FORCE_DFU
100PF #25244799:OTP-AJ Connects XTAL1 to GND
R1 XTAL1 GPIO15 J12 PMU_TO_BB_USB_VBUS_DETECT 1 5 12 47
3.92K PMU_XTAL2
OUT 50
XTAL
5% P1 XTAL2 K8 1/32W
16V 0.1% GPIO16 NC 01005
2 NP0-C0G 1/20W
01005 MF GPIO17 K9 PMU_TO_AP_FORCE_DFU_R 5% MF
ROOM=PMU
2 0201 K10 PMU_TO_CCG2_RESET_L
ROOM=PMU
PMU_VDD_RTC L5 VDD_RTC GPIO18 46
AP NTC ROOM=PMU OUT
GPIO19 K11 PMU_TO_BBPMU_RESET_R_L
PMU_VDD_REF PMU_TO_NAND_LOW_BATT_BOOT_L
J3 VDD_REF GPIO20 K12
OUT 17
R3070
L9 BB_TO_PMU_PCIE_HOST_WAKE_L 1.00K 2
1
OMIT 1 C3030 1 C3031 GPIO21
L10 PMU_TO_IKTARA_EN_EXT_1P8V
IN 50
1 PMU_TO_BBPMU_RESET_L 50
0.22UF 1.0UF GPIO22
C3044
25
XW3044
OUT
5%
100PF
1
R3044 AP_NTC 21 SHORT-20L-0.05MM-SM R3000 20%
2 6.3V
20%
2 6.3V
GPIO23 L11 PMU_TO_BOOST_EN OUT 22 1/32W
MF
5% 10KOHM-1% AP_NTC_RETURN 1 2 PP1V8_ALWAYS 0.00 PMU_VDD_TCXO
X5R
0201
X5R
0201-1 GPIO24 M9 PMU_TO_DISPLAY_PANICB OUT 42 01005
16V 1 2
NP0-C0G 2 01005
24 20
ROOM=PMU
ROOM=PMU
GPIO25 M10 I2C0_AP_SCL OUT 11 21 41 45
ROOM=PMU
01005 ROOM=PMU 0%
2 ROOM=SOC 1/32W
ROOM=PMU
FAULT_OUT* H13 PMU_TO_IKTARA_RESET_L
MF
01005 1 C3000 OUT 25
ROOM=PMU
0.1UF
20%
2 6.3V
X5R-CERM
3
01005
CHARGER NTC (IN SIP) ROOM=PMU VDD
Y3000
32.768KHZ-10PPM
CSP
CRITICAL
1 NC CLKOUT 2
OMIT NC
CHARGER_NTC
ROOM=PMU
A 21 40
XW3045
SHORT-20L-0.05MM-SM GND A
To Senna CHARGER_NTC_RETURN 1 2
SYNC_MASTER=sync SYNC_DATE=04/14/2017
4
PAGE TITLE
ROOM=PMU
20 PMU_VSS_RTC
SYSTEM POWER: PMU (4/4)
DRAWING NUMBER SIZE
40 2 051-02159 D
XW3000 Apple Inc. REVISION
SHORT-20L-0.05MM-SM
OMIT
ROOM=PMU
10.0.0
1 NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
BOOST
C C
39 38 37 32 28 25 24 20 19 5
PP_VDD_MAIN 353S01124
50 48 47 45 44 42 41 40
1 C3190 1
When VDD_MAIN < 3.4, boosts to 3.4
18UF ROOM=BOOST Otherwise tracks VDD_MAIN
20%
2 6.3V
CER-X5R L3100
0402-0.1MM 0.47UH-20%-4A-0.048OHM A3 VIN VOUT B3 PP_VDD_BOOST 20 28 36 41 43 50
ROOM=BOOST PIWA20120H-SM
A4 U3100 B4 VOLTAGE=4.3V
CRITICAL VIN
SN61280E
VOUT 1 C3110 1 C3111 1 C3112 1 C3113 1 C3114 1 C3115
2 C3 SW 15UF 15UF 15UF 15UF 15UF 220PF
CSP 20% 20% 20% 20% 20% 5%
SYS_BOOST_LX C4 SW 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 10V
C0G-CERM
0402-0.1MM-1 0402-0.1MM-1 0402-0.1MM-1 0402-0.1MM-1 0402-0.1MM-1 01005
21 IN
PMU_TO_BOOST_EN A1 EN ROOM=BOOST ROOM=BOOST ROOM=BOOST ROOM=BOOST ROOM=BOOST ROOM=BOOST
R3100 1 46 25 24 23 11 IN
I2C0_SMC_SCL B2 SCL
511K
1%
1/32W 46 25 24 23 11 BI
I2C0_SMC_SDA C2 SDA
MF
01005 2 B1 VSEL
ROOM=BOOST
C1 BYP*
50 42 29 21 13 IN
DISPLAY_TO_MANY_BSYNC A2 GPIO
PGND
AGND
D2
D3
D4
D1
B B
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
Battery Connector
THIS ONE ON MLB ---> 516S00232
XW3200
SHORT-20L-0.05MM-SM
24 OUT
VBATT_SENSE 2 1
ROOM=B2B_BATTERY
ROOM=B2B_BATTERY
PLACE_NEAR=J3200:2mm J3200
NO_XNET_CONNECTION=1
B2B-BATT-RCPT
F-ST-SM
9
5 6
PP_BATT_VCC I2C0_SMC_TO_GG_SCL_CONN
C 24 5
VOLTAGE=4.3V
1
2
3
4
23
C
1 C3292 1 C3293 1 C3294
56PF 100PF 220PF 7 8
5% 5% 5%
2 25V
NP0-C0G-CERM 2 16V
NP0-C0G 2 10V
C0G-CERM 10
01005 01005
ROOM=B2B_BATTERY
01005
ROOM=B2B_BATTERY ROOM=B2B_BATTERY
23
I2C0_SMC_BI_GG_SDA_CONN
SYM_VER_1
Q3200
RV3C002UN
DFN R3202
B I2C0_SMC_BI_GG_SDA_CONN I2C0_SMC_SDA_R 2
33 1 I2C0_SMC_SDA B
S
D
23 11 22 24 25 46
3
2
BI
5%
CKPLUS_WAIVE=I2C_PULLUP 1
1 C3202 1/32W
MF
DZ3200 G
5%
56PF 01005
ROOM=B2B_BATTERY
ESD202-B1-CSP01005 2 25V
1
SG-WLL-2-2 NP0-C0G-CERM
2 01005
ROOM=B2B_BATTERY
PP1V8_S2 5 11 13 15 18 21 25 36 41 43
45 46 47 48 50
#29490552: I2C0 SMC Topology for D2x P2
Changed BOM to ESD202 APN for fab release
Q3201
RV3C002UN
1
DFN
G
R3201
I2C0_SMC_TO_GG_SCL_CONN I2C0_SMC_SCL_R 2
33 1 I2C0_SMC_SCL
23 IN 11 22 24 25 46
3
2
D
5%
CKPLUS_WAIVE=I2C_PULLUP
1 1 C3201 1/32W
MF
DZ3201 56PF 01005
SYM_VER_1
ROOM=B2B_BATTERY
5%
ESD202-B1-CSP01005 2 25V
SG-WLL-2-2 NP0-C0G-CERM
2 01005
ROOM=B2B_BATTERY
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
Tigris 2
APN:343S00170
D D
TIGRIS_PMID1
NOSTUFF
K
DZ3300
1 C3318 1 C3310 1 C3315 1 C3316 1 C3317
2.2UF 4.7UF 220PF 220PF 220PF
BZT52C20LP 20% 20% 5% 5% 5%
A
DFN10062 2 25V
X5R 2 25
X5R
V 2 25V
COG 2 25V
COG 2 25V
COG
0402-4 0603 01005 01005 01005
ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER
PP_VDD_MAIN
5 19 20 22 25 28 32 37 38 39 40
41 42 44 45 47 48 50
C3390 1 C3391 1
15UF 15UF
20% 20%
6.3V 2 6.3V 2
CERM CERM
0402-0.1MM 0402-0.1MM
#29277790:Nostuff C3317/C3327
1
R3311 1 C3311 1 C3312 1 C3313 ROOM=CHARGER ROOM=CHARGER
50K 4.7UF 4.7UF 4.7UF
#26845160:Charge Sharing on PMID caps 1% 20% 20% 20%
1/32W 2 16V
X5R 2 16V
X5R 2 16V
X5R
#31097491:Charge C3310/C3320 to ZRB MF
0402 0402 0402 #29745777:Conn VDD_MAIN5 to PP_VDD_MAIN
2 01005
ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER
C TIGRIS_PMID2
TIGRIS_LDO 138S00140/138S00141/138S00142 are alts
C
NOSTUFF
1 C3320 1 C3325 1 C3326 1 C3327 #29536225:4UF for Better Derating
C2
D2
A2
B2
E2
VDD_MAIN5 F2
4.7UF 220PF 220PF 220PF
1 C3360 1 C3361 #30208688:Update C3342/C3360/C3294 to 131S00053
5% 5% 5% 220PF 3.9UF
VDD_MAIN
VDD_MAIN
VDD_MAIN
VDD_MAIN
VDD_MAIN
20%
2 25 V 2 25V
COG 2 25V
COG 2 25V
COG
5% 20%
X5R
0603 01005 01005 01005 2 10V
C0G-CERM 2 6.3V
CER-X5R
A2
A3
B1
B2
B3
ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER 01005 0201 CRITICAL
S
Q3350
ROOM=CHARGER ROOM=CHARGER
PP_VBUS1_E75 CSD68841W
48 5 A1
G BGA
1 C3301 1 C3302 1 C3303 A6 H3 C3340 ROOM=CHARGER
C1
C2
C3
ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER D6 PMID1 BUCK_SW A7 10%
ROOM=CHARGER
16V
OMIT_TABLE
E6 B7 X5R
25 5
PP_VBUS2_IKTARA PMID1 CRITICAL BUCK_SW 0201
BUCK_SW C7 ROOM=CHARGER
F6 NO_XNET_CONNECTION APN:152S00683 (0.47UH-20%-7.2A-0.028OHM)
1 C3305 1 C3306 G6
PMID2
BUCK_SW D7
Inductor in Niki SIP
1UF 220PF PMID2 E7
10% 5% H6 PMID2
BUCK_SW TIGRIS_LX
2 25V
40
2 25V BUCK_SW F7
X5R COG
402 01005 A5 VBUS1 BUCK_SW G7 C3341 1 C3342 1 C3343 1
220PF
ROOM=CHARGER
ROOM=CHARGER
B5 VBUS1 BUCK_SW H7 220PF 330PF
5% 5% 10%
C5 10V 10V 16V
VBUS1
BATT A1 C0G-CERM 2 C0G-CERM 2 CER-X7R 2
D5 VBUS1 01005 01005 01005
BATT B1 ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER
E5 VBUS1
BATT C1
F5 VBUS2 BATT D1
G5 VBUS2 BATT E1 PP_BATT_VCC
B B
5 23
PP1V8_ALWAYS H5
21 20 VBUS2
BATT_SNS F1 VBATT_SENSE
C3353 C3350 C3351 C3352
IN 23
I2C0_SMC_SDA F3 1 1 1 1
1
R3330
46 25 23 22 11 BI SDA A3 TIGRIS_ACTIVE_DIODE 220PF 330PF 2.2UF 2.2UF
I2C0_SMC_SCL G2 SCL
ACT_DIODE
5% 10% 20% 20%
100K 46 25 23 22 11 IN
2 10V 2 16V 2 6.3V 2 6.3V
5% SYSTEM_ALIVE F4 G3 C0G-CERM CER-X7R X5R-CERM X5R-CERM
1/32W 21 17 15 IN SYS_ALIVE HDQ_HOST 01005 01005 0201 0201
MF NOSTUFF
G4 #29536266:10ohm between AUX1 and P_IN ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER
2 01005
ROOM=CHARGER 47 5 IN
HYDRA_TO_TIGRIS_VBUS1_VALID_L B4 VBUS1_VALID* HDQ_GAUGE
R3350
100K
1 OMIT_TABLE OMIT_TABLE
R3331 B3 VBUS2_VALID*
R3335 5%
TIGRIS_TO_PMU_INT_L 1
100 2 TIGRIS_TO_PMU_INT_R_L E3 INT* A4 PP_VAR_USB_RVP_TIGRIS_R 1
10 2 PP_VAR_USB_RVP 1/32W
21 OUT AUX1 44 46 47 MF
01005 2
1% 5%
1/32W TIGRIS_VBUS_DETECT C4 VBUS1_DET NC0 D3 1/32W
ROOM=CHARGER
MF G1 MF
01005 NC1 01005
ROOM=CHARGER
D4 TEST
NC2 H1 Grounded for thermals ROOM=CHARGER
7 OUT
1% GND AGND
1/32W
MF
01005
A8
C8
D8
E8
F8
G8
H8
B8
ROOM=CHARGER
A A
BATTERY NTC SYNC_MASTER=sync
PAGE TITLE
SYNC_DATE=04/14/2017
10.0.0
5%
10V 2
10KOHM-1% BATTERY_NTC_RETURN 1 2
NOTICE OF PROPRIETARY PROPERTY: BRANCH
C0G-CERM 01005
01005 ROOM=CHARGER
THE INFORMATION CONTAINED HEREIN IS THE
ROOM=CHARGER 2 ROOM=B2B_BATTERY
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
33 OF 80
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 24 OF 81
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Iktara
Iktara Debug
D D
PP3403
P2MM-NSM
25
IKTARA_GPIO3 1
SM
PP ROOM=TEST
PP3404
P2MM-NSM
25
IKTARA_GPIO4 1
SM
PP ROOM=TEST
PP3405
P2MM-NSM
25 11
IKTARA_TO_SMC_INT 1
SM
PP ROOM=TEST
CRITICAL
R3410
PP_IKTARA_VRECT VOLTAGE=19V 1
0.02 2 VOLTAGE=19V PP_IKTARA_VMID
C3410 1 C3411 1 C3412 1 C3413 1 C3414 1
1%
1/6W
MF
1 C3415 1 C3416 1 C3417
2.2UF 2.2UF 2.2UF 2.2UF 220PF 2 0402 2 2.2UF 2.2UF 220PF
20% 20% 20% 20% 5% OMIT OMIT 20% 20% 5%
25V 2 25V 2 25V 2 25V 2 25V 2 2 25V 2 25V 2 25V
X5R X5R X5R X5R COG XW3401 XW3400 X5R X5R COG
0402-4 0402-4 0402-4 0402-4 01005 ROOM=IKTARA ROOM=IKTARA
0402-4 0402-4 01005
ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA 1 SHORT-20L-0.05MM-SM
1 ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA
SHORT-20L-0.05MM-SM
C PP_IKTARA_VMID_SENSE
C
PP_IKTARA_VRECT_SENSE
D1
D2
D3
D4
D5
D6
D7
H1
E1
E4
K1
F1
L1
J1
K
OMIT_TABLE K
OMIT_TABLE K
OMIT_TABLE K
OMIT_TABLE
D3400 D3401 D3402 D3403
VRECT_VDD
VRECT_VDD
VRECT_VDD
VRECT_VDD
VRECT_VDD
VRECT_VDD
VRECT_VDD
VRECT_S
VMID_S
VMID_R_VDD
VMID_VDD
VMID_VDD
VMID_VDD
VMID_VDD
DSN2 DSN2 DSN2 DSN2
SNSR20F30WCNX SNSR20F30WCNX SNSR20F30WCNX SNSR20F30WCNX
ROOM=IKTARA ROOM=IKTARA
A A ROOM=IKTARA A A ROOM=IKTARA
B5 CLAMP1
U3400 HV_GPO1 H4
NC
PP_VBUS2_IKTARA
VOLTAGE=16V
5 24
Pull-Ups
H5
#29235539: D21x EVT updates for resonant caps IKTARA_COMM1 C5 COMM1 BC59355A2
HV_GPO2 NC 1 C3420 1 C3421
#31871684: Per Kieran/Pratik, Updating Low Dk Caps for Iktara in Carrier WLCSP BOOTB_VDD H2 2.2UF 220PF
1 C3406 NC 20% 5% PP_VDD_MAIN
2 25V
ROOM=IKTARA 38 37 32 28 25 24 22 20 19 5
2 25V COG 50 48 47 45 44 42 41 40 39
0.033UF CRITICAL SW J2 X5R
0402-4 01005
To Coil 10%
C3404 K2
SW
R34201
ROOM=IKTARA ROOM=IKTARA
2 50V
X7R
OMIT
10% 2200PF
C3422
1 C3423 1 C3424 1 C3425
To Coil 50V
X5R 2
10%
2 50V
VAUX_1P8_VDD G7 1
1.0UF
1.0UF 3.9UF 2.2UF R34211
B IKTARA_COIL2_CONN
0201
ROOM=IKTARA
X5R
0201
ROOM=IKTARA
20%
2 6.3V
20%
2 6.3V
X5R
20%
2 6.3V
CER-X5R
20%
2 6.3V
X5R-CERM
10K
5%
1/32W
B
26 5 X5R 0201-1 0201 0201 MF
NOSTUFF 0201-1 ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA
1
R3460 1 C3461 1 C3462 1 C3463 1 C3464 1 C3465 1 C3466 ROOM=IKTARA
01005 2
ROOM=IKTARA
100K 100NF 47NF 68NF 68NF 68NF 68NF
1% 10% 10% 10% 10% 10% 10% IKTARA_AC2 B1 AC2 NOTE: PU only at RESET* not GPIO2
1/20W
MF 2 50V 50V
2 X7S 2 50V 2 50V 2 50V 2 50V B2 SDA L4 I2C0_SMC_SDA IN 11 22 23 24 46
X7S X7S X7S X7S X7S AC2
2 201 0402 0402 0402 0402 0402 0402 C3405 SCL L5 I2C0_SMC_SCL
R3422
11 22 23 24 46
C2 AC2
BI
ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA
0.1UF INT K4 IKTARA_TO_SMC_INT
1 2 IKTARA_BOOT2 C1 J4 PMU_TO_IKTARA_RESET_R_L
OUT 11 25
1
100 2 PMU_TO_IKTARA_RESET_L
BOOT2_VDD RESET* IN 21
1 C3407 10%
16V H6 IKTARA_TO_PMU_OVP
5%
1/32W
MF
01005
0.033UF X5R-CERM GPIO1 OUT 21 ROOM=IKTARA
10% 0201 GPIO2 L6 #29706561: Add connection from Iktara GPIO to PMU #29302816: Remove reset connection to Iktara GPIO
2 50V NC
X7R
0402
ROOM=IKTARA
GPIO3/SWDIO J6 IKTARA_GPIO3 25
ROOM=IKTARA
GPIO4/SWCLK K5 IKTARA_GPIO4 25 #30823904: Add 1kohm to GPIO6 for product ID
IKTARA_COMM2 C3 COMM2 R3424
GPIO5 J5 NC_IKTARA_PRODUCT_ID_0
B3 K7 IKTARA_PRODUCT_ID_1 1
1.00K 2
CLAMP2 GPIO6
GPIO7 K6 NC_IKTARA_PRODUCT_ID_2 5%
1/32W
MF
01005 #29223315: Add series R to EN_EXT_1P8 and RESET*
R3430 NC
E2 ANA1 ROOM=IKTARA
R3423
F2 ANA2
PMU_TO_IKTARA_EN_EXT_1P8V_R 100 PMU_TO_IKTARA_EN_EXT_1P8V
PP_VDD_MAIN 1
0.00 2 PP_VDD_MAIN_IKTARA
NC
G3 EN_EXT_1P8 E7 1 2 IN 21
38 37 32 28 25 24 22 20 19 5 ANA3
5% MF
50 48 47 45 44 42 41 40 39
0% G2 ANA4 VSYS_ANA_VDD F3 PP_VDD_MAIN 5 19 20 22 24 25 28 32 37 38 39 1/32W 01005
1/32W NC 40 41 42 44 45 47 48 50 ROOM=IKTARA
MF
01005 VSYS_1P8_VDD F6 PP1V8_S2 5 11 13 15 18 21 23 36 41 43 45
ROOM=IKTARA G6 REFBP 46 47 48 50
NC
OTP_WREN J7
#30023781: Connect ANA3 to VDD_MAIN G5 DIGTEST
RGND PGND AVSS Note: Iktara GPIOs 5-7 reserved for product ID
110 RESERVED FOR OTHER PROGRAMS
A 101 <- SELECTED (D21x) A
A1
A2
A3
A4
A5
A6
A7
B4
J3
K3
L3
C4
G4
H3
L7
F5
F4
011 RESERVED FOR OTHER PROGRAMS SYNC_MASTER=sync SYNC_DATE=04/14/2017
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
Cyclone connector
THIS ONE ON MLB ---> 516S00311
C CRITICAL
C
ROOM=B2B_CYCLONE
J3500
CPBC102-0101E
#31690340:Remove XWs on Iktara Coil Paths 9
F-ST-SM
10
5 6
25 5 IKTARA_COIL2_CONN 1 2
3 4 IKTARA_COIL1_CONN
C3500 C3501
5 25
1 1
220PF
2% 2%
220PF 7 8 C3511 1 1 C3510
50V
C0G 2 2 50V
C0G 11 12 220PF 220PF
2% 2%
0201 0201 50V 2 2 50V
ROOM=B2B_CYCLONE ROOM=B2B_CYCLONE C0G C0G
0201 0201
ROOM=B2B_CYCLONE ROOM=B2B_CYCLONE
B B
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
Graphite - Accel & Gyro Magnesium - Compass
APN:338S00084
APN: 338S00304 (A1) Shared decoupling with Phosphorus
PP1V8_IMU_S2
PP1V8_IMU_S2 18 27
18 27
1 C3610 1 C3611
#29695424: Stuff PU for Graphite CS 1 C3600 1 C3601 1 C3602 0.1UF
20%
2.2UF
20%
0.1UF 0.1UF 2.2UF 2 6.3V 2 6.3V
C4
20% 20% 20% X5R-CERM X5R-CERM
VDD
PP1V8_IMU_S2 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
01005 0201
U3610
27 18 ROOM=PHOSPHORUS
01005 01005 0201 ROOM=MAGNESIUM
OMIT_TABLE
HSCDTD601A-2A
ROOM=CARBON ROOM=CARBON ROOM=CARBON
16
OMIT_TABLE
1
R3601 1 LGA SPI_IMU_TO_AOP_MISO
VDDIO
VDD
C2 VPP SDO B4
100K NC OUT 5 13 27
5% SPI_AOP_TO_IMU_MOSI
1/32W NC B1 RSV SDA/SDI A4 IN 5 13 27
MF
01005 2 U3600 NC B3 RSV
SCL/SCK A3 SPI_AOP_TO_IMU_SCLK
ROOM=CARBON
BMI262BB D1 RSV
IN 5 13 27
LGA NC
SPI_AOP_TO_COMPASS_CS_L
13 IN
SPI_AOP_TO_ACCEL_GYRO_CS_L 5 CSB SCLK 2 SPI_AOP_TO_IMU_SCLK IN 5 13 27
NC D2 RSV CSB
114K INT PU
A2 IN 5 13
15 SM PP1V8_IMU_S2
MOSI 3 SPI_AOP_TO_IMU_MOSI IN 5 13 27
27 18 D4 RST*
1.09M INT PU
TRG/SE
114K INT PD
C3 NC
13 OUT
ACCEL_GYRO_TO_AOP_DATARDY 6 INT ROOM=CARBON MISO 4 SPI_IMU_TO_AOP_MISO OUT 5 13 27 DRDY A1 COMPASS_TO_AOP_INT OUT 5 13
13 OUT
ACCEL_GYRO_TO_AOP_INT 7 MOTION_INT ROOM=MAGNESIUM
CRITICAL
C CRITICAL
VSS C
GND
GND
GND
GND
GND
GND
GND
C1
8
9
10
11
12
13
14
#30844258:Pin14 to GND
38 33
SPKRAMP_TOP_TO_COIL_OUT_NEG SPKRAMP_TOP_TO_COIL_OUT_POS 33 38
CRITICAL CRITICAL
1
R3615 1
R3616
1.1K 1.1K
1% 1%
1/32W 1/32W
MF MF
2 01005 2 01005
ROOM=SPKAMP2 ROOM=SPKAMP2
NEG_COMPASS_COIL_COMP POS_COMPASS_COIL_COMP
2
B XW3615 B
SHORT-20L-0.05MM-SM
NO_XNET_CONNECTION
1 ROOM=MAGNESIUM
Phosphorus
OMIT
1 C3615 1 C3616
220PF 220PF
APN:338S00334 5% 5%
2 10V
2 10V
C0G-CERM C0G-CERM
01005 01005
ROOM=SPKAMP2 ROOM=SPKAMP2
PP1V8_IMU_S2 18 27
1 C3620 1 C3622
0.1UF 2.2UF
20% 20%
PP1V8_IMU_S2 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
27 18 01005 0201
ROOM=PHOSPHORUS ROOM=PHOSPHORUS
NOSTUFF OMIT_TABLE
1
R3620
100K
8
5%
1/32W VDD VDDIO CRITICAL
MF
2 01005
U3620 ROOM=PHOSPHORUS
ROOM=PHOSPHORUS
SPI_AOP_TO_IMU_MOSI BMP284BA SPI_IMU_TO_AOP_MISO
27 13 5 3 SDI LGA SDO 5 5 13 27
IN OUT
SPI_AOP_TO_IMU_SCLK 4 SCK
27 13 5 IN
IRQ 7 PHOSPHORUS_TO_AOP_INT
13 IN
SPI_AOP_TO_PHOSPHORUS_CS_L 2 CS* OUT 5 13
A GND
A
1
SYNC_MASTER=sync SYNC_DATE=04/14/2017
PAGE TITLE
SENSORS
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
Camera PMU
39 38 37 32 25 24 22 20 19 5 PP_VDD_MAIN
D
50 48 47 45 44 42 41 40
D 1 C3790 1 C3791
18UF 2.2UF D20:152S00626
20% 20%
2 6.3V
CER-X5R 2 6.3V
X5R-CERM U3700 D21:152S00622 (Lower)
0402-0.1MM 0201 D2462-AVAE
L3700
ROOM=CAM_PMU ROOM=CAM_PMU
OMIT_TABLE WLCSP
SYM 1 OF 4
1UH-20%-2.1A-0.1OHM
LAYOUT: C3790 shared with NFC BOOST J7 VDD_BUCK9 ROOM=CAM_PMU
CRITICAL BUCK9_LX0 H7 CAMPMU_BUCK_LX0 1 2 PP2V85_VAR_CAM_VCM_PVDD 30
J8 VDD_BUCK9 H8 PIWA2012FE-SM VOLTAGE=2.85V
BUCK9_LX0
C3700 C3701 C3702
ROOM=CAM_PMU
BUCK9_FB H5 1 1 1
18UF 18UF 330PF
XW3700
SHORT-20L-0.05MM-SM
20%
2 6.3V
20%
2 6.3V
10%
2 16V
VCC MAIN BUCKS
CER-X5R CER-X5R CER-X7R
CAMPMU_BUCK_FB 1 2 0402-0.1MM 0402-0.1MM 01005
ROOM=CAM_PMU
ROOM=CAM_PMU ROOM=CAM_PMU
ROOM=B2B_WIDE_RCAM
OMIT
C5 VDD_MAIN
E2 VDD_MAIN
G4 VDD_MAIN
U3700
D2462-AVAE #31766720:Add 0402 Footprint Connector
WLCSP #31710713:C3704 to 4UF to mitigate RnR
C 50 43 41 36 22 20
PP_VDD_BOOST A1 VDD_LDO4_17 SYM 2 OF 4
VLDO4 B2 VOLTAGE=2.85V PP2V85_FCAM_AVDD 33 C LDO4: 300mA max C
H2 VDD_LDO9 VLDO9 J2 VOLTAGE=2.6V /1.95V PP_CAM_WIDE_ADC CX LDO9: 390mA max
1 C3795 1 C3796 30
2.2UF
20%
2.2UF
20%
1 C3704 1 C3703 1 C3709
2 6.3V 2 6.3V 3.9UF 18UF 2.2UF
X5R-CERM X5R-CERM 20% 20% 20%
0201 0201 2 6.3V 2 6.3V 2 6.3V
ROOM=CAM_PMU ROOM=CAM_PMU
CER-X5R CER-X5R X5R-CERM
OMIT_TABLE OMIT_TABLE
0201
ROOM=CAM_PMU
0402-0.1MM 0201
ROOM=CAM_PMU
ROOM=CAM_PMU
20 18
PP1V25_S2 B6 VDD_LDO10 VLDO10 A6 VOLTAGE=1.15V PP1V1_CAM_TELE_DVDD 31 Ga LDO10: 1300mA max Actual Load: 390mA
B5 VDD_LDO15 VLDO15 A5 VOLTAGE=1.15V PP1V1_FCAM_DVDD D LDO15: 400mA max
1 C3797 1 C3798 33
2.2UF 2.2UF
20%
2 6.3V
20%
2 6.3V
1 C3710 1 C3711 1 C3715
X5R-CERM
0201
X5R-CERM
0201
2.2UF 2.2UF 2.2UF
20% 20% 20%
ROOM=CAM_PMU ROOM=CAM_PMU LDO INPUT LDO OUTPUT 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
OMIT_TABLE OMIT_TABLE 0201 0201 0201
ROOM=CAM_PMU
ROOM=CAM_PMU ROOM=CAM_PMU
1 C3717 1 C3718
3.9UF 2.2UF
20% 20%
2 6.3V
CER-X5R 2 6.3V
X5R-CERM
0201
ROOM=CAM_PMU
0201
ROOM=CAM_PMU
1 C3719 1 C3720
2.2UF 3.9UF
20% 20%
2 6.3V
X5R-CERM 2 6.3V
CER-X5R
0201
ROOM=CAM_PMU
0201
ROOM=CAM_PMU
31 30 29 18 17 15 11 9 8 7 6
PP1V8_IO H3 VBUCK3 BUCK3_SW1 J3
42 40 33 NC
SW INPUT SW OUTPUT
J4 VPUMP
NC
ON_BUF F2 CAMPMU_ON_BUF
C3750 1
0.22UF
20%
6.3V 2
X5R
01005
ROOM=CAM_PMU
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
#29220631: Connect Neon to other side of R3802 and change to 49.9 ohms R3840
CAMPMU_TO_STROBE_DRIVER_HWEN_R 1
100 2 CAMPMU_TO_STROBE_DRIVER_HWEN OUT 32
I2C3_ISP_SDA_R U3700 5%
1/32W
32 MF
BI
D2462-AVAE 01005
WLCSP ROOM=B2B_FOREHEAD
12 IN
AP_TO_CAMPMU_RESET_L F5 RESET_IN GPIO10 F3 DISPLAY_TO_MANY_BSYNC 13 21 22 42 50
MAKE_BASE=TRUE
GPIO11 G3
NC
CAMPMU_VREF C1 VREF GPIO12 G2
NC
E3
1
R3801 CAMPMU_IREF D1 IREF GPIO15 NC
C 100K REFERENCE GPIO
C
5%
1/32W
CAMPMU_VRTC E1 VRTC
MF
2 01005
ROOM=CAM_PMU
1 C3800
1
R3800 1 C3810
0.22UF 200K 0.1UF NC
J5 TDEV1
20% 1% 20% G5
1/32W NC TDEV2
2 6.3V
X5R MF 2 6.3V
X5R-CERM TEMPERATURE
01005 2 01005 01005 C6 TCAL
ROOM=CAM_PMU ROOM=CAM_PMU ROOM=CAM_PMU NC
#30505664:Remove Ansel TDEV Routing
AMUX_AY C8 CAMPMU_TO_PMU_AMUX OUT 21
ATM E7
U3700
B D2462-AVAE
WLCSP
B
C2 SYM 4 OF 4 G6
VSS VSS
C3 VSS VSS G7
C4 VSS VSS G8
C7 VSS VSS H4
D2 VSS VSS H6
D5 VSS VSS J1
E5 VSS VSS J6
F1 VSS VSS F4
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
J3900 0201
1 C3909
AA27DK-S024VA1 ROOM=B2B_WIDE_RCAM
F-ST-SM 2.2UF
20%
29 2 6.3V
X5R-CERM
25 26 FL3995 0201
ROOM=B2B_WIDE_RCAM
10-OHM-750MA OMIT_TABLE
D 30 28
PP2V85_CAM_WIDE_AVDD 1 2 AP_TO_WIDE_CLK_CONN 30
42
17 15 11 9 8 7 6
40 33 31 29 28 18
PP1V8_IO 1 2 PP1V8_CAM_WIDE_VDDIO_CONN 30 D
01005-1
30 28
PP_CAM_WIDE_ADC 3 4 WIDE_AND_TELE_TO_LED_DRIVER_STROBE_EN_CONN 30 31 ROOM=B2B_WIDE_RCAM
1 C3995 1 C3996
PP_CAM_VCM_PVDD_CONN 5 6 PP3V3_SVDD 0.1UF 220PF
30 28 30 31
20% 5%
7 8 2 6.3V
X5R-CERM 2 10V
C0G-CERM
30
90_LPDP_WIDE_TO_AP_D0_CONN_N GND_VOID=TRUE
9 10 01005 01005
90_LPDP_WIDE_TO_AP_D0_CONN_P I2C0_ISP_TO_WIDE_RCAM_OIS_SCL_CONN
ROOM=B2B_WIDE_RCAM ROOM=B2B_WIDE_RCAM
GND_VOID=TRUE
11 12
30 30 PP3V3_SVDD
13 14 I2C0_ISP_BI_WIDE_RCAM_OIS_SDA_CONN 31 30 28
90_LPDP_WIDE_TO_AP_D1_CONN_N GND_VOID=TRUE
15 16 PP1V8_CAM_WIDE_VDDIO_CONN
30
30
PP1V1_CAM_WIDE_DVDD_CONN
30 30
30
90_LPDP_WIDE_TO_AP_D1_CONN_P GND_VOID=TRUE
17 18 WIDE_TO_TELE_SYNC_J3900_CONN 31 30 28
PP2V85_CAM_WIDE_AVDD
19 20 ISP_TO_WIDE_SHUTDOWN_CONN_L 30 30 28
PP_CAM_WIDE_ADC
30
90_LPDP_WIDE_TO_AP_D2_CONN_N GND_VOID=TRUE 21 22 LPDP_WIDE_BI_AP_AUX_CONN 30 PP_CAM_VCM_PVDD_CONN
30
90_LPDP_WIDE_TO_AP_D2_CONN_P GND_VOID=TRUE 23 24
30
1 C3990 1 C3991 1 C3992 1 C3993 1 C3994
PP1V1_CAM_WIDE_DVDD_CONN 220PF 220PF 220PF 220PF 220PF
30 27 28 5% 5% 5% 5% 5%
2 10V
C0G-CERM 2 10V
C0G-CERM 2 10V
C0G-CERM 2 10V
C0G-CERM 2 10V
C0G-CERM
30 01005 01005 01005 01005 01005
ROOM=B2B_WIDE_RCAM ROOM=B2B_WIDE_RCAM ROOM=B2B_WIDE_RCAM ROOM=B2B_WIDE_RCAM ROOM=B2B_WIDE_RCAM
FL3903
33-OHM-25%-1500MA
28
PP1V1_CAM_WIDE_DVDD 1 2
PP1V1_CAM_WIDE_DVDD_CONN 30
0201
ROOM=B2B_WIDE_RCAM
1 C3925 1 C3926 1 C3928
2.2UF 2.2UF 15PF
20% 20% 5%
ISP I2C
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 16V
NP0-C0G-CERM
0201 0201 01005
ROOM=B2B_WIDE_RCAM ROOM=B2B_WIDE_RCAM ROOM=B2B_WIDE_RCAM
OMIT_TABLE OMIT_TABLE Desense for Wifi
C C
LPDP Filters
R3900 C3930
I2C0_ISP_SCL 0.00 I2C0_ISP_TO_WIDE_RCAM_OIS_SCL_CONN
9 IN
1 2 30 0.1UF
CKPLUS_WAIVE=I2C_PULLUP 90_LPDP_WIDE_TO_AP_D0_P 1 2 90_LPDP_WIDE_TO_AP_D0_CONN_P
0%
1/32W
MF
1 C3900 10 BI
ROOM=B2B_WIDE_RCAM GND_VOID=TRUE
30
20%
6.3V
X5R-CERM
01005
C3941
0.1UF
10 IN
90_LPDP_WIDE_TO_AP_D1_N 1 2 90_LPDP_WIDE_TO_AP_D1_CONN_N 30
GND_VOID=TRUE
ROOM=B2B_WIDE_RCAM
20%
B 6.3V
X5R-CERM
01005
B
C3950
IO Filters 10 IN
90_LPDP_WIDE_TO_AP_D2_P
0.1UF
1 2 90_LPDP_WIDE_TO_AP_D2_CONN_P 30
ROOM=B2B_WIDE_RCAM GND_VOID=TRUE
20%
6.3V
X5R-CERM
01005
R3905 C3951
0.00 0.1UF
9
AP_TO_WIDE_CLK 1 2 AP_TO_WIDE_CLK_CONN 30 10
90_LPDP_WIDE_TO_AP_D2_N 1 2 90_LPDP_WIDE_TO_AP_D2_CONN_N 30
IN IN
I193 GND_VOID=TRUE
0%
1/32W
MF
1 C3906 ROOM=B2B_WIDE_RCAM
20%
6.3V
01005 56PF X5R-CERM
ROOM=B2B_WIDE_RCAM
5% 01005
2 25V
NP0-C0G-CERM
01005 C3960
ROOM=B2B_WIDE_RCAM
0.1UF
LPDP_WIDE_BI_AP_AUX 1 2 LPDP_WIDE_BI_AP_AUX_CONN
10 BI 30
20%
6.3V
1 C3961
#27431370 X5R-CERM 56PF
01005 5%
ROOM=B2B_WIDE_RCAM
2 25V
R3907 NP0-C0G-CERM
01005
ISP_TO_WIDE_SHUTDOWN_L 1
0.00 2 ISP_TO_WIDE_SHUTDOWN_CONN_L
ROOM=B2B_WIDE_RCAM
9 IN 30
0%
1/32W
MF
1 C3907
01005 220PF
ROOM=B2B_WIDE_RCAM
5%
2 10V
C0G-CERM
A 01005
ROOM=B2B_WIDE_RCAM
SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
#27431370
R3908
CAMERA: B2B Wide (KY)
DRAWING NUMBER SIZE
0.00 WIDE_AND_TELE_TO_LED_DRIVER_STROBE_EN_CONN
WIDE_AND_TELE_TO_STROBE_DRIVER_STROBE 1 2 051-02159 D
Apple Inc.
32 OUT 30 31
0%
1/32W
MF
1 C3908 REVISION
10.0.0
01005 220PF
ROOM=B2B_WIDE_RCAM
5% NOTICE OF PROPRIETARY PROPERTY: BRANCH
2 10V
C0G-CERM
01005 THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
ROOM=B2B_WIDE_RCAM
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
39 OF 80
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 30 OF 81
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
AA27DK-S024VA1 0201
F-ST-SM ROOM=B2B_TELE_CAM
1 C4095 1 C4096
29 1.0UF 220PF
20% 5%
25 26 2 6.3V
X5R 2 10V
C0G-CERM
D
0201-1
ROOM=B2B_TELE_CAM
01005
ROOM=B2B_TELE_CAM D
31
90_LPDP_TELE_TO_AP_D2_CONN_N 1 2 90_LPDP_TELE_TO_AP_D1_CONN_P 31
31 90_LPDP_TELE_TO_AP_D2_CONN_P 3 4 90_LPDP_TELE_TO_AP_D1_CONN_N 31
5 6
90_LPDP_TELE_TO_AP_D0_CONN_N 7 8 I2C1_ISP_TO_TELE_SCL_CONN 31 31
28
PP3V3_SVDD
31 30
90_LPDP_TELE_TO_AP_D0_CONN_P 9 10 I2C1_ISP_BI_TELE_SDA_CONN 31
31
11 12 WIDE_AND_TELE_TO_LED_DRIVER_STROBE_EN_CONN 30 31 28
PP2V85_CAM_TELE_AVDD
AP_TO_TELE_CLK_CONN 14 PP3V3_SVDD 28 30 31
31
PP_CAM_TELE_ADC
31 13 28
31
15 16 PP1V8_CAM_TELE_VDDIO_CONN 31
PP2V85_CAM_TELE_AVDD WIDE_TO_TELE_SYNC_J4000_CONN 31
31 28
PP_CAM_TELE_ADC
17
19
18
20 ISP_TO_TELE_SHUTDOWN_CONN_L 31
1 C4091 1 C4092 1 C4094
31 28 220PF 220PF 220PF
21 22 LPDP_TELE_BI_AP_AUX_CONN 31 5% 5% 5%
2 10V 2 10V 2 10V
31
PP1V8_CAM_TELE_VDDIO_CONN 23 24 C0G-CERM
01005
C0G-CERM
01005
C0G-CERM
01005
ROOM=B2B_TELE_CAM ROOM=B2B_TELE_CAM ROOM=B2B_TELE_CAM
PP1V1_CAM_TELE_DVDD_CONN 27 28
FL4003
31
30 33-OHM-25%-1500MA
28
PP1V1_CAM_TELE_DVDD 1 2
PP1V1_CAM_TELE_DVDD_CONN 31
0201
ROOM=B2B_TELE_CAM 1 C4025 1 C4026 1 C4093 1 C4028
2.2UF 2.2UF 220PF 15PF
20% 20% 5% 5%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 10V
C0G-CERM 2 16V
NP0-C0G-CERM
0201 0201 01005 01005
ROOM=B2B_TELE_CAM ROOM=B2B_TELE_CAM ROOM=B2B_PEARL ROOM=B2B_TELE_CAM
OMIT_TABLE OMIT_TABLE
Desense for Wifi frequencies
ISP I2C
C C
9 IN
I2C1_ISP_SCL 1
R4000
0.00 2 I2C1_ISP_TO_TELE_SCL_CONN 31
LPDP
CKPLUS_WAIVE=I2C_PULLUP
0%
1/32W
MF
1 C4000 C4030
01005 56PF 0.1UF
5%
ROOM=B2B_TELE_RCAM
2 25V
NP0-C0G-CERM 10 BI
90_LPDP_TELE_TO_AP_D0_P 1 2 90_LPDP_TELE_TO_AP_D0_CONN_P 31
01005 GND_VOID=TRUE
ROOM=B2B_TELE_RCAM
ROOM=B2B_TELE_RCAM 20%
6.3V
R4001 X5R-CERM
01005
I2C1_ISP_SDA 0.00 I2C1_ISP_BI_TELE_SDA_CONN
9 BI
1 2
CKPLUS_WAIVE=I2C_PULLUP
31
C4031
0.1UF
0%
1/32W
MF
1 C4001 90_LPDP_TELE_TO_AP_D0_N 1 2 90_LPDP_TELE_TO_AP_D0_CONN_N
01005 56PF 10 BI
ROOM=B2B_TELE_RCAM
31
ROOM=B2B_TELE_RCAM
5% GND_VOID=TRUE
2 25V
NP0-C0G-CERM
20%
6.3V
01005 X5R-CERM
ROOM=B2B_TELE_RCAM 01005
C4040
0.1UF
10 OUT
90_LPDP_TELE_TO_AP_D1_P 1 2 90_LPDP_TELE_TO_AP_D1_CONN_P 31
ROOM=B2B_TELE_RCAM
20% GND_VOID=TRUE
6.3V
X5R-CERM
01005
C4041
0.1UF
10 OUT
90_LPDP_TELE_TO_AP_D1_N 1 2 90_LPDP_TELE_TO_AP_D1_CONN_N 31
B ROOM=B2B_TELE_RCAM
20%
6.3V
X5R-CERM
GND_VOID=TRUE
B
01005
AP_TO_TELE_CLK 1
0.00 2 AP_TO_TELE_CLK_CONN
ROOM=B2B_TELE_RCAM
GND_VOID=TRUE
9 IN 31 20%
6.3V
0%
1/32W
1 C4006 X5R-CERM
01005
MF 56PF
01005
ROOM=B2B_TELE_RCAM
5%
2 25V C4051
NP0-C0G-CERM
01005 0.1UF
ROOM=B2B_TELE_RCAM
10 OUT
90_LPDP_TELE_TO_AP_D2_N 1 2 90_LPDP_TELE_TO_AP_D2_CONN_N 31
ROOM=B2B_TELE_RCAM GND_VOID=TRUE
#27431370 20%
6.3V
X5R-CERM
R4007 01005
0.00
9 IN
ISP_TO_TELE_SHUTDOWN_L 1 2 ISP_TO_TELE_SHUTDOWN_CONN_L 31 C4060
0.1UF
0%
1/32W
MF
1 C4007 10
LPDP_TELE_BI_AP_AUX 1 2 LPDP_TELE_BI_AP_AUX_CONN 31
01005 220PF OUT
ROOM=B2B_TELE_RCAM
5%
2 10V
ROOM=B2B_TELE_RCAM
20%
6.3V
1 C4061
C0G-CERM
01005 X5R-CERM 56PF
ROOM=B2B_TELE_RCAM
01005 5%
25V
2 NP0-C0G-CERM
01005
ROOM=B2B_TELE_RCAM
31 30 BI
WIDE_AND_TELE_TO_LED_DRIVER_STROBE_EN_CONN
1 C4008
220PF
5%
A 2 10V
C0G-CERM
01005 SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
ROOM=B2B_TELE_RCAM
PAGE TITLE
40 OF 80
ROOM=B2B_TELE_RCAM
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 31 OF 81
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
LED STROBE DRIVERS (NEON)
NEON1
APN:353S00558
PP_VDD_MAIN
I2C ADDRESS: 0x63
38 37 32 28 25 24 22 20 19 5
50 48 47 45 44 42 41 40 39
GND1S
GND2S
IN
GND1
GND2
C7 GND GND E19
B NEON2 B
A1
B1
E20
D20
APN:353S00868
I2C ADDRESS: 0x67
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D 28
PP1V1_FCAM_DVDD
33-OHM-25%-1500MA
1 2 PP1V1_FCAM_DVDD_CONN 33
ROOM=B2B_FOREHEAD
OMIT_TABLE
ROOM=B2B_FOREHEAD
33
PP2V85_FCAM_AVDD_CONN 1 2 90_MIPI_FCAM_TO_AP_DATA0_P 9
D
0201 PP1V8_FCAM_IO_CONN 90_MIPI_FCAM_TO_AP_DATA0_N
ROOM=B2B_FOREHEAD 1 C4210 1 C4211 33 3 4 9
0.1UF 220PF 5 6
20% 5% 33
ISP_TO_FCAM_SHUTDOWN_CONN_L 7 8 90_MIPI_FCAM_TO_AP_CLK_P 9
2 6.3V 2 10V
X5R-CERM C0G-CERM 90_MIPI_FCAM_TO_AP_CLK_N
01005
ROOM=B2B_FOREHEAD
01005
ROOM=B2B_FOREHEAD
FL4260 AP_TO_FCAM_CLK_CONN
9 10 9
10-OHM-750MA 33 11 12
FL4220 PP3V0_S2 1 2 PP3V0_PROX_ALS_CONN 13 14 90_MIPI_FCAM_TO_AP_DATA1_P 9
10-OHM-750MA 47 46 44 20 5
50 48
33
33
I2C2_ISP_TO_FCAM_SCL_CONN 15 16 90_MIPI_FCAM_TO_AP_DATA1_N 9
01005-1
28
PP2V85_FCAM_AVDD 1 2 PP2V85_FCAM_AVDD_CONN 33 ROOM=B2B_FOREHEAD C4261 1 1 C4262 33
I2C2_AP_BI_CONVOY_SDA_CONN 17 18
01005-1 2.2UF 220PF PDM_SPKRAMP_TOP_TO_CONVOY_CLK_CONN PP1V1_FCAM_DVDD_CONN
ROOM=B2B_FOREHEAD 1 C4220 1 C4221 #28225348: Change FL4260 to low-DCR part
20%
6.3V 2
5%
2 10V
33
PDM_CONVOY_TO_SPKRAMP_TOP_DATA_CONN
19 20
I2C2_ISP_BI_FCAM_SDA_CONN
33
33
PP_CODEC_TO_FRONTMIC3_BIAS_CONN 33 34 PP3V0_PROX_ALS_CONN 33
XW4200
FRONTMIC3_TO_CODEC_BIAS_FILT_RET 2 1 39 40
SPKRAMP_TOP_TO_COIL_OUT_POS 27 33
36
42
ROOM=B2B_FOREHEAD
#29487888 38
SHORT-20L-0.05MM-SM
1 C4284
R4230 5%
220PF
AP_TO_FCAM_CLK 1
0.00 2 AP_TO_FCAM_CLK_CONN 2 10V
9 33 C0G-CERM
01005
0% 1 C4230 SPKRAMP_TOP_TO_COIL_OUT_NEG ROOM=B2B_FOREHEAD
C
C 1/32W
MF 56PF
27 33
38
01005
ROOM=B2B_FOREHEAD
5%
2 25V
1 C4285 1 C4286
NP0-C0G-CERM
01005 220PF 220PF
ROOM=B2B_FOREHEAD 5% 5%
#27431370 10V
2 C0G-CERM 2 10V
C0G-CERM
01005 01005
R4232 ROOM=B2B_FOREHEAD ROOM=B2B_FOREHEAD
ISP_TO_FCAM_SHUTDOWN_L 1
0.00 2 ISP_TO_FCAM_SHUTDOWN_CONN_L
9 33
R4287
0%
1/32W 1 C4232 COIL_TO_SPKRAMP_TOP_VSENSE_P 1
100 2 COIL_TO_SPKRAMP_TOP_VSENSE_CONN_P
MF 38 33
01005 220PF 5%
ROOM=B2B_FOREHEAD 5%
2 10V C4287 1/32W
B ROOM=B2B_FOREHEAD
R4275 B
ALS_TO_AOP_INT_L 1
0.00 2 ALS_TO_AOP_INT_CONN_L
13 33
0%
1/32W
MF
1 C4275
56PF
CONVOY I/O
01005
ROOM=B2B_FOREHEAD 5%
2 25V
MIC3 NP0-C0G-CERM
01005
ROOM=B2B_FOREHEAD
5%
1/32W 1 C4270 01005
ROOM=B2B_FOREHEAD 1 DZ4280
0%
1/32W
MF
1 C4240
MF
01005 56PF 6.8V-100PF 01005 56PF
5% 01005 ROOM=B2B_FOREHEAD 5%
ROOM=B2B_FOREHEAD
2 25V 2 ROOM=B2B_FOREHEAD 2 25V
NP0-C0G-CERM
NP0-C0G-CERM
01005 R4242 01005
ROOM=B2B_FOREHEAD
0.00
FL4271 ROOM=B2B_FOREHEAD I2C0_AOP_SDA 1 2 I2C0_AOP_BI_PROX_ALS_SDA_CONN
FL4281
13 33
150OHM-25%-200MA-0.7DCR CKPLUS_WAIVE=I2C_PULLUP
PDM_CONVOY_TO_SPKRAMP_TOP_DATA 1 2PDM_CONVOY_TO_SPKRAMP_TOP_DATA_CONN
150OHM-25%-200MA-0.7DCR
0%
1/32W
MF
1 C4242
38
FRONTMIC3_TO_CODEC_AIN3_N 1 2 FRONTMIC3_TO_CODEC_AIN3_CONN_N 01005 56PF
01005
ROOM=B2B_FOREHEAD
1 C4271 35
01005 NO_XNET_CONNECTION=1
33
ROOM=B2B_FOREHEAD 5%
2 25V
5%
56PF ROOM=B2B_FOREHEAD 1 DZ4281 NP0-C0G-CERM
01005
2 25V
NP0-C0G-CERM
6.8V-100PF
01005
ROOM=B2B_FOREHEAD
01005 2 ROOM=B2B_FOREHEAD
ROOM=B2B_FOREHEAD
R4272
0.00
38 11
I2C2_AP_SCL 1 2 I2C2_AP_TO_CONVOY_SCL_CONN 33 FL4282
150OHM-25%-200MA-0.7DCR
0%
1/32W 1 C4272 FRONTMIC3_TO_CODEC_AIN3_P 2 1 FRONTMIC3_TO_CODEC_AIN3_CONN_P
A
MF
56PF
A
35 33
01005 NO_XNET_CONNECTION=1
5% 01005
ROOM=B2B_FOREHEAD
2 25V
NP0-C0G-CERM ROOM=B2B_FOREHEAD 1 DZ4282 SYNC_MASTER=sync
PAGE TITLE
SYNC_DATE=04/14/2017
01005
ROOM=B2B_FOREHEAD
2
6.8V-100PF
01005
ROOM=B2B_FOREHEAD CAMERA: FCAM + FOREHEAD
DRAWING NUMBER SIZE
R4273 051-02159 D
I2C2_AP_SDA 1
0.00 2 I2C2_AP_BI_CONVOY_SDA_CONN Apple Inc.
38 11 33 REVISION
0%
1/32W 1 C4273 10.0.0
MF
56PF NOTICE OF PROPRIETARY PROPERTY: BRANCH
01005
ROOM=B2B_FOREHEAD 5% THE INFORMATION CONTAINED HEREIN IS THE
2 25V
NP0-C0G-CERM PROPRIETARY PROPERTY OF APPLE INC.
01005 THE POSESSOR AGREES TO THE FOLLOWING: PAGE
ROOM=B2B_FOREHEAD I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
42 OF 80
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 33 OF 81
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
HAWKING
C4300
0.22UF
Strobe Connector
35 OUT
HAWKING_TO_CODEC_AIN5_N 1 2 HAWKING_TO_CODEC_AIN5_N_CONN 34
20% J4300
6.3V
X5R AA37D-S014VA1
01005-1 F-ST-SM
ROOM=B2B_STROBE
MAKE_BASE=TRUE GND 19 20
X5R 56PF 34
5 6 34
01005-1 5% 7 8 BUTTON_POWER_KEY_CONN_L
2 25V 34
REARMIC2_TO_CODEC_AIN2_CONN_P BUTTON_RINGER_A_CONN
ROOM=B2B_STROBE NP0-C0G-CERM
01005 34
9 10 34
ROOM=B2B_STROBE
34
REARMIC2_TO_CODEC_AIN2_CONN_N 11 12 BUTTON_VOL_UP_CONN_L 34
REARMIC2_TO_CODEC_BIAS_FILT_RET 13 14 BUTTON_VOL_DOWN_CONN_L
FL4303
36 34
20% 5%
2 6.3V
X5R-CERM 2 10V
C0G-CERM 34
HAWKING_TO_CODEC_AIN5_N_CONN 1 2
0201 01005 ROOM=B2B_STROBE
ROOM=B2B_STROBE
OMIT_TABLE
ROOM=B2B_STROBE
OMIT
C4320 1
FL4306 220PF
150OHM-25%-200MA-0.7DCR R4308 5%
10V 2
REARMIC2_TO_CODEC_AIN2_P 2 1 REARMIC2_TO_CODEC_AIN2_CONN_P I2C1_AP_SCL 1
0.00 2 I2C1_AP_TO_MIC2_SCL C0G-CERM
35 OUT 34 48 11 IN 34 01005
ROOM=B2B_STROBE
01005
ROOM=B2B_STROBE
1 C4306 0%
1/32W
MF
1 C4308
56PF 01005 56PF
5% ROOM=B2B_STROBE 5%
2 25V
NP0-C0G-CERM 2 25V
NP0-C0G-CERM
01005 01005 PP_STROBE_DRIVER1_COOL_LED 32 34
ROOM=B2B_STROBE ROOM=B2B_STROBE
C4322 1
FL4307 220PF
150OHM-25%-200MA-0.7DCR R4309 5%
10V
REARMIC2_TO_CODEC_AIN2_N 2 1 REARMIC2_TO_CODEC_AIN2_CONN_N I2C1_AP_SDA 1
0.00 2 I2C1_AP_BI_MIC2_SDA C0G-CERM 2
35 OUT 34 48 11 IN 34 01005
ROOM=B2B_STROBE
01005
1 C4307 0%
1/32W
MF
1 C4309
56PF
ROOM=B2B_STROBE
56PF 01005
5% ROOM=B2B_STROBE 5%
2 25V
NP0-C0G-CERM 2 25V
NP0-C0G-CERM
01005 01005
ROOM=B2B_STROBE
ROOM=B2B_STROBE
BUTTON PP_STROBE_DRIVER2_WARM_LED 32 34
C4324 1
B R4312 R4310
220PF
5%
B
BUTTON_VOL_DOWN_L 100 BUTTON_VOL_DOWN_CONN_L 100
10V
C0G-CERM 2
21 1 2 34
21
BUTTON_POWER_KEY_L 1 2 BUTTON_POWER_KEY_CONN_L 34 01005
C4312 1 5% 1
DZ4312
ROOM=B2B_STROBE
220PF
1/32W
MF 12V-33PF C4310
27PF
1 5%
1/32W
1
5%
10V
01005
ROOM=B2B_BUTTON
01005-1
ROOM=B2B_BUTTON
5%
6.3V
MF
01005 DZ4310
C0G-CERM 2 2 NP0-C0G 2
ROOM=B2B_BUTTON
5.5V-6.2PF
01005 0201 0201
CHASSIS_GND_BS401 4 34
ROOM=B2B_BUTTON ROOM=B2B_BUTTON PP_STROBE_DRIVER2_COOL_LED 32 34
ROOM=B2B_BUTTON
2
CHASSIS_GND_BS401 4 34
C4326 1
220PF
5%
10V 2
R4313 R4311 C0G-CERM
01005
BUTTON_VOL_UP_L 1
100 2 BUTTON_VOL_UP_CONN_L BUTTON_RINGER_A 1
100 2 BUTTON_RINGER_A_CONN
ROOM=B2B_STROBE
21 34 21 34
C4313 1
5%
1/32W 1 DZ4313 C4311 1 5%
1/32W 1
220PF
MF
01005 12V-33PF 27PF
MF
01005
DZ4311 FL4330
5%
10V
ROOM=B2B_BUTTON
2
01005-1 5%
6.3V 2
ROOM=B2B_BUTTON 150OHM-25%-200MA-0.7DCR
5.5V-6.2PF
ROOM=B2B_BUTTON
C0G-CERM 2 NP0-C0G STROBE_MODULE_NTC 1 2 STROBE_MODULE_NTC_CONN
01005 0201 0201 32 34
ROOM=B2B_BUTTON CHASSIS_GND_BS401 4 34
ROOM=B2B_BUTTON ROOM=B2B_BUTTON
01005
2
R4330 1 1 C4330
CHASSIS_GND_BS401 27K ROOM=B2B_STROBE
220PF
4 34 0.5% 5%
1/32W
MF 2 10V
C0G-CERM
01005 2 01005
ROOM=B2B_STROBE
ROOM=B2B_STROBE
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
U4700
CS42L75
WLCSP
SYM 1 OF 3
48
LOWERMIC1_TO_CODEC_AIN1_P K3 AIN1+ CRITICAL AOUT+ K8
IN NC
48
LOWERMIC1_TO_CODEC_AIN1_N L3 AIN1-
ROOM=CODEC
AOUT- L8
IN NC
34 IN
REARMIC2_TO_CODEC_AIN2_P K4 AIN2+
34 IN
REARMIC2_TO_CODEC_AIN2_N L4 AIN2-
33 IN
FRONTMIC3_TO_CODEC_AIN3_P K6 AIN3+
33 IN
FRONTMIC3_TO_CODEC_AIN3_N L6 AIN3-
48 IN
LOWERMIC4_TO_CODEC_AIN4_P K5 AIN4+
48 IN
LOWERMIC4_TO_CODEC_AIN4_N L5 AIN4-
C C
34 IN
HAWKING_TO_CODEC_AIN5_P G3 AIN5+
34 IN
HAWKING_TO_CODEC_AIN5_N G2 AIN5-
F3 AIN6+
NC
G4 AIN6-
NC
5%
16V
R4700 NP0-C0G
01005
NC
C2 AIN8+
1
20.0 2
ROOM=CODEC
90_MIKEYBUS_DATA_P 47
D3 AIN8-
BI
NC 5%
1/32W
MF
NC
B8 DMIC1_CLK DP E1 90_MIKEYBUS_CODEC_DATA_P 01005
ROOM=CODEC
NC
D8 DMIC1_DATA DN F1 90_MIKEYBUS_CODEC_DATA_N
E11 DMIC2_CLK R4701
NC MBUS_REF G1 MIKEYBUS_REFERENCE 20.0
B 90_MIKEYBUS_DATA_N
B
48
E10 DMIC2_DATA
IN 1 2 47
NC BI
5%
NC
D10 DMIC3_CLK 1
R4710 1/32W
MF C4701
NC
D9 DMIC3_DATA 100 01005
100PF
5% ROOM=CODEC
E9 1/32W 1 2
NC DMIC4_CLK MF
F8 DMIC4_DATA 2 01005
ROOM=CODEC 5%
NC 16V
NP0-C0G
38 OUT
PDM_CODEC_TO_SPKRAMP_TOP_CLK B11 PDMOUT1_CLK
01005
ROOM=CODEC
38 OUT
PDM_CODEC_TO_SPKRAMP_TOP_DATA B10 PDMOUT1_DATA
39 OUT
PDM_CODEC_TO_ARC_CLK A10 PDMOUT2_CLK
39 OUT
PDM_CODEC_TO_ARC_DATA B9 PDMOUT2_DATA
F10 PDMOUT3_CLK
NC
F9 PDMOUT3_DATA
NC
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
R4830
33.2
R4801
I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK 1
20.0 2 I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK_R
48 39 37 OUT IN 5 13 36 38
5% MF
39 38 37 20
PP1V8_AUDIO_VA_S2 1/32W 01005
ROOM=CODEC
1 C4809 R4802
20.0 I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK_R
D
2.2UF
20%
48 39 37 OUT
I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK 1 2 IN 13 36 38
D
2 6.3V
5% MF
X5R-CERM 1/32W 01005
0201 ROOM=CODEC
ROOM=CODEC
OMIT_TABLE #29527815: Series R on ASP1 BCLK, LRCLK
CODEC_AGND 36
#30638490: Route U1000/U5000 ASP1 BCLK, LRCLK with _R
41 36 25 23 21 18 15 13 11 5
PP1V8_S2
50 48 47 46 45 43
50 43 41 28 22 20
PP_VDD_BOOST
R4800 1
1 C4812 1 C4814 1 C4805 #28287605: [P2] Add PU and connect to AOP
100K
5%
0.1UF 0.1UF 2.2UF 1/32W
20% 20% 20% MF
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
01005 2
ROOM=CODEC
01005 01005 0201
ROOM=CODEC ROOM=CODEC ROOM=CODEC U4700
OMIT_TABLE CS42L75
AOP_TO_CODEC_RESET_L J4 RESET* WLCSP JTAG_TMS E7
PP1V8_S2
13 IN NC
41 36 25 23 21 18 15 13 11 5 SYM 3 OF 3 JTAG_TCK D7
50 48 47 46 45 43 NC
1 C4811 1 C4813 1 C4815 JTAG_TDI E8
NC
15UF 0.1UF 0.1UF CODEC_TO_PMU_WAKE_L H3 JTAG_TDO F7
NC
20% 20% 20% 21 OUT WAKE*
2 6.3V
CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
0402-0.1MM 01005 01005 11 CODEC_TO_AP_INT_L D4 INT*
ROOM=CODEC
VD_FILT G11
20%
2 6.3V
VD C1
VL_SW A2
VD_FILT B1
VL A9
VA K2
SPI_AP_TO_CODEC_MOSI
VP_MBUS F2
2 6.3V
VP L9
VA J1
VA J2
X5R C8 MOSI
X5R 0201-1
11 IN
0201-1
ROOM=CODEC
ROOM=CODEC
11 SPI_CODEC_TO_AP_MISO B7 MISO
C
OUT
C I2S_AP_TO_CODEC_MCLK1 A4
11 IN MCLK1_IN TSTI G10
I2S_AOP_TO_CODEC_MCLK2 B4 TSTI J3
C4803 VOLTAGE=2.86V
PP_CODEC_TO_LOWERMIC1_BIAS
13 IN
CODEC_TO_SPKRAMP_BOT_ARC_MCLK_R A5
MCLK2_IN
TSTI J5
4.7UF 48
K11 MIC1_BIAS 36 OUT MCLK_OUT
LOWERMIC1_TO_CODEC_BIAS_FILT_RET 1 2 LOWERMIC1_BIAS_FILT_IN K10 CRITICAL
48 IN MIC1_BIAS_FILT ROOM=CODEC
U4700 38 36 13 5 OUT
I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK_R A6 ASP1_SCLK
20%
6.3V CS42L75 38 36 13 OUT
I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK_R C6 ASP1_LRCK/FSYNC
X5R-CERM1
402 WLCSP 48 39 13 IN
I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT B5 ASP1_SDIN
SYM 2 OF 3
ROOM=CODEC
I2S_CODEC_ASP1_TO_AOP_AMPS_DIN B6
C4804 VOLTAGE=2.86V
PP_CODEC_TO_REARMIC2_BIAS 1 C4820
39 38 37 13 OUT ASP1_SDOUT
4.7UF 34
J11 MIC2_BIAS LP_FILT+ D1 CODEC_LP_FILTP
REARMIC2_TO_CODEC_BIAS_FILT_RET REARMIC2_BIAS_FILT_IN J10 CODEC_LP_FILTN 0.1UF I2S_AOP_TO_CODEC_ASP2_BCLK C4
34 IN
1 2 MIC2_BIAS_FILT LP_FILT- D2 20% 13 IN ASP2_SCLK
2 6.3V
X5R-CERM 13 IN
I2S_AOP_TO_CODEC_ASP2_LRCLK D5 ASP2_LRCK/FSYNC
20%
6.3V 01005 13 IN
I2S_AOP_TO_CODEC_ASP2_DOUT D6 ASP2_SDIN
X5R-CERM1 ROOM=CODEC
402 13 OUT
I2S_CODEC_ASP2_TO_AOP_DIN C5 ASP2_SDOUT
ROOM=CODEC
C4801 VOLTAGE=2.86V
PP_CODEC_TO_FRONTMIC3_BIAS I2S_AP_TO_CODEC_ASP3_BCLK C11
4.7UF 33
K9 MIC3_BIAS 11 IN ASP3_SCLK
33 FRONTMIC3_TO_CODEC_BIAS_FILT_RET 1 2 FRONTMIC3_BIAS_FILT_IN J9 MIC3_BIAS_FILT 11 IN
I2S_AP_TO_CODEC_ASP3_LRCLK C9 ASP3_LRCK/FSYNC
IN
11 IN
I2S_AP_TO_CODEC_ASP3_DOUT C10 ASP3_SDIN
20%
6.3V 11 OUT
I2S_CODEC_ASP3_TO_AP_DIN D11 ASP3_SDOUT
X5R-CERM1
402 H4 F5
ROOM=CODEC DIGLDO_PULLDN GNDA
C4802 VOLTAGE=2.86V
PP_CODEC_TO_LOWERMIC4_BIAS
H5 DIGLDO_EN GNDA G5
4.7UF 48
H9 MIC4_BIAS GNDA G6
48 IN
LOWERMIC4_TO_CODEC_BIAS_FILT_RET 1 2 LOWERMIC4_BIAS_FILT_IN H8 MIC4_BIAS_FILT A3 SW1_CLK GNDA G7
NC
20% C3 SW1_SD GNDA H1
6.3V NC
X5R-CERM1
402
1 C4823 1 C4824 GNDA H2
H6
1.0UF 1.0UF B3 SW2_CLK GNDA
B B
ROOM=CODEC
20% 20% NC
B2 H7
2 6.3V 2 6.3V 1 C4808 NC SW2_SD GNDA
X5R
0201-1
X5R
0201-1 NC
H11 MIC5_BIAS FILT+ K1 CODEC_FILTP GNDA J6
10UF
ROOM=CODEC ROOM=CODEC
NC
H10 MIC5_BIAS_FILT FILT- L2 20% 13
CODEC_TO_AOP_GPIO1 E6 GPIO1 GNDA J7
2 6.3V
OUT
CERM-X5R
0402-0.1MM 13 OUT
CODEC_TO_AOP_GPIO2 E5 GPIO2 GNDA J8
E4
AOP_TO_CODEC_CLP_EN GNDA
ROOM=CODEC
F6 CLP_EN
C4822 C4825
13 IN
1 1
1.0UF 1.0UF
20% 20% G8 MIC6_BIAS
2 6.3V
X5R 2 6.3V
X5R
NC
G9
0201-1 0201-1 NC MIC6_BIAS_FILT
ROOM=CODEC ROOM=CODEC
GNDD GNDP
A1
A8
A11
E2
F11
K7
L1
L7
L10
L11
XW4802
SHORT-10L-0.1MM-SM
2 1 36 CODEC_AGND
ROOM=CODEC
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
39 38 32 28 25 24 22 20 19 5
PP_VDD_MAIN PP1V8_AUDIO_VA_S2 20 36 38 39
50 48 47 45 44 42 41 40
APN:152S00652/152S00654 (1.2UH-20%-3A-0.077OHM)
M5500
NIKI-A
A5
F5
SIP
C M4 VDD_S SYM 2 OF 6
SPK M2 VP VA C
N4 VDD_S SPK N2
P4 VDD_S SPK P2 SPKRAMP_BOT_LX A2
SW U4900 VBST_B
A1 VOLTAGE=8.0V PP_SPKRAMP_BOT_VBOOST
B2 B1 CRITICAL
CS35L26B-A1
Inductor in SIP
SW
WLCSP
VBST_B 1 C4927 1 C4928 1 C4903 1 C4904 1 C4931 1 C4910
43 39 13
I2C1_AOP_SDA D6
SDA VBST_A
C1 220PF 0.1UF 10UF 10UF 10UF 17UF
BI
ROOM=SPKAMP1 D1 5% 10% 20% 20% 20% 20%
I2C1_AOP_SCL E6 VBST_A 2 10V
C0G-CERM 2 16V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 16V
X5R
43 39 13 IN SCL CRITICAL 01005 0201 0402-0.1MM 0402-0.1MM 0402-0.1MM 1206
ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1
39 13 BI
SPKRAMP_BOT_ARC_TO_AOP_INT_L A7
INT* OMIT_TABLE OMIT_TABLE OMIT_TABLE
39 13 IN
AOP_TO_SPKRAMP_BOT_ARC_RESET_L A6
RESET*
#29343419: Change C4910 to ceramic part
SPKRAMP_BOT_TO_SPKRAMP_TOP_SYNC F6
ALIVE/SYNC ISNS+
F1 SPKRAMP_BOT_ISENSE_P
1 C4930
38 BI 0.01UF
E5 ISNS-
E1 SPKRAMP_BOT_ISENSE_N 10%
AD0/PDM_CLK1 2 6.3V
X5R
01005
39 36 IN
CODEC_TO_SPKRAMP_BOT_ARC_MCLK B7
MCLK
ROOM=SPKAMP1
NO_XNET_CONNECTION
E2 COIL_TO_SPKRAMP_BOT_VSENSE_P
I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK C7 VSNS+ IN 48
48 39 36 IN SCLK
VSNS-
E3 COIL_TO_SPKRAMP_BOT_VSENSE_N IN 48
48 39 36 IN
I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK C6
LRCK/FSYNC
D7 #31657976: Change C4922/C4934 to 220PF Based on DOE
SDIN
OUT+
D2 VOLTAGE=8.0V SPKRAMP_BOT_TO_COIL_OUT_POS 48
39 38 36 13 BI
I2S_CODEC_ASP1_TO_AOP_AMPS_DIN B6
SDOUT OUT-
C2 VOLTAGE=8.0V SPKRAMP_BOT_TO_COIL_OUT_NEG 48
F7
NC PDM_CLK0
C4922 1 1 C4934
E7
PDM_DATA0 FILT+
F4 SPKRAMP_BOT_FILT 220PF 220PF
NC 5% 5%
D5 F3 10V 2 2 10V
C0G-CERM C0G-CERM
PDM_DATA1
GNDP GNDA
AD1 1 C4929 01005 01005
2.2UF
B
ROOM=SPKAMP1 ROOM=SPKAMP1
B 20%
A3
A4
B3
B4
C3
C4
C5
D3
D4
B5
E4
F2
2 6.3V
X5R-CERM
0201
ROOM=SPKAMP1
OMIT_TABLE
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
39 37 32 28 25 24 22 20 19 5
PP_VDD_MAIN PP1V8_AUDIO_VA_S2 20 36 37 39
50 48 47 45 44 42 41 40
A5
F5
L5000 VP VA
C 1.2UH-20%-3A-0.077OHM C
1 2 SPKRAMP_TOP_LX A2 SW U5000 VBST_B A1 VOLTAGE=8.0V PP_SPKRAMP_TOP_VBOOST
MEHK2016T-SM CS35L26B-A1
ROOM=SPKAMP2
B2 SW
WLCSP
VBST_B B1 1 C5012 1 C5011 1 C5024 1 C5025 1 C5006 1 C5008
33 11
I2C2_AP_SDA D6 SDA VBST_A C1 220PF 0.1UF 10UF 10UF 10UF 10UF
BI
ROOM=SPKAMP2 5% 10% 20% 20% 20% 20%
I2C2_AP_SCL VBST_A D1 2 10V
C0G-CERM 2 16V
X5R-CERM 2 10V
X5R-CERM
10V
2 X5R-CERM 10V
2 X5R-CERM 10V
2 X5R-CERM
33 11 IN E6 SCL CRITICAL 01005 0201 0402-0.1MM 0402-0.1MM 0402-0.1MM 0402-0.1MM
12 BI
SPKRAMP_TOP_TO_AP_INT_L A7 INT*
ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2
38 12 IN
AP_TO_SPKRAMP_TOP_RESET_L A6 RESET*
#30638490: Route U1000/U5000 ASP1 BCLK, LRCLK with _R SPKRAMP_BOT_TO_SPKRAMP_TOP_SYNC F6 ALIVE/SYNC ISNS+ F1 SPKRAMP_TOP_ISENSE_P
1 C5019
37 BI 0.01UF
SPKRAMP_TOP_ISENSE_N 10%
PDM_SPKRAMP_TOP_TO_CONVOY_CLK ISNS- E1
Pull Downs 38 33
11
OUT
I2S_AP_TO_SPKRAMP_TOP_MCLK
E5
B7
AD0/PDM_CLK1
MCLK
2 6.3V
X5R
01005
ROOM=SPKAMP2
AP_TO_SPKRAMP_TOP_RESET_L 12 38
IN
COIL_TO_SPKRAMP_TOP_VSENSE_P NO_XNET_CONNECTION
PDM_SPKRAMP_TOP_TO_CONVOY_CLK I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK_R VSNS+ E2 IN 33
33 38
36 13 5 IN C7 SCLK
VSNS- E3 COIL_TO_SPKRAMP_TOP_VSENSE_N IN 33
I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK_R
1
R5001 1
R5004 36 13 IN C6 LRCK/FSYNC
100K 100K
5% 5% D7 SDIN
OUT+ D2 VOLTAGE=8.0V SPKRAMP_TOP_TO_COIL_OUT_POS 27 33
1/32W 1/32W
MF MF 39 37 36 13
I2S_CODEC_ASP1_TO_AOP_AMPS_DIN B6 SDOUT OUT- C2 VOLTAGE=8.0V SPKRAMP_TOP_TO_COIL_OUT_NEG 27 33
2 01005 2 01005
BI
ROOM=SPKAMP2 ROOM=SPKAMP2
35 IN
PDM_CODEC_TO_SPKRAMP_TOP_CLK F7 PDM_CLK0 C5000 1 1 C5001
470PF 470PF
35
PDM_CODEC_TO_SPKRAMP_TOP_DATA E7 PDM_DATA0 FILT+ F4 SPKRAMP_TOP_FILT 10%
10V 2
10%
2 10V
IN
X5R X5R
33
PDM_CONVOY_TO_SPKRAMP_TOP_DATA D5 PDM_DATA1 AD1 F3 01005 01005
IN GNDP GNDA ROOM=SPKAMP2 ROOM=SPKAMP2
1 C5018
2.2UF
B B
A3
A4
B3
B4
C3
C4
C5
D3
D4
B5
E4
F2
20%
2 6.3V
X5R-CERM
0201
ROOM=SPKAMP2
OMIT_TABLE
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D ARC DRIVER D
APN: 338S00295
I2C ADDRESS: 1000 001x (0x82)
38 37 32 28 25 24 22 20 19 5
PP_VDD_MAIN PP1V8_AUDIO_VA_S2 20 36 37 38 39
50 48 47 45 44 42 41 40
C C
A5
F5
ROOM=ARC_CTRL
L5100 VP VA
1.2UH-20%-3A-0.11OHM
1 2 ARC1_LX A2
SW U5100 VBST_B
A1 VOLTAGE=8.0V PP_ARC1_VBOOST
B2 B1
MEFE2016T-SM CS35L26B-A1
SW
WLCSP
VBST_B 1 C5126 1 C5135 1 C5137 1 C5124 1 C5138 1 C5139
I2C1_AOP_SDA D6
SDA VBST_A
C1 220PF 0.1UF 10UF 10UF 10UF 10UF
Pull Downs
43 37 13 BI
ROOM=ARC_CTRL D1 5% 10% 20% 20% 20% 20%
I2C1_AOP_SCL E6 VBST_A 2 10V
C0G-CERM 2 16V
X5R-CERM 2 10V 2 10V 2 10V 2 10V
43 37 13 IN SCL CRITICAL 01005 0201 X5R-CERM X5R-CERM X5R-CERM X5R-CERM
ROOM=ARC_CTRL ROOM=ARC_CTRL
0402-0.1MM 0402-0.1MM 0402-0.1MM 0402-0.1MM
SPKRAMP_BOT_ARC_TO_AOP_INT_L A7 ROOM=ARC_CTRL ROOM=ARC_CTRL ROOM=ARC_CTRL ROOM=ARC_CTRL
AOP_TO_SPKRAMP_BOT_ARC_RESET_L 13 37 39
37 13 BI INT*
39 37 13 IN
AOP_TO_SPKRAMP_BOT_ARC_RESET_L A6
RESET*
F6 F1 ARC1_ISENSE_P
1 C5128
1
R5108 NC ALIVE/SYNC ISNS+
E1 ARC1_ISENSE_N
0.01UF
100K PP1V8_AUDIO_VA_S2 PP1V8_AUDIO_VA_S2 E5 ISNS- 10%
5% 39 38 37 36 20 AD0/PDM_CLK1 2 6.3V
X5R
1/32W MAKE_BASE=TRUE 01005
MF CODEC_TO_SPKRAMP_BOT_ARC_MCLK B7
MCLK ROOM=ARC_CTRL
2 01005 37 36 IN NO_XNET_CONNECTION
ROOM=ARC_CTRL
I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK C7 VSNS+
E2 SOLENOID1_TO_ARC1_VSENSE_P IN 48
48 37 36 IN SCLK
VSNS-
E3 SOLENOID1_TO_ARC1_VSENSE_N IN 48
48 37 36 IN
I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK C6
LRCK/FSYNC
I2S_CODEC_ASP1_TO_AOP_AMPS_DIN D7
VOLTAGE=8.0V
38 37 36 13 IN SDIN
OUT+
D2 ARC1_TO_SOLENOID1_OUT_POS 48
48 36 13 OUT
I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT B6
SDOUT OUT-
C2 VOLTAGE=8.0V ARC1_TO_SOLENOID1_OUT_NEG 48
PDM_CODEC_TO_ARC_CLK F7
35 IN PDM_CLK0
C5129 1 1 C5142
PDM_CODEC_TO_ARC_DATA E7 F4 ARC1_FILT 470PF 470PF
B 35 IN
D5
PDM_DATA0 FILT+
F3
10%
10V 2
10%
2 10V
B
X5R X5R
PDM_DATA1
GNDP GNDA
AD1 1 C5136 01005
ROOM=ARC_CTRL
01005
ROOM=ARC_CTRL
#28947109: Arc TDM support 2.2UF
20%
A3
A4
B3
B4
C3
C4
C5
D3
D4
B5
E4
F2
2 6.3V
X5R-CERM
0201
ROOM=ARC_CTRL
OMIT_TABLE
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
ARC: Driver
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
Niki SIP
D D
APN:152S00683 (0.47UF-20%-7.2A-0.028OHM)
M5500
NIKI-A
SIP
A3 M5500 GND N3
TIGRIS_MID T2 TIG_MID
SYM 1 OF 6
VDD_T T5 PP_VDD_MAIN GND
NIKI-A
5 19 20 22 24 25 28 32 37 38 39
41 42 44 45 47 48 50 A4 GND GND N5
T3 TIG_MID VDD_T T6 SIP
A5 GND SYM 6 OF 6 GND N7
U2 TIG_MID VDD_T U5
A6 GND GND P1
U3 TIG_MID VDD_T U6
A7 GND GND P3
V2 TIG_MID VDD_T V5
B4 GND GND P5
V3 TIG_MID VDD_T V6
B7 GND GND P7
W2 TIG_MID VDD_T W5
C4 GND GND R1
W3 TIG_MID VDD_T W6
C7 GND GND R2
Y2 TIG_MID
TIGRIS_LX0 AC5 TIGRIS_LX D1 GND GND R3
Y3 TIG_MID
24
AC7 GND2_SR_TOP_FRC1
AD7 GND2_SR_TOP_SNS1
AE7 GND2_SR_TOP_SNS2
AE6 GND2_SR_TOP_FRC2
A1 GND1_SR_TB_FRC1
A2 GND1_SR_TB_SNS1
B1 GND1_SR_TB_SNS2
C1 GND1_SR_TB_FRC2
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
CG: Niki
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
1 C5690 1
15UF APN:338S1172
20%
L5600 6.3V 2
CERM U5600
PP_CHESTNUT_CP
1.0UH-20%-2.25A-0.15OHM 0402-0.1MM VOLTAGE=6.0V
PIXB2016FE-SM ROOM=CHESTNUT TPS65730A0PYFF
BGA CF1 C4
1 C5600
ROOM=CHESTNUT 10UF
CRITICAL D1 VIN ROOM=CHESTNUT CF2 E4 20%
2 CRITICAL VOLTAGE=-6.0V 2 10V
X5R-CERM
CHESTNUT_LX PN_CHESTNUT_CN
D
B2 SW 0402-0.1MM
ROOM=CHESTNUT
OMIT_TABLE
D
A2 SYNC LCMBST B3 PP6V0_DISPLAY_BOOST
NO INT PULL
I2C0_AP_SCL CPUMP B4
R5600 45 41 21 11 IN
D3 SCL
5%
1/32W 42 21 IN
DISPLAY_TO_CHESTNUT_PWR_EN C3 LCM_EN VNEG(SUB) E2
MF 200K INT PD
01005
ROOM=CHESTNUT 47 21 7 IN
PMU_TO_AP_HYDRA_ACTIVE_READY C2 RESET* HVLDO1 A4 PP5V7_MESON_AVDDH 42
NO INT PULL VOLTAGE=5.7V
21 OUT
CHESTNUT_TO_PMU_AMUX E1 ADCMUX HVLDO2 A3 PP5V7_DISPLAY_AVDDH 42
B1 PGND1
D4 PGND2
C1 AGND
HVLDO3 A1 PP5V1_TOUCH_VDDH 42
VOLTAGE=5.1V
1 C5601 1 C5602 1 C5603 1 C5604 1 C5606 1 C5607 1 C5608
1UF 10UF 10UF 10UF 4.7UF 4.7UF 220PF
20% 20% 20% 20% 20% 20% 5%
2 16V
CER-X5R 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM
10V
2 X5R-CERM 2 10V
C0G-CERM
0201 0402-0.1MM 0402-0.1MM 0402-0.1MM 0402 0402 01005
6LED L5651
1UH-20%-2.8A-0.1OHM
1 2 BL12_SW2_LX
PINA2016FE-SM 25V
ROOM=BACKLIGHT
APN:152S00248/152S00603 (12.5UH-15%-1.1A-0.66OHM)
M5500 CRITICAL
NIKI-A
C SIP D5651
DSN2 C
G2 SYM 3 OF 6 G5 A K
VDD12 BL12
G3 VDD12 BL12 G6
H2 VDD12 BL12 H5 NSR05F30NXT5G
ROOM=BACKLIGHT
H3 VDD12 BL12 H6
J2 VDD12 BL12 J5
CRITICAL
J3
K2
VDD12 BL12 J6
K5
D5650
VDD12 BL12 NSR0530P2T5G
38 37 32 28 25 24 22 20 19 5
PP_VDD_MAIN K3 VDD12 BL12 K6 BL12_SW1_LX A K PP_DISPLAY_BL12_ANODE 42
50 48 47 45 44 42 41 40 39
25V
C5695 1
APN:353s00640
SOD-923-1 1 C5650 1 C5652 1 C5654
15UF ROOM=BACKLIGHT 220PF 2.2UF 2.2UF
20% 5% 20% 20%
6.3V 2 2 25V 2 35V 2 35V
CERM COG X5R X5R
0402-0.1MM
ROOM=BACKLIGHT U5650 01005 0402 0402
LM3539A1
D4 IN DSBGA OUT A1
CRITICAL ROOM=BACKLIGHT ROOM=BACKLIGHT ROOM=BACKLIGHT
PP1V8_S2 D3 VIO/HWEN SW1 C4 PLACE_NEAR=U5650:2MM
C5651 C5653 C5655
41 36 25 23 21 18 15 13 11 5
50 48 47 46 45 43 1 1 1
DWI_PMGR_TO_BACKLIGHT_DATA
MOJAVE MESA BOOST
41 11 5 IN C2 SDI SW2_1 A3 2.2UF 2.2UF 2.2UF
DWI_PMGR_TO_BACKLIGHT_CLK C3 SCK SW2_2 A4
20% 20% 20%
41 11 5 IN 2 35V
X5R 2 35V
X5R 2 35V
X5R
48 42 11 BI
I2C3_AP_SDA B2 SDA LED1 C1 PP_DISPLAY_BL12_CAT1 42
0402 0402 0402
APN:353S00671
11
I2C3_AP_SCL A2 SCL LED2 B1 PP_DISPLAY_BL12_CAT2 42
42
48
IN
ROOM=BACKLIGHT ROOM=BACKLIGHT ROOM=BACKLIGHT CRITICAL
41
9 IN
AP_TO_MUON_BL_STROBE_EN D1 TRIG ROOM=BACKLIGHT L5610
50 BB_TO_STROBE_DRIVER_GSM_BURST_IND 1.0UH-20%-0.4A-0.636OHM
32 D2 INHIBIT
41 IN
PP_VDD_MAIN 1 2
GND
GND
38 37 32 28 25 24 22 20 19 5
50 48 47 45 44 42 41 40 39
1
R5650 C5610 1 0403
B 15UF
ROOM=MOJAVE
B
B3
B4
200K
1% 20%
6.3V 2 U5610
1/32W
MF L5661 CERM
0402-0.1MM LM3638A0 PP16V0_MESA
2 01005 1UH-20%-2.8A-0.1OHM ROOM=MOJAVE BGA VOLTAGE=16.0V
43
ROOM=BACKLIGHT
1 2 BL34_SW2_LX POS18V0_MESA_LX B1 SW
ROOM=MOJAVE 1 C5612 1 C5613
CRITICAL 220PF 2.2UF
PINA2016FE-SM 25V PP_VDD_BOOST 5% 20%
ROOM=BACKLIGHT 50 43 36 28 22 20 A2 VIN VOUT C3 2 25V 2 35V
APN:152S00248/152S00603 (12.5UH-15%-1.1A-0.66OHM) COG X5R
C5611 1
43
MESA_TO_BOOST_EN B2 EN_M
01005
ROOM=MOJAVE
0402
ROOM=MOJAVE
4LED
2.2UF IN
M5500 CRITICAL
20%
6.3V 2
A3 EN_S
NIKI-A
SIP D5661 X5R-CERM
0201 PP17V0_MOJAVE_LDOIN C2 LDOIN PMID C1
PGND
AGND
DSN2 ROOM=MOJAVE VOLTAGE=17.0V
B2 VDD34
SYM 4 OF 6
BL34 B5 A K OMIT_TABLE 1 C5614 1 C5615
B3 VDD34 BL34 B6 220PF 2.2UF
A1
B3
5% 20%
C2 VDD34 BL34 C5 NSR05F30NXT5G 2 25V 2 35V
ROOM=BACKLIGHT COG X5R
C3 VDD34 BL34 C6 01005 0402
ROOM=MOJAVE ROOM=MOJAVE
D2 VDD34 BL34 D5 CRITICAL
D3
E2
VDD34 BL34 D6
E5
D5660 PLACE_NEAR=U5610:0.5MM
VDD34 BL34
BL34_SW1_LX NSR0530P2T5G
38 37 32 28 25 24 22 20 19 5
PP_VDD_MAIN E3 VDD34 BL34 E6 A K PP_DISPLAY_BL34_ANODE 42
50 48 47 45 44 42 41 40 39
25V
C5696 1
APN:353s00640
SOD-923-1 1 C5660 1 C5662 1 C5664
15UF ROOM=BACKLIGHT 220PF 2.2UF 2.2UF
20% 5% 20% 20%
6.3V 2 2 25V 2 35V 2 35V
CERM COG X5R X5R
0402-0.1MM
ROOM=BACKLIGHT U5660
LM3539A1
01005 0402 0402
DWI_PMGR_TO_BACKLIGHT_DATA
D3 VIO/HWEN SW1 C4
1 C5661 1 C5663
2.2UF
1 C5665
2.2UF A
C2 SDI SW2_1 A3 2.2UF
SYNC_MASTER=sync SYNC_DATE=04/14/2017
56 OF 80
B3
B4
240OHM-25%-0.2A-0.9OHM 42 42
AP_TO_DISPLAY_RESET_CONN_L PP1V8_DISPLAY_CONN
41
PN5V7_DISPLAY_MESON_AVDDN 2 1 PN5V7_DISPLAY_MESON_AVDDN_CONN 42
AOP/TOUCH INTERFACE FL5760 42
PP5V1_TOUCH_VDDH_CONN
17
19
18
20 PP5V7_DISPLAY_AVDDH_CONN
42
150OHM-25%-200MA-0.7DCR
C5710
42 42
01005 1 PP1V8_TOUCH_CONN 21 22 DISPLAY_TO_CHESTNUT_PWR_EN_CONN
ROOM=B2B_DISPLAY
220PF DISPLAY_TO_MANY_BSYNC 2 1 DISPLAY_TO_MANY_BSYNC_CONN 42 42
5%
22 21 13
50 29 OUT 42
42
PN5V7_DISPLAY_MESON_AVDDN_CONN 23 24 DISPLAY_TO_MANY_BSYNC_CONN 42
01005
2 10V
C0G-CERM ROOM=B2B_DISPLAY 1 C5760 PP5700 42
PP5V7_MESON_AVDDH_CONN 25 26 GND_VOID=TRUE
240-OHM-25%-0.42A-0.31DCR NP0-C0G-CERM PP 42
01005 90_MIPI_AP_TO_DISPLAY_CLK_CONN_P 31 32 GND_VOID=TRUE
ROOM=B2B_DISPLAY 56PF 42 5 42
ROOM=B2B_DISPLAY
OMIT_TABLE 5% 42 5
PP_DISPLAY_BL34_CAT1_CONN 43 44 GND_VOID=TRUE
2 25V
GND_VOID=TRUE
NP0-C0G-CERM
01005 42 5
PP_DISPLAY_BL34_ANODE_CONN 45 46 90_MIPI_AP_TO_DISPLAY_DATA3_CONN_P 42
FL5752 150OHM-25%-200MA-0.7DCR
AP_TO_DISPLAY_RESET_L
150OHM-25%-200MA-0.7DCR
2 1 AP_TO_DISPLAY_RESET_CONN_L
12 OUT
TOUCH_TO_AP_INT_L 2 1 TOUCH_TO_AP_INT_CONN_L 42 DISPLAY MIPI L5754 CRITICAL
12 IN
01005 NOSTUFF
42 01005
ROOM=B2B_DISPLAY
1 C5766 90_MIPI_AP_TO_DISPLAY_CLK_N
65OHM-0.7-2GHZ-3.4OHM
TAM0605
90_MIPI_AP_TO_DISPLAY_CLK_CONN_N
R5753 1 ROOM=B2B_DISPLAY 1 C5752 1 C5751 5%
220PF 9 IN
4 SYM_VER-2 1 42
220PF 1000PF
GND_VOID=TRUE
ROOM=B2B_DISPLAY 2
R5754
ROOM=B2B_DISPLAY ROOM=B2B_DISPLAY
11 IN
2 1 42 L5750 CRITICAL
PMU_TO_DISPLAY_PANICB 1
10 2 PMU_TO_DISPLAY_PANICB_CONN 1%
1/32W
1 C5768 65OHM-0.7-2GHZ-3.4OHM
TAM0605
21 IN 42
MF 100PF 9 BI
90_MIPI_AP_TO_DISPLAY_DATA0_P 4 SYM_VER-2 1 90_MIPI_AP_TO_DISPLAY_DATA0_CONN_P 42
5%
1/32W
MF
1 C5754 01005
ROOM=B2B_DISPLAY
5%
2 16V GND_VOID=TRUE
GND_VOID=TRUE
I2C3_AP_SCL 1
0.00 2
ROOM=B2B_DISPLAY
65OHM-0.7-2GHZ-3.4OHM
AP/TOUCH INTERFACE
41 11 IN
48
0%
1/32W
FL5770 9
90_MIPI_AP_TO_DISPLAY_DATA1_P 4
TAM0605
SYM_VER-2 1 90_MIPI_AP_TO_DISPLAY_DATA1_CONN_P 42
MF I2C_DISP_EEPROM_SCL_CONN 42
150OHM-25%-200MA-0.7DCR IN
GND_VOID=TRUE
01005
SPI_AP_TO_TOUCH_CS_L SPI_AP_TO_TOUCH_CS_CONN_L
GND_VOID=TRUE
ROOM=B2B_DISPLAY CKPLUS_WAIVE=I2C_PULLUP 11
2 1 42
I2C_DISP_EEPROM_SDA_CONN IN
90_MIPI_AP_TO_DISPLAY_DATA1_N 3 2 90_MIPI_AP_TO_DISPLAY_DATA1_CONN_N
R5756 CKPLUS_WAIVE=I2C_PULLUP
42 01005
ROOM=B2B_DISPLAY 1 C5770 9 IN
ROOM=B2B_DISPLAY
42
C5756 C5755
GND_VOID=TRUE
0.00
1 1 56PF L5752 CRITICAL
I2C3_AP_SDA 1 2 56PF 56PF 5%
48 41 11 BI 5% 5% 2 25V
NP0-C0G-CERM
65OHM-0.7-2GHZ-3.4OHM
TAM0605
25V 2 25V 90_MIPI_AP_TO_DISPLAY_DATA2_P 90_MIPI_AP_TO_DISPLAY_DATA2_CONN_P
0%
1/32W NP0-C0G-CERM 2
01005
NP0-C0G-CERM
01005 R5772 01005
ROOM=B2B_DISPLAY 9 IN
4 SYM_VER-2 1 42
MF
01005 ROOM=B2B_DISPLAY ROOM=B2B_DISPLAY SPI_AP_TO_TOUCH_SCLK 1
0.00 2 SPI_AP_TO_TOUCH_SCLK_CONN GND_VOID=TRUE
GND_VOID=TRUE
11 IN 42
ROOM=B2B_DISPLAY
90_MIPI_AP_TO_DISPLAY_DATA2_N 3 2 90_MIPI_AP_TO_DISPLAY_DATA2_CONN_N
B
0%
1/32W
MF
1 C5772
56PF
9 IN
ROOM=B2B_DISPLAY GND_VOID=TRUE
42
B
BACKLIGHT 01005
5% L5753 CRITICAL
2 25V 65OHM-0.7-2GHZ-3.4OHM
ROOM=B2B_DISPLAY
#32464647:C5730 to 56PF to Improve GPS L1 Desense NP0-C0G-CERM
R5730
TAM0605
01005 9 IN
90_MIPI_AP_TO_DISPLAY_DATA3_P 4 SYM_VER-2 1 90_MIPI_AP_TO_DISPLAY_DATA3_CONN_P 42
ROOM=B2B_DISPLAY
41
PP_DISPLAY_BL12_ANODE 1
0.00 2 PP_DISPLAY_BL12_ANODE_CONN 5 42
FL5774 GND_VOID=TRUE
GND_VOID=TRUE
1% MF 150OHM-25%-200MA-0.7DCR
1/20W 0201 1 C5730 SPI_AP_TO_TOUCH_MOSI 2 1 SPI_AP_TO_TOUCH_MOSI_CONN 9 IN
90_MIPI_AP_TO_DISPLAY_DATA3_N 3 2 90_MIPI_AP_TO_DISPLAY_DATA3_CONN_N 42
ROOM=B2B_DISPLAY 56PF 11 IN 42 ROOM=B2B_DISPLAY GND_VOID=TRUE
5% 01005
2 25V
NP0-C0G-CERM
ROOM=B2B_DISPLAY 1 C5774
56PF
R5731 01005
ROOM=B2B_DISPLAY 5%
PP_DISPLAY_BL12_CAT1 0.00 PP_DISPLAY_BL12_CAT1_CONN 2 25V
41 1 2 5 42
NP0-C0G-CERM
01005 38 37 32 28 25 24 22 20 19 5
PP_VDD_MAIN
1% MF
1/20W 0201 1 C5731 FL5776 ROOM=B2B_DISPLAY 50 48 47 45 44 41 40 39
ROOM=B2B_DISPLAY
5%
220PF 150OHM-25%-200MA-0.7DCR 1 C5742 1 C5744 1 C5746 1
C5748 1
C5790
2 25V SPI_TOUCH_TO_AP_MISO 2 1 SPI_TOUCH_TO_AP_MISO_CONN 220PF 220PF 220PF 220PF 220PF
COG 11 42
5% 5% 5% 5% 5%
R5732
OUT
01005 01005 2 10V 2 10V 2 10V 2 10V 2 10V
PP_DISPLAY_BL12_CAT2 0.00
ROOM=B2B_DISPLAY
PP_DISPLAY_BL12_CAT2_CONN
ROOM=B2B_DISPLAY 1 C5776 C0G-CERM
01005
C0G-CERM
01005
C0G-CERM
01005
C0G-CERM
01005
C0G-CERM
01005
41 1 2 5 42 56PF ROOM=B2B_DISPLAY ROOM=B2B_DISPLAY ROOM=B2B_DISPLAY ROOM=B2B_DISPLAY ROOM=B2B_DISPLAY
1% MF 5%
1/20W 0201 1 C5732 FL5778 2 25V
NP0-C0G-CERM
ROOM=B2B_DISPLAY
220PF 150OHM-25%-200MA-0.7DCR 01005
ROOM=B2B_DISPLAY 1 C5741 1 C5743 1 C5745 1
C5747 1
C5749 1 C5791
5%
AP_TO_TOUCH_MAMBA_RESET_L AP_TO_TOUCH_MAMBA_RESET_CONN_L 220PF 220PF 220PF 220PF 220PF 220PF
2 25V
COG 12
2 1 42 43
5% 5% 5% 5% 5% 5%
R5733
IN
01005 01005 2 10V 2 10V 2 10V
C0G-CERM 2 10V
C0G-CERM 2 10V
C0G-CERM 2 10V
PP_DISPLAY_BL34_ANODE 1
0.00 2
ROOM=B2B_DISPLAY
PP_DISPLAY_BL34_ANODE_CONN
ROOM=B2B_DISPLAY 1 C5778 1 C5779 C0G-CERM
01005
C0G-CERM
01005 01005
ROOM=B2B_DISPLAY
01005
ROOM=B2B_DISPLAY
01005
ROOM=B2B_DISPLAY
C0G-CERM
01005
41
1% MF
5 42
220PF 220PF ROOM=B2B_DISPLAY ROOM=B2B_DISPLAY ROOM=B2B_DISPLAY
41 5 42
ROOM=B2B_MAMBA_MESA ROOM=B2B_MAMBA_MESA PAGE TITLE
43
I2C1_AOP_TO_MESA_TURTLE_SCL_CONN 9 10 GUARD
43
D
PP1V8_MESA_S2 1 2 PP1V8_MESA_CONN 43 5
MESA_TO_BOOST_EN_CONN 11 12 MAMBA_TO_DISPLAY_MDRIVE_CONN 43
20 43
43 MESA_TO_AP_INT_CONN 13 14 DISPLAY_TO_MAMBA_MSYNC_CONN 42
1 C5811 ROOM=B2B_MAMBA_MESA
01005
1 C5810
43
43
SPI_AP_TO_MESA_SCLK_CONN 15 16 AP_TO_TOUCH_MAMBA_RESET_CONN_L 42
43
PP5800
P2MM-NSM
2.2UF 220PF SPI_AP_TO_MESA_MOSI_CONN 17 18 TP_MAMBA_HINT_L 1
SM
20% 5% 43 PP
2 6.3V
X5R-CERM 2 10V
C0G-CERM 43
AOP_TO_MESA_BLANKING_EN_CONN 19 20 I2C_TOUCH_BI_MAMBA_SDA 42 43 ROOM=TEST
0201
ROOM=B2B_MAMBA_MESA
01005
ROOM=B2B_MAMBA_MESA 43
SPI_MESA_TO_AP_MISO_CONN 21 22 I2C_TOUCH_TO_MAMBA_SCL 42
OMIT_TABLE
FL5820 43
PP2V75_MAMBA_CONN 23 24 PP1V8_TOUCH_TO_MAMBA_CONN 43
150OHM-25%-200MA-0.7DCR
41
PP16V0_MESA 1 2 PP16V0_MESA_CONN 5 43
27 28
01005
ROOM=B2B_MAMBA_MESA 1 C5820 30
220PF ROOM=B2B_MAMBA_MESA
5%
2 25V
COG
01005
ROOM=B2B_MAMBA_MESA
R5843 1 1% 1 C5842 1%
C5848
OMIT X5R-CERM C0G-CERM
5
1/32W 1/32W 1 0402-0.1MM 01005
511K MF
01005
56PF #31201019: Change R5842 to 50 ohms
MF
01005 220PF
ROOM=B2B_MAMBA_MESA
ROOM=B2B_MAMBA_MESA
1% 5% 5%
1/32W
MF
ROOM=B2B_MAMBA_MESA 2 25V
NP0-C0G-CERM
ROOM=B2B_MAMBA_MESA
2 10V
C0G-CERM R5880
01005 2 01005
ROOM=B2B_MAMBA_MESA
01005
PP1V8_TOUCH 1
0.00 2 PP1V8_TOUCH_TO_MAMBA_CONN
ROOM=B2B_MAMBA_MESA ROOM=B2B_MAMBA_MESA 43 42 18 43
0%
1/32W 1 C5880 1 C5881
FL5850 MF
01005
20%
2.2UF
5%
220PF
R5844 150OHM-25%-200MA-0.7DCR ROOM=B2B_MAMBA_MESA
2 6.3V
X5R-CERM 2 10V
C0G-CERM
SPI_MESA_TO_AP_MISO 1
33.2 2 SPI_MESA_TO_AP_MISO_CONN 13 IN
AOP_TO_MESA_BLANKING_EN 1 2 AOP_TO_MESA_BLANKING_EN_CONN 43
0201 01005
11 OUT 43 ROOM=B2B_MAMBA_MESA ROOM=B2B_MAMBA_MESA
01005
1%
1/32W
1 C5844 ROOM=B2B_MAMBA_MESA 1 C5850
OMIT_TABLE
MF 56PF
01005 5% 56PF
ROOM=B2B_MAMBA_MESA 2 25V
NP0-C0G-CERM
5%
01005 2 25V
NP0-C0G-CERM
ROOM=B2B_MAMBA_MESA 01005
PP1V8_S2 47 48 50
5 11 13 15 18 21 23 PP1V8_MESA_S2 FL5860
25 36 41 43 45 46 20 43 150OHM-25%-200MA-0.7DCR
1 C5870 MAMBA_TO_DISPLAY_MDRIVE 1 2 MAMBA_TO_DISPLAY_MDRIVE_CONN
R1631 R1632
42 43
1 1 OUT
0.1UF NOSTUFF
B 20%
2 6.3V
X5R-CERM 5%
1.00K
5%
1.00K C5861 1 01005
ROOM=B2B_MAMBA_MESA
1 C5860 B
5 01005 1/32W 1/32W 56PF 56PF
ROOM=SOC MF MF 5% 5%
VCC 2 01005 2 01005 25V 2 25V
ROOM=MAMBA_MESA ROOM=MAMBA_MESA NP0-C0G-CERM 2 NP0-C0G-CERM
U1601 01005 01005
6S
74LVC1G3157GX Y0
3
NC R5852 #29189177: Move C5785 to other side of resistor ROOM=B2B_MAMBA_MESA ROOM=B2B_MAMBA_MESA
I2C1_AOP_SCL 4Z
X2SON6 I2C1_AOP_TO_MESA_TURTLE_SCL 0.00 I2C1_AOP_TO_MESA_TURTLE_SCL_CONN
Y1 1
39 1 2
13 IN 43
37 GND
I2C_TOUCH_TO_MAMBA_SCL_R DISPLAY_TO_MAMBA_MSYNC_CONN
2 ROOM=SOC
CRITICAL
0%
1/32W 1 C5852 42 IN 43 42 IN
AOP_TO_MESA_I2C_ISO_EN
MF
01005
5%
56PF 42 BI
I2C_TOUCH_BI_MAMBA_SDA To J5800 MAMBA/MESA B2B 1 C5863 1 C5862
13 IN ROOM=B2B_MAMBA_MESA
2 25V
43
NOSTUFF NOSTUFF 56PF 56PF
PP1V8_S2
NP0-C0G-CERM
01005 C5785 1 1 C5786 5%
2 25V
5%
25V
1
R1633 5 11 13 15 18 21 23 25 36 41 43 ROOM=B2B_MAMBA_MESA 56PF 56PF NP0-C0G-CERM 2 NP0-C0G-CERM
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D
VDD_MAIN OV CUT-OFF CIRCUIT D
38 37 32 28 25 24 22 20 19 5
PP_VDD_MAIN 47 46 24
PP_VAR_USB_RVP DZ5900
50 48 47 45 42 41 40 39
0201
PP3V0_S2
#29546665:Change to 0201 C5900 1 K A 5 20 33 46 47 48 50
0.47UF
20% RB521ES-30
1
R5901 25V
X5R 2
1.3M 0201
1% ROOM=OV_CUTOFF
1/20W
MF
2
2 0201
ROOM=OV_CUTOFF VDD
OMIT
SHORT-20L-0.05MM-SM U5900
XW5900 TPS3700DSE
WSON
2 1 OV_VMON_INA 4 INA
6
To Hydra and E75
ROOM=SOC OUTA
NC
#29546629:Ground INA
R5903
OUTB 1 PP_HYDRA_ACC1_R 1
0.00 2 PP_HYDRA_ACC1
C C
47 48
PP_VDD_MAIN_VMON 3 INB 0%
1/32W
MF
NOSTUFF ROOM=OV_CUTOFF 01005
1
R5902 1 C5902 GND ROOM=OV_CUTOFF
100K 15PF
5
1% 5%
1/32W
MF 2 16V
NP0-C0G-CERM
2 01005 01005
ROOM=OV_CUTOFF ROOM=OV_CUTOFF
B B
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
ACCESSORY BUCK
U6100
FPF1204UCX
38 37 32 28 25 24 22 20 19 5 PP_VDD_MAIN A2 VIN WLCSP-COMBO
VOUT A1
PP_VDD_MAIN_ACC_BUCK_VIN
50 48 47 44 42 41 40 39
C6100
ROOM=ACC_BUCK
1
PP1V8_S2 B2 ON 2.2UF
41 36 25 23 21 18 15 13 11 5
50 48 47 46 43 20%
2 6.3V
X5R-CERM
GND 0201
ROOM=ACC_BUCK
B1
A2
VIN
U6110 CRITICAL
To Hydra
FAN53741 L6110
CSP
0.47UH-20%-2.52A-0.08OHM
41 21 11
I2C0_AP_SDA A1 SDA ROOM=ACC_BUCK SW B2 ACC_BUCK_SW 1 2 PP_ACC_VAR 20 47
BI
PIGA1608-SM
41 21 11 IN
I2C0_AP_SCL B1 SCL FB
C1 ACC_BUCK_FB ROOM=ACC_BUCK 1 C6110 1 C6111 1 C6112
2 OMIT 220PF 0.1UF 15UF
C GND XW6110
SHORT-20L-0.05MM-SM
5%
2 10V
C0G-CERM
20%
2 6.3V
X5R-CERM
20%
2 6.3V
X5R
C
ROOM=ACC_BUCK 01005 01005 0402-0.1MM-1
C2
ROOM=SOC
R6116
ROOM=ACC_BUCK ROOM=ACC_BUCK
1
1
10K 2 ACC_BUCK_TO_PMU_AMUX 21
5%
1/32W
MF ROOM=ACC_BUCK
01005
I2C0 address: 0x52
B B
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
USB-PD
41 36 25 23 21 18 15 13 11 5
PP1V8_S2
50 48 47 45 43
50 48 47 44 33 20 5
PP3V0_S2
1 1 PP1V8_VCCD_CCG2
C6290
1.0UF
C6291
1.0UF
20% 20%
1
6.3V
2 X5R
0201-1
6.3V
2 X5R
0201-1
C6292
1.0UF
C #29590414: Update CCG2 resistor divider values
#30199192: R6210 change to 0201 to prevent Dendrite
ROOM=USBPD ROOM=USBPD 20%
6.3V
2 X5R
C
0201-1
NC
NC
ROOM=USBPD
PP_VAR_USB_RVP
C4
E3
A1
E1
E4
47 44 24
R6210
VDDD
VCCD
VDDIO
VCONN2
VCONN1
1
499K
1%
1/20W
MF
2 201 11 5 OUT CCG2_TO_SMC_INT_L C3 GPIO_C3 CC1 B4 CCG2_TO_HYDRA_CC OUT 47
ROOM=USB_PD D3 A4
NC GPIO_D3 U6200 CC2 NC 1 C6200
PP5V0_USB_RVP_R C2 GPIO_C2 CSP B3
D2 RD1 NC 220PF
NC GPIO_D2 5%
B2 2 10V
1
R6211 C6211
NC GPIO_B2 C0G-CERM
01005
50K 1
22NF
R6200 I2C0_SMC_SCL A3 I2C_0_SCL
CG8740AAT
XRES B1 PMU_TO_CCG2_RESET_L ROOM=USBPD
1%
1/32W 20% I2C0_SMC_SDA 1
43.2 2
25 24 23 22 11 IN
I2C0_SMC_SDA_CCG2_R A2
IN 21
25 24 23 22 11 I2C_0_SDA
MF 2 6.3V
BI
2 01005 X5R-CERM 1% CRITICAL
ROOM=USB_PD 01005
ROOM=USB_PD
1/32W 11 BI
AP_BI_CCG2_SWDIO E2 SWD_IO ROOM=USBPD
MF
01005 11 IN
AP_TO_CCG2_SWCLK D1 SWD_CLK
ROOM=USB_PD
VSS VSS
D4
C1
B B
A SYNC_MASTER=sync SYNC_DATE=04/14/2017
A
PAGE TITLE
I/O: USB PD
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
HYDRA
12C ADDRESS: 0011010X
PP3V0_S2 VOLTAGE=3.0V
50 48 46 44 33 20 5
PP_ACC_VAR 20 45
1 C6390 1 C6391
1.0UF
20%
0.1UF
20%
1 C6320 1 C6321 1 C6322 1 C6323 1 C6324
2.2UF 2.2UF 2.2UF 2.2UF 2.2UF
2 6.3V
X5R 2 6.3V
X5R-CERM 20% 20% 20% 20% 20%
0201-1
ROOM=HYDRA
01005
ROOM=HYDRA PP1V8_S2 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
C C
41 36 25 23 21 18 15 13 11 5 0201 0201 0201 0201 0201
50 48 46 45 43
ROOM=HYDRA ROOM=HYDRA ROOM=HYDRA ROOM=HYDRA ROOM=HYDRA
0.01UF
10%
2 6.3V
R6300 X5R
01005
HYDRA_TO_PMU_USB_BRICK_ID 6.34K 2 ROOM=HYDRA
H4
H5
C6
D6
A6
B6
E6
21 OUT
1
1% VDD1V8 VDD3V0
1/32W ACC_PWR
1 C6300 MF
0.01UF
10%
01005
ROOM=HYDRA
U6300
2 6.3V 90_MIKEYBUS_DATA_P C2 CBTL1612A1 G6 PP_VAR_USB_RVP
X5R 35 BI DIG_DP WLCSP P_IN 24 44 46
01005 PP_HYDRA_ACC1
ROOM=HYDRA 35 BI
90_MIKEYBUS_DATA_N D2 DIG_DN ACC1 A5 44 48
15NH-250MA ACC2 C7
7 90_USB_AP_DATA_N 1 2 12 IN
UART_AP_TO_ACCESSORY_TXD D1 UART0_TX ACC2 D7
BI
GND_VOID=TRUE 0201 12 OUT
UART_ACCESSORY_TO_AP_RXD C1 UART0_RX ACC2 E7
ROOM=HYDRA
12 IN
UART_AP_DEBUG_TXD F2 UART1_TX DP1 C3 90_HYDRA_DP1_CONN_P BI 5 48
12 OUT
UART_AP_DEBUG_RXD E2 UART1_RX DN1 C4 90_HYDRA_DP1_CONN_N BI 5 48
B SM
PP
1 7 OUT
SWD_DOCK_TO_AP_SWCLK
SWD_DOCK_BI_AP_SWDIO
E1
F1
JTAG_CLK
JTAG_DIO
CON_DET_L G3 HYDRA_CON_DETECT_L IN 48
B
ROOM=HYDRA
7 BI
POW_GATE_EN* H3 HYDRA_TO_TIGRIS_VBUS1_VALID_L OUT 5 24
NC
G2 EXT_SW_EN HOST_RESET F6 HYDRA_TO_PMU_HOST_RESET OUT 21
HYDRA_TO_NUB_DOCK_CONNECT G1 DOCK_CONNECT
13 OUT
SDA G5 I2C1_SMC_SDA BI 11
46 IN
CCG2_TO_HYDRA_CC B2 CC0 SCL G4 I2C1_SMC_SCL BI 11
BYPASS F5 HYDRA_BYPASS
1
R6301
100K
1% DVSS
DVSS1
1 C6330
1/32W
MF 1.0UF
20%
2 01005 2 6.3V
E3
G7
H1
H6
H7
F4
ROOM=HYDRA X5R
0201-1
ROOM=HYDRA
UART TX/RX pin names on Hydra match signal names (i.e. TX pin is input and connects to TX signal)
A A
BB USB MIKEYBUS MIPI
SYNC_MASTER=sync SYNC_DATE=04/14/2017
I/O: Hydra
PP_VDD_MAIN DRAWING NUMBER SIZE
051-02159
38 37 32 28 25 24 22 20 19 5
50 48 45 44 42 41 40 39
D
C6302 C6303 C6304 Apple Inc.
1 C6301 1 C6331 1 C6332 1 C6333 1 C6334 1 C6335 1 C6336 1
220PF
1
220PF
1
220PF
REVISION
10.0.0
220PF 220PF 220PF 220PF 220PF 220PF 220PF 5% 5% 5%
5% 5% 5% 5% 5% 5% 5% NOTICE OF PROPRIETARY PROPERTY:
2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V
C0G-CERM 2 10V
C0G-CERM 2 10V
C0G-CERM
BRANCH
C0G-CERM C0G-CERM C0G-CERM C0G-CERM C0G-CERM C0G-CERM C0G-CERM 01005 01005 01005 THE INFORMATION CONTAINED HEREIN IS THE
01005 01005 01005 01005 01005 01005 01005 ROOM=BASEBAND ROOM=CODEC ROOM=CAM_PMU PROPRIETARY PROPERTY OF APPLE INC.
ROOM=HYDRA ROOM=HYDRA ROOM=HYDRA ROOM=HYDRA ROOM=HYDRA ROOM=HYDRA ROOM=HYDRA
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
63 OF 80
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 47 OF 81
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
ANTENNA ARC DOCK FLEX CONNECTOR ROOM=B2B_DOCK
FL6430 APN: 516S00276
CRITICAL
150OHM-25%-200MA-0.7DCR J6400
46 PP3V0_S2 2 1 PP3V0_LAT_CONN BB35L-RA50-3A
20 5 48 F-ST-SM
44 33
50 47 01005
ROOM=B2B_DOCK 1 C6430 55
220PF 51 52
5%
2 10V
C0G-CERM
01005
ROOM=B2B_DOCK PP3V0_LAT_CONN 1 2 SPKRAMP_BOT_TO_COIL_OUT_NEG
FL6432
48 37 48
3 4 COIL_TO_SPKRAMP_BOT_VSENSE_CONN_N
47
43
150OHM-25%-200MA-0.7DCR R6422 LOWERMIC4_TO_CODEC_BIAS_FILT_RET 5 6 BB_TO_LAT_GPO1_CONN
48
25
PP1V8_S2 PP1V8_LAT_ARC_CONN I2C3_AP_SCL 0.00 I2C3_AP_TO_SAKONNET_SCL_CONN 48
36 48
2 1 LOWERMIC1_TO_CODEC_AIN1_CONN_N BB_TO_LAT_GPO2_CONN
D
18 1 2
11 5 48 41 11 7 8
D 15 13 42 48 48
23 21 01005 LOWERMIC1_TO_CODEC_AIN1_CONN_P PP_CODEC_TO_LOWERMIC4_BIAS_CONN
41
46
36
45
ROOM=B2B_DOCK
1 C6432 0%
1/32W
MF
1 C6422 48
PP_CODEC_TO_LOWERMIC1_BIAS_CONN
9 10
LOWERMIC4_TO_CODEC_AIN4_CONN_P
48
50
220PF 01005 56PF 48
11 12 48
5% ROOM=B2B_DOCK 5% I2C1_AP_TO_MIC1_SCL_CONN 13 14 LOWERMIC4_TO_CODEC_AIN4_CONN_N
2 10V 2 25V 48 48
C0G-CERM
01005
NP0-C0G-CERM
01005 48
I2C1_AP_BI_MIC1_SDA_CONN 15 16 LOWERMIC1_TO_CODEC_BIAS_FILT_RET 36
ROOM=B2B_DOCK ROOM=B2B_DOCK 17 18 MIKEYBUS_REFERENCE
R6424 90_HYDRA_DP2_CONN_P 19 20 BB_TO_LAT_GPO4_CONN
35
0.00 41 11 1 2
47 5
90_HYDRA_DP2_CONN_N 21 22
LAT_TUNER_RFFE1_CLK 1 2 LAT_TUNER_RFFE1_CLK_CONN 42
BB_TO_LAT_GPO3_CONN 48
50 48 0%
1/32W 1 C6424 90_HYDRA_DP1_CONN_P
23 24
0%
1/32W 1 C6434 MF
01005 56PF 47 5
25 26 HYDRA_CON_DETECT_CONN_L 5 48
MF
33PF ROOM=B2B_DOCK 5% 90_HYDRA_DP1_CONN_N 27 28 LAT_TUNER_RFFE1_DATA_CONN 48
01005 2 25V 47 5
ROOM=B2B_DOCK 5% NP0-C0G-CERM 29 30 LAT_TUNER_RFFE1_CLK_CONN 48
2 16V 01005
ROOM=B2B_DOCK
NP0-C0G-CERM
01005 48 5
PP_HYDRA_ACC1_CONN 31 32 PP1V8_LAT_ARC_CONN 48
#31609563: Update C6434/C6436 to 33pF (D21) ROOM=B2B_DOCK ARC1_TO_SOLENOID1_OUT_POS 33 34 SOLENOID1_TO_ARC1_VSENSE_N 39
R6436
39
48
ARC1_TO_SOLENOID1_OUT_NEG 35 36 SOLENOID1_TO_ARC1_VSENSE_P 39
LAT_TUNER_RFFE1_DATA 0.00 LAT_TUNER_RFFE1_DATA_CONN
39 48
PP_HYDRA_ACC2_CONN 37 38 I2C3_AP_BI_SAKONNET_SDA_CONN 48
1 2 48 5
50 48
39 40 I2C3_AP_TO_SAKONNET_SCL_CONN 48
0%
1/32W
MF
1 C6436 C6471 1 C6470 1
48 39
ARC1_TO_SOLENOID1_OUT_NEG 41 42 I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT_CONN 48
01005 33PF 220PF 220PF 43 44
ROOM=B2B_DOCK 5% 5% 5%
2 16V
NP0-C0G-CERM
10V 2
C0G-CERM
10V 2
C0G-CERM 48 39
ARC1_TO_SOLENOID1_OUT_POS 45 46 COIL_TO_SPKRAMP_BOT_VSENSE_CONN_P 48
01005 01005
ROOM=B2B_DOCK
01005 I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK_CONN 47 48 SPKRAMP_BOT_TO_COIL_OUT_POS
ROOM=B2B_DOCK ROOM=B2B_DOCK 48 37 48
48
I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK_CONN 49 50
VOLTAGE=16.0V
FL6438 R6419 24 5 PP_VBUS1_E75 53 54
100 C6490 C6491 C6492 C6493
150OHM-25%-200MA-0.7DCR 39 37 36 IN
I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK 2 1 I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK_CONN 48
0.1UF
1
0.1UF
1
0.1UF
1
220PF
1 56 C6494 1 C6496 1
BB_TO_LAT_GPO1 BB_TO_LAT_GPO1_CONN
NOSTUFF 0.1UF 0.1UF
50
1 2 48
1%
1/32W 1 C6419 10%
25V 2
10%
25V 2
10%
25V 2
5%
25V 2 10%
25V 2
10%
25V 2
C 01005
ROOM=B2B_DOCK 1 C6438
MF
01005
ROOM=B2B_DOCK 5%
56PF X5R
0201
ROOM=CHARGER
X5R
0201
ROOM=CHARGER
X5R
0201
ROOM=B2B_DOCK
COG
01005
ROOM=B2B_DOCK
X5R
0201
X5R
0201 C
56PF 2 25V
NP0-C0G-CERM
ROOM=B2B_DOCK ROOM=B2B_DOCK
5% 01005
2 25V
NP0-C0G-CERM
01005 R6420 ROOM=B2B_DOCK #30797674: Update C6496/C6494 per EMC/Desense feedback
#30657902: Update C6494 to 0.1UF per EMC/Densence
ROOM=B2B_DOCK I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK 2
100 1 I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK_CONN
39 37 36 IN 48
FL6440 1%
1/32W 1
NOSTUFF
C6420
150OHM-25%-200MA-0.7DCR MF
01005 56PF
50
BB_TO_LAT_GPO2 1 2 BB_TO_LAT_GPO2_CONN 48 ROOM=B2B_DOCK 5%
01005 2 25V
NP0-C0G-CERM
ROOM=B2B_DOCK 01005
1 C6440 ROOM=B2B_DOCK
56PF R6421
5%
I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT 100 I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT_CONN
2 25V 2 1
SOUTH SPEAKER
NP0-C0G-CERM 39 36 13 OUT 48
01005 NOSTUFF
ROOM=B2B_DOCK 1%
1/32W 1 C6421 FL6480
FL6442 MF
01005
ROOM=B2B_DOCK 5%
56PF 150OHM-25%-200MA-0.7DCR
150OHM-25%-200MA-0.7DCR 2 25V
NP0-C0G-CERM COIL_TO_SPKRAMP_BOT_VSENSE_P 2 1 COIL_TO_SPKRAMP_BOT_VSENSE_CONN_P
50
BB_TO_LAT_GPO3 1 2 BB_TO_LAT_GPO3_CONN 48
01005 37
NOSTUFF
48
ROOM=B2B_DOCK 01005
01005
ROOM=B2B_DOCK 1 C6442 ROOM=B2B_DOCK 1 C6480
220PF
56PF 5%
5% 2 10V
2 25V
NP0-C0G-CERM
01005
ROOM=B2B_DOCK
MICS FL6482
C0G-CERM
01005
ROOM=B2B_DOCK
FL6450 150OHM-25%-200MA-0.7DCR
FL6444 150OHM-25%-200MA-0.7DCR 37
COIL_TO_SPKRAMP_BOT_VSENSE_N 2 1 COIL_TO_SPKRAMP_BOT_VSENSE_CONN_N 48
150OHM-25%-200MA-0.7DCR LOWERMIC1_TO_CODEC_AIN1_P 2 1 LOWERMIC1_TO_CODEC_AIN1_CONN_P NOSTUFF
01005
BB_TO_LAT_GPO4 1 2 BB_TO_LAT_GPO4_CONN
35
01005
48
ROOM=B2B_DOCK 1 C6482
C6450
50 48
01005 ROOM=B2B_DOCK 1 220PF #29332151: No-stuff C6480 and C6482
5%
ROOM=B2B_DOCK 56PF
1 C6444 2 10V
B 5%
56PF
5%
2 25V
NP0-C0G-CERM
C0G-CERM
01005
ROOM=B2B_DOCK
B
01005
2 25V
NP0-C0G-CERM
01005
FL6452 ROOM=B2B_DOCK
SPKRAMP_BOT_TO_COIL_OUT_POS
ROOM=B2B_DOCK 150OHM-25%-200MA-0.7DCR 48 37
SPKRAMP_BOT_TO_COIL_OUT_NEG
35
LOWERMIC1_TO_CODEC_AIN1_N 2 1 LOWERMIC1_TO_CODEC_AIN1_CONN_N 48
48 37
01005
ROOM=B2B_DOCK
1 C6452 C6488 1 C6489 1
HYDRA
5% 10V 2 10V 2
PP_VDD_MAIN 2 25V
NP0-C0G-CERM X5R X5R
01005 01005
FL6454
38 37 32 28 25 24 22 20 19 5 01005
50 47 45 44 42 41 40 39
ROOM=B2B_DOCK ROOM=B2B_DOCK ROOM=B2B_DOCK
1 C6415 1 C6416 150OHM-25%-200MA-0.7DCR
220PF 220PF PP_CODEC_TO_LOWERMIC1_BIAS 2 1 PP_CODEC_TO_LOWERMIC1_BIAS_CONN
5% 5% 36 48
2 10V 2 10V
C0G-CERM
01005
C0G-CERM
01005
01005
ROOM=B2B_DOCK
1 C6454
ROOM=B2B_DOCK ROOM=B2B_DOCK 220PF
5%
2 10V
C0G-CERM
AC return path (USB):GND/VDD_MAIN reference 01005
FL6460 ROOM=B2B_DOCK
150OHM-25%-200MA-0.7DCR
R6410 LOWERMIC4_TO_CODEC_AIN4_P LOWERMIC4_TO_CODEC_AIN4_CONN_P
HYDRA_CON_DETECT_L 2
100 1 HYDRA_CON_DETECT_CONN_L 35
2 1 48
C6460
47 5
48 01005 1
ROOM=B2B_DOCK
1%
1/32W
MF
1 C6410 56PF
01005 27PF 5%
25V
ROOM=B2B_DOCK 5% 2 NP0-C0G-CERM
2 16V
NP0-C0G 01005
FL6411
01005
ROOM=B2B_DOCK FL6462 ROOM=B2B_DOCK
150OHM-25%-200MA-0.7DCR
10-OHM-1.1A
LOWERMIC4_TO_CODEC_AIN4_N LOWERMIC4_TO_CODEC_AIN4_CONN_N
R6456
PP_HYDRA_ACC1 1 2 PP_HYDRA_ACC1_CONN 35
2 1 48
I2C1_AP_SCL 1
0.00 2
I2C1_AP_TO_MIC1_SCL_CONN
C6462
47 44 5 34 11 48
01005
A 1
A
48
01005 ROOM=B2B_DOCK
ROOM=B2B_DOCK 1 C6411 56PF
0%
1/32W
MF
1 C6456
100PF 5% 56PF
SYNC_MASTER=sync SYNC_DATE=10/10/2016
PAGE TITLE
C6464 10.0.0
48 34 11 48
0201 ROOM=B2B_DOCK 1
ROOM=B2B_DOCK 1 C6413 220PF 0%
1/32W 1 C6466 NOTICE OF PROPRIETARY PROPERTY:
220PF 5% MF
BRANCH
5% #28565582:[P2] Reduce to 100pF
2 10V 01005 56PF THE INFORMATION CONTAINED HEREIN IS THE
2 25V
COG
[P1.5] Use 16V Part C0G-CERM
01005 ROOM=B2B_DOCK
5% PROPRIETARY PROPERTY OF APPLE INC.
01005 #31347215: [CRB] Revert to 220pF 2 25V
NP0-C0G-CERM THE POSESSOR AGREES TO THE FOLLOWING: PAGE
ROOM=B2B_DOCK
ROOM=B2B_DOCK 01005
ROOM=B2B_DOCK
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
64 OF 80
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 48 OF 81
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
I2C MAP
(see #28857723 updates)
D D
C C
B B
A SYNC_MASTER=sync SYNC_DATE=04/14/2017 A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
90_USB_BB_N
90_USB_BB_P
BB_SIM1_SWP
PCIE_AP_BI_BB_CLKREQ_L
SWD_AP_BI_BB_IO
12 59
PP_VDD_BOOST BB_TO_AP_RESET_DETECT_L
73 43 41 36 28 22 20 PP_VDD_BOOST_RF BB_TO_NFC_CLK 50 52 56
80 73 52 PP_VDD_MAIN BB_TO_NFC_CLK
38 37 32 28 25 24 22 20 19 5 PP_VDD_MAIN BB_TO_PMU_PCIE_HOST_WAKE_L 21 59
50 48 47 45 44 42 41 40 39
PP1V8_S2 PCIE_BB_TO_PMU_WAKE_L
41
78
36
77
25 23 21 18 15 13 11 5
59 52 50 48 47 46 45 43
PP1V8_S2
UART_BB_TO_WLAN_COEX UART_BB_TO_WLAN_COEX 50 73 80
80
BB_TO_AP_GSM_TXBURST BB_TO_STROBE_DRIVER_GSM_BURST_IND 32 41 59
D I2S_BB_TO_AP_BCLK I2S_BB_TO_AP_BCLK 11 59 D
80 8 90_PCIE_AP_TO_WLAN_REFCLK_P 90_PCIE_AP_TO_WLAN_REFCLK_P PP_VDD_MAIN PP_VDD_MAIN 80
5 19 20 22 24 25 28 32 37 38 39 I2S_BB_TO_AP_DIN I2S_BB_TO_AP_DIN 11 59
80 8
90_PCIE_AP_TO_WLAN_TXD_P 90_PCIE_AP_TO_WLAN_TX_P
45 46 47 48 50 52 59 77 78 80
UART_BB_TO_AOP_RXD UART_BB_TO_AOP_RXD 13 59
90_PCIE_AP_TO_WLAN_TXD_N
80 8 90_PCIE_AP_TO_WLAN_TX_N AP_TO_BBPMU_RADIO_ON_L
90_PCIE_WLAN_TO_AP_RXD_P 56 12 AP_TO_BBPMU_RADIO_ON_L
80 8 90_PCIE_WLAN_TO_AP_RX_P PMU_TO_BBPMU_RESET_L
90_PCIE_WLAN_TO_AP_RXD_N 56 21 PMU_TO_BBPMU_RESET_L
80 8 90_PCIE_WLAN_TO_AP_RX_N AP_TO_BB_IPC_GPIO1
PCIE_WLAN_BI_AP_CLKREQ_L 59 12 AP_TO_BB_IPC_GPIO LAT_TUNER_RFFE1_DATA 48 50 60 78
80 8 PCIE_AP_BI_WLAN_CLKREQ_L AP_TO_BB_COREDUMP LAT_TUNER_RFFE1_DATA
PCIE_AP_TO_WLAN_RESET_L 59 12 AP_TO_BB_COREDUMP_TRIG LAT_TUNER_RFFE1_CLK 48 50 60 78
80 8 PCIE_AP_TO_WLAN_PERST_L UART_BB_TO_WLAN_COEX AP_TO_BB_MESA_ON LAT_TUNER_RFFE1_CLK
WLAN_TO_PMU_HOST_WAKE UART_BB_TO_WLAN_COEX 50 73 80 59 12 AP_TO_BB_MESA_ON_L
80 21 PCIE_WLAN_TO_PMU_WAKE UART_WLAN_TO_BB_COEX AP_TO_BB_TIME_MARK
UART_WLAN_TO_BB_COEX 50 73 80 59 12 AP_TO_BB_TIME_MARK
radio_mlb UAT_TUNER_RFFE4_DATA UAT_TUNER_RFFE_DATA 5 50 77
80 13
AOP_TO_WLAN_CONTEXT_A AOP_TO_WLAN_CONTEXT_A UAT_TUNER_RFFE4_CLK UAT_TUNER_RFFE_CLK 5 50 77
80 13
AOP_TO_WLAN_CONTEXT_B AOP_TO_WLAN_CONTEXT_B
80 12
AP_TO_BT_WAKE AP_TO_BT_WAKE wifi_mlb
AP_TO_WLAN_DEVICE_WAKE
80 12 AP_TO_WLAN_DEV_WAKE
BT_TO_PMU_HOST_WAKE BT_TO_PMU_HOST_WAKE 21 80
UART_BT_TO_AP_CTS_L
PMU_TO_BT_REG_ON UART_BT_TO_AP_CTS_L 12 80
80 21 PMU_TO_BT_REG_ON UART_BT_TO_AP_RXD
PMU_TO_WLAN_CLK32K UART_BT_TO_AP_RXD 12 80
80 21 PMU_TO_WLAN_32K UART_AP_TO_BT_RTS_L
PMU_TO_WLAN_REG_ON UART_AP_TO_BT_RTS_L 12 80
80 21 PMU_TO_WLAN_REG_ON
UART_AP_TO_BT_TXD UART_AP_TO_BT_TXD 12 80
UART_WLAN_TO_AP_CTS_L
50_UAT_WLAN_5G_EAST
50_UAT_WLAN_2G_EAST
80 12 UART_WLAN_TO_AP_CTS_L
UART_WLAN_TO_AP_RXD
50_LAT_WLAN_NORTH
80 12 UART_WLAN_TO_AP_RXD 50_LAT_WLAN_SOUTH
50_LAT_WLAN_MLC
80 12
UART_AP_TO_WLAN_RTS_L UART_AP_TO_WLAN_RTS_L
80 12
UART_AP_TO_WLAN_TXD UART_AP_TO_WLAN_TXD 74 8
90_PCIE_AP_TO_BB_REFCLK_N PCIE0_AP_TO_BB_REFCLK_N
90_PCIE_AP_TO_BB_REFCLK_P PCIE0_AP_TO_BB_REFCLK_P
I8 74 8
80 12 5
WLAN_TO_AP_TIME_SYNC WLAN_TIME_SYNC SUBDESIGN_SUFFIX=W 58 8
90_PCIE_AP_TO_BB_TXD_N PCIE0_AP_TO_BB_RX_N
C 58 8
90_PCIE_AP_TO_BB_TXD_P
90_PCIE_BB_TO_AP_RXD_N
PCIE0_AP_TO_BB_RX_P C
58 8
PCIE0_BB_TO_AP_TX_N
50_UAT_WLAN_2G_EAST 76 81
58 8
90_PCIE_BB_TO_AP_RXD_P
PCIE0_BB_TO_AP_TX_P
50_UAT_WLAN_5G_EAST 76 81
50_LAT_WLAN_SOUTH 76 81
50_LAT_WLAN_NORTH 76 81
50_LAT_WLAN_MLC 76 81
50_UAT_WLAN_2G_WEST 50 71 76
I6 50_UAT_TRX_UHB_MCS
76 65 50 50_UAT_TRX_UHB_MCS
50_UAT_TRX_MLB_MB_HB_MCS
50_UAT_WLAN_2G_WEST
50_UAT_WLAN_5G_EAST
50_UAT_WLAN_2G_EAST
50_LAT_WLAN_NORTH
50_LAT_WLAN_SOUTH
50_LAT_WLAN_MLC
radio_mlb_ff 76 69 50 50_UAT_TRX_MLB_MB_HB_MCS
50_UAT_TRX_UHB_MCW 50_UAT_TRX_UHB_MCW 50 68 76
76 69 50
50_UAT_TRX_LB_MCS 50_UAT_TRX_LB_MCS
50_UAT_TRX_MLB_MB_HB_MCW 50_UAT_TRX_MLB_MB_HB_MCW 50 68 76
76 69 50
50_LAT_DRX_MLB_MB_HB_MCS 50_LAT_DRX_MLB_MB_HB_MCS
76 69 50
50_LAT_DRX_LB_MCS 50_LAT_DRX_LB_MCS
50_UAT_TRX_LB_MCW 50_UAT_TRX_LB_MCW 50 67 76
76 68 50
50_UAT_TRX_UHB_MCW 50_UAT_TRX_UHB_MCW
50_LAT_DRX_MLB_MB_HB_MCW 50_LAT_DRX_MLB_MB_HB_MCW 50 68 76
76 68 50
50_UAT_TRX_MLB_MB_HB_MCW 50_UAT_TRX_MLB_MB_HB_MCW
50_LAT_DRX_LB_MCW 50_LAT_DRX_LB_MCW 50 67 76
76 67 50
50_UAT_TRX_LB_MCW 50_UAT_TRX_LB_MCW
50_UAT_TRX_UHB_MCS 50_UAT_TRX_UHB_MCS 50 65 76
76 68 50
50_LAT_DRX_MLB_MB_HB_MCW 50_LAT_DRX_MLB_MB_HB_MCW
50_UAT_TRX_LB_MCS 50_UAT_TRX_LB_MCS 50 69 76
76 67 50
50_LAT_DRX_LB_MCW 50_LAT_DRX_LB_MCW
50_UAT_TRX_MLB_MB_HB_MCS 50_UAT_TRX_MLB_MB_HB_MCS 50 69 76
50_LAT_DRX_MLB_MB_HB_MCS 50_LAT_DRX_MLB_MB_HB_MCS 50 69 76
76 71 50
50_UAT_WLAN_2G_WEST 50_UAT_WLAN_2G_WEST
50_LAT_DRX_LB_MCS 50_LAT_DRX_LB_MCS 50 69 76
76 71 50
50_LMHGW_UAT1 50_LMHGW_UAT1
50_LMHGW_UAT1 50_LMHGW_UAT1 50 71 76
50_DSM_HB_IN_TRX_UHB 50_DSM_HB_IN_TRX_UHB 50 68 76
76 70 50
50_LHB_LAT1 50_LHB_LAT1
50_LHB_LAT1 50_LHB_LAT1 50 70 76
B 50_DSM_HB_IN_TRX_UHB B
PP1V8_SDRAM PP1V8_S2 545 1146 1347 1548 1850 2152 2359 2577 3678 4180 43 76 68 50
50_DSM_HB_IN_TRX_UHB
PP3V0_TRISTAR_ARC_PROX PP3V0_S2 5 20 33 44 46 47 48 77
VDD_TUNER_RFFE_VIO_1V8 PP1V8_S2 550 1152 1359 1577 1878 2180 23 25 36 41 43
45 46 47 48
UAT_TUNER_RFFE_CLK 5 50 77
UAT_TUNER_RFFE4_CLK AP_TO_BB_RESET_L
UAT_TUNER_RFFE_DATA 5 50 77 73 12 AP_TO_BB_RESET_L
UAT_TUNER_RFFE4_DATA NFC_TO_BB_CLK_REQ
LAT_TUNER_RFFE1_CLK 48 50 60 78 56 52 50 NFC_TO_BB_CLKREQ
LAT_TUNER_RFFE1_CLK PCIE_AP_TO_BB_RESET_L
LAT_TUNER_RFFE1_DATA LAT_TUNER_RFFE1_DATA 48 50 60 78 59 8 PCIE_AP_TO_BB_PERST_L
BB_TO_LAT_GPO1 BB_TO_LAT_GPO1 48 78
BB_TO_LAT_GPO2 48 78
BB_TO_LAT_GPO2 SWD_AOP_TO_MANY_SWCLK
BB_TO_LAT_GPO3 48 78 58 17 13 5 SWD_AP_TO_BB_CLK
SUBDESIGN_SUFFIX=EF BB_TO_LAT_GPO3 UART_WLAN_TO_BB_COEX
BB_TO_LAT_GPO4 48 78 80 73 50 UART_WLAN_TO_BB_COEX
BB_TO_LAT_GPO4 73 21
PMU_TO_BB_USB_VBUS_DETECT USB_BB_VBUS
59 11
I2S_AP_TO_BB_DOUT I2S_AP_TO_BB_DOUT
UART_AOP_TO_BB_TXD UART_AOP_TO_BB_TXD
I4 59 13
38 37 32 28 25 24
80
22
73
20
52
19 5
PP_VDD_MAIN PP_VDD_MAIN 56 42 29 22 21 13
DISPLAY_TO_MANY_BSYNC TOUCH_TO_BBPMU_FORCE_PWM
50
41
48
36
47
25
45
23
44
21
42
18
41
15
40
13
39
11 5
PP1V8_S2 PP1V8_SDRAM
78 77 59 52 50 48 47 46 45 43
80
52 21
PMU_TO_NFC_EN PMU_TO_NFC_EN
56 52 50
BB_TO_NFC_CLK BB_TO_NFC_CLK
56 52 50
NFC_TO_BB_CLK_REQ NFC_TO_BB_CLK_REQ
52 12 5
AP_TO_NFC_FW_DWLD_REQ AP_TO_NFC_FW_DWLD
52 12
AP_TO_NFC_DEV_WAKE AP_TO_NFC_DEV_WAKE
nfc_mlb
SUBDESIGN_SUFFIX=E
52 21
NFC_TO_PMU_HOST_WAKE NFC_TO_PMU_HOST_WAKE
A 52 12
UART_AP_TO_NFC_TXD
UART_NFC_TO_AP_RXD
UART_AP_TO_NFC_TXD
SYNC_MASTER=D21_MLB_DOE SYNC_DATE=07/18/2016 A
52 12 UART_NFC_TO_AP_RXD PAGE TITLE
52 12
52 12
UART_AP_TO_NFC_RTS_L
UART_NFC_TO_AP_CTS_L
UART_AP_TO_NFC_RTS_L
UART_NFC_TO_AP_CTS_L
RADIOS
DRAWING NUMBER SIZE
NFC_SWP 051-02159 D
73 52 50 NFC_SWP1 Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
NFC_MLB D20/D21
MAY 15, 2017
TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION 131S00138 1 39PF, 0201, 2%, 50V C7512_S D21_JPN
C 138S00159 3 CAP,SOFT TERM,2.2UF,6.3V,0201 C7500_S,C7502_S, C7505_S CRITICAL SOFT_CAP
TABLE_5_ITEM
C
TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM
138S0831 3 CAP,TYPICAL,2.2UF,6.3V,0201 C7500_S,C7502_S,C7505_S CRITICAL TYPICAL_CAP 131S00026 1 820PF, 0201, 2%, 25V C7515_S D20_JPN 131S00025 1 1000PF, 0201, 2%, 25V C7515_S D21_JPN
TABLE_5_ITEM TABLE_5_ITEM
131S00033 1 680PF, 0201, 2%, 25V C7516_S D20_JPN 131S00033 1 680PF, 0201, 2%, 25V C7516_S D21_JPN
TABLE_5_ITEM TABLE_5_ITEM
131S0883 1 220PF, 0201, 2%, 50V C7518_S D20_JPN 131S00019 1 150PF, 0201, 2%, 50V C7518_S D21_JPN
TABLE_5_ITEM TABLE_5_ITEM
131S00025 1 1000PF, 0201, 2%, 25V C7510_S D20_JPN 131S00033 1 680PF, 0201, 2%, 25V C7510_S D21_JPN
52 50 IN
PP_VDD_MAIN
TABLE_5_ITEM TABLE_5_ITEM
52 50 IN
PP1V8_S2 131S00025 1 1000PF, 0201, 2%, 25V C7513_S D20_JPN 131S00033 1 680PF, 0201, 2%, 25V C7513_S D21_JPN
TABLE_5_ITEM TABLE_5_ITEM
157S00022 1 TDK, BALUN, 11T T7500_S D20_JPN 157S00023 1 MURATA, BALUN, 11T T7500_S D21_JPN
52 50 IN
PMU_TO_NFC_EN
52 50 OUT NFC_TO_PMU_HOST_WAKE
52 50 IN
AP_TO_NFC_DEV_WAKE
TABLE_5_HEAD TABLE_5_HEAD
52 50 IN
AP_TO_NFC_FW_DWLD_REQ PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
131S00138 1 39PF, 0201, 2%, 50V C7512_S D20_ROW 131S00138 1 39PF, 0201, 2%, 50V C7512_S D21_ROW
52 50 IN
BB_TO_NFC_CLK
TABLE_5_ITEM TABLE_5_ITEM
131S00016 1 470PF, 0201, 2%, 25V C7514_S D20_ROW 131S00081 1 270PF, 0201, 2%, 25V C7514_S D21_ROW
52 50 IN
UART_AP_TO_NFC_TXD TABLE_5_ITEM TABLE_5_ITEM
131S00025 1 1000PF, 0201, 2%, 25V C7515_S D20_ROW 131S00025 1 1000PF, 0201, 2%, 25V C7515_S D21_ROW
52 50 OUT UART_NFC_TO_AP_RXD
TABLE_5_ITEM TABLE_5_ITEM
52 50 IN
UART_AP_TO_NFC_RTS_L 131S0825 1 560PF, 0201, 2%, 25V C7516_S D20_ROW 131S00033 1 680PF, 0201, 2%, 25V C7516_S D21_ROW
52 50 OUT UART_NFC_TO_AP_CTS_L TABLE_5_ITEM TABLE_5_ITEM
131S0883 1 220PF, 0201, 2%, 50V C7518_S D20_ROW 131S00019 1 150PF, 0201, 2%, 50V C7518_S D21_ROW
TABLE_5_ITEM TABLE_5_ITEM
52 50 IO
NFC_SWP 131S00026 1 820PF, 0201, 2%, 25V C7510_S D20_ROW 131S00033 1 680PF, 0201, 2%, 25V C7510_S D21_ROW
TABLE_5_ITEM TABLE_5_ITEM
131S00026 1 820PF, 0201, 2%, 25V C7513_S D20_ROW 131S00033 1 680PF, 0201, 2%, 25V C7513_S D21_ROW
TABLE_5_ITEM TABLE_5_ITEM
157S00022 1 TDK, BALUN, 11T T7500_S D20_ROW 157S00023 1 MURATA, BALUN, 11T T7500_S D21_ROW
B B
TABLE_5_HEAD TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
TABLE_5_ITEM TABLE_5_ITEM
131S00138 1 39PF, 0201, 2%, 50V C7512_S D201 131S00138 1 39PF, 0201, 2%, 50V C7512_S D211
TABLE_5_ITEM TABLE_5_ITEM
131S00016 1 470PF, 0201, 2%, 25V C7514_S D201 131S00081 1 270PF, 0201, 2%, 25V C7514_S D211
TABLE_5_ITEM TABLE_5_ITEM
131S00025 1 1000PF, 0201, 2%, 25V C7515_S D201 131S00025 1 1000PF, 0201, 2%, 25V C7515_S D211
TABLE_5_ITEM TABLE_5_ITEM
131S0825 1 560PF, 0201, 2%, 25V C7516_S D201 131S00033 1 680PF, 0201, 2%, 25V C7516_S D211
TABLE_5_ITEM TABLE_5_ITEM
131S0883 1 220PF, 0201, 2%, 50V C7518_S D201 131S00019 1 150PF, 0201, 2%, 50V C7518_S D211
TABLE_5_ITEM TABLE_5_ITEM
131S00026 1 820PF, 0201, 2%, 25V C7510_S D201 131S00033 1 680PF, 0201, 2%, 25V C7510_S D211
TABLE_5_ITEM TABLE_5_ITEM
131S00026 1 820PF, 0201, 2%, 25V C7513_S D201 131S00033 1 680PF, 0201, 2%, 25V C7513_S D211
TABLE_5_ITEM TABLE_5_ITEM
157S00022 1 TDK, BALUN, 11T T7500_S D201 157S00023 1 MURATA, BALUN, 11T T7500_S D211
A page1 A
DRAWING TITLE
SCH,MLB,D21
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
STOCKHOLM 5V BOOSTER
L7502_S
NFC_DCDC_S
FAN48680UC08X
L7503_S
10OHM-50%-1A-0.05OHM
0.47UH-20%-2.52A-0.08OHM B1 SW VOUT A1 NFC_DCDC_OUT_S 1 2
VDD_NFC_5V_S
D
52
WLCSP
D 1
PIGA1608-SM
2 NFC_BOOST_SW_S B2 SW VOUT A2 1 C7517_S 1 C7520_S
0201
1 C7523_S
15UF 2.2UF 2.2UF
PP_VDD_MAIN A3 MODE0 B3 20% 20% 20%
NFC CONTROLLER
PVIN
2 6.3V 2 6.3V 2 6.3V
52 51 50
C2
C1
52 VDD_NFC_5V_S
52 NFC_BOOST_EN_S
51 50 PP1V8_S2 VDD_NFC_TVDD_S
1 C7506_S 1 C7526_S
52 51 50 PP_VDD_MAIN 52 VDD_NFC_AVDD_S
VOLTAGE=1.80V 2.2UF 2.2UF
R7502_S 20% 20%
0.00 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
52 VDD_NFC_AVDD_S 1 2 VDD_NFC_DVDD_S VDD_NFC_ESE_S 0201 0201
VOLTAGE=1.80V 1 C7505_S
0%
1/32W 1 C7500_S 1 C7502_S 1 C7504_S
MF 2.2UF
TVDD G7
GPIOVDD G1
C7
PVDD D2
VUP H3
AVDD D7
ESE_VDD C5
E8
A4
A7
SVDD B8
SIM_VCC1 A5
SIM_VCC2 A8
C7507_S
C 1000PF R7508_S
C
VDD
VBAT
SIM_PMU_VCC_1
SIM_PMU_VCC_2
1 2 1K
PP7513_S 52 NFC_RXP_S NFC_RXP_CAP_S 1 2
P2MM-NSM
SM 1%
1 10% 1/20W
PP 6.3V MF
OMIT X5R-CERM 201
01005 NFC
L7500_S
106NH-5%-0.85A-0.144OHM
52 51 50 NFC_TO_PMU_HOST_WAKE E3 IRQ 52 NFC_TXN_S 1 2 NFC_BAL1_S
OUT
0402
D3 NFC 1 C7510_S
1
2
51 50 IN
AP_TO_NFC_FW_DWLD_REQ DWL
NFC_S SIM_SWIO_1 A3 NFC_SWP 820PF
GND
PORT3
50 51
NFC_TO_BB_CLK_REQ B1 CLK_REQ BI 2%
2 25V
51 50
PN80VEU3-C004B014 SIM_SWIO_2 A6
OUT
ATB121006F-20011-T11
UFLGA NC C0G-NP0
51 50 BB_TO_NFC_CLK C8 NFC_CLK_XTAL1 0201
IN
ESE_GPIO E5 NFC C7514_S
NC
OMIT_TABLE
E1 OMIT_TABLE 390PF
UART_AP_TO_NFC_TXD
T7500_S
52 51 50 IN UART_RX A2 1 2 TP7500_S
1
TX_PWR_REQ_P NFC_BOOST_EN_S 52 NFC_ANT_MATCH_S NFC_ANT_S A
D1
SM
52 51 50 UART_NFC_TO_AP_RXD UART_TX
OUT SM-TP1P25-TOP
52 51 50 UART_AP_TO_NFC_RTS_L E2 UART_CTS ESE_DWPM_DBG B7 2% OMIT
IN NC 25V 1 C7515_S 1 C7516_S 1 C7518_S
52 51 50 UART_NFC_TO_AP_CTS_L C3 UART_RTS ESE_DWPS_DBG D4 C0G
OUT NC 0201 820PF 820PF 220PF
4 PORT1
3 PORT2
OMIT_TABLE 2% 2% 2%
PP7512_S52 51 50 IN
PMU_TO_NFC_EN H1 VEN RX+ H5 NFC_RXP_S 52 L7501_S 2 25V
C0G-NP0 2 25V
C0G-NP0 2 50V
C0G
P2MM-NSM 106NH-5%-0.85A-0.144OHM 0201 0201 0201
SM
1 B5 RX- H6 NFC_RXN_S C7512_S
NFC NFC
NFC_DWP_RX_TP_S IC0 39PF
PP
NFC_TXP_S 1 2 NFC_BAL2_S OMIT_TABLE OMIT_TABLE OMIT_TABLE
OMIT C4 IC1 TX1 G8 NFC_TXP_S 52
52
1 2
NC 0402
D5 IC2 TX2 H7 NFC_TXN_S 52
NFC 1 C7513_S
NC 2%
E4 IC3 820PF 50V
NC WKUP_REQ A1 AP_TO_NFC_DEV_WAKE 2% CER-C0G
E6 2 25V
50 51 52
IC4 IN 0201
NC C0G-NP0 OMIT_TABLE
F4 IC5 VMID H4 0201
NC NFC
F5 IC6 OMIT_TABLE
B NC
NC
F6 IC7
NFC_GPIO0
NFC_GPIO1
C2
B2
NFC_TEST_OUT_S
NFC_ADC_I_TEST_S
52
PP7511_S
P2MM-NSM 1 C7530_S 1 C7531_S 1 C7532_S 1 C7533_S
B
F8 IC8
52
SM
NC NFC_GPIO2 F3 NFC_DWP_TX_TP_S 1 18PF 39PF 82PF 150PF
G4 IC9 PP 2% 5% 5% 5%
NC
B3 NFC_GPIO3 F2 NFC_TUNE_B0_S 52
1 C7503_S OMIT 2 16V
CERM 2 25V
NP0-C0G 2 25V
C0G 2 25V
C0G
NC IC10 H2 01005 01005 01005 01005
NFC_GPIO4 NFC_TUNE_B1_S 52
B6 IC11 0.1UF NOSTUFF NOSTUFF NOSTUFF NOSTUFF
NC NFC_GPIO5 G2 NFC_TUNE_B2_S 20% NFC_FETB0_S NFC_FETB1_S NFC_FETB2_S NFC_FETB3_S
2 6.3V
52
D6 IC12 6 3 6 3
NC NFC_GPIO6 F1 NFC_TUNE_B3_S X5R-CERM
E7 IC13
52 01005
NC NFC
B4 ESE_VSS
F7 IC14 XTAL2 D8 D D D D
NC NC
C6 DVSS
G3 AVSS
G5 AVSS
G6 AVSS
C1 PVSS
H8 TVSS
52 NFC_TUNE_B0_S 2 G 5 G 2 G 5 G
S S S S
XLLGA XLLGA XLLGA XLLGA
NTND3184NZTAG 1 NTND3184NZTAG 4 NTND3184NZTAG 1 NTND3184NZTAG 4
Q7501_S Q7501_S Q7502_S Q7502_S
NOSTUFF NOSTUFF NOSTUFF NOSTUFF
PP7503_S PP7507_S
P2MM-NSM P2MM-NSM
SM SM TP7505_S
UART_AP_TO_NFC_TXD 1 NFC_TO_PMU_HOST_WAKE 1 NFC_TEST_OUT_S 1
52 51 50 PP 52 51 50 PP 52 A
TP-P55
A OMIT
PP7504_S
P2MM-NSM
OMIT
PP7508_S
P2MM-NSM
NFC
OMIT A
NFC
SM SM TP7506_S PAGE TITLE
UART_NFC_TO_AP_RXD 1 PMU_TO_NFC_EN 1 NFC_ADC_I_TEST_S 1
52 51 50 PP 52 51 50 PP 52 A
OMIT OMIT TP-P55
NFC
051-02159
DRAWING NUMBER SIZE
PP7505_S PP7509_S OMIT
P2MM-NSM P2MM-NSM D
UART_AP_TO_NFC_RTS_L 1
SM
AP_TO_NFC_DEV_WAKE 1
SM Apple Inc.
10.0.0
52 51 50 PP 52 51 50 PP REVISION
OMIT OMIT
PP7506_S NOTICE OF PROPRIETARY PROPERTY: BRANCH
P2MM-NSM
SM THE INFORMATION CONTAINED HEREIN IS THE
52 51 50 UART_NFC_TO_AP_CTS_L 1 PROPRIETARY PROPERTY OF APPLE INC.
PP
75 OF 75
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
OMIT I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
52 OF 81
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST CK
APPD
REV ECN DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. DATE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
10 0008927012 ENGINEERING RELEASED 2017-06-06
(MAV17.2/3)
D D
D21 RADIO_MLB
06/06/2017
0.122.0 LAST_MODIFICATION=Tue Jun 6 18:57:01 2017
C C
PAGE CSA CONTENTS SYNC DATE
53 1 FRONT PAGE
54 2 HIERARCHY
55 3 PMIC: BUCKS & LDOS
56 4 PMIC: CLOCKS & CONTROL
57 5 BB: POWER
58 6 BB: CONTROL & HS PERIPHERALS [6]
59 7 BB: GPIOS & QLINK
60 8 XCVR
61 9 XCVR
62 10 QPOET MODULE
63 11 LB PAD
64 12 HB PAD
65 13 UHB PAD
66 14 2G PA
67 15 LB DSM
68 16 HB DSM
B 69 17 COUPLER2 B
70 18 LOWER ANTENNA
71 19 UPPER ANTENNA
72 20 GNSS
73 21 SIM, DEBUG CONN
74 22 TEST POINTS PROBE POINTS 07/18/2016
ALTERNATES
PART NUMBER ALTERNATE FOR REFERENCE DESIGNATOR(S) DESCRIPTION BOM OPTION
PART NUMBER
335S00013 335S0894 U_EEPROM_E IC, EEPROM BOM_TABLE_ALTS
197S00093 197S00065 Y401_E XTAL, 38P4MHZ BOM_TABLE_ALTS
197S00067 197S00065 Y401_E XTAL, 38P4MHZ BOM_TABLE_ALTS
353S01287 353S01109 U_QET_E ET MODULE, QPOET BOM_TABLE_ALTS
A FRONT PAGE A
DRAWING TITLE
PCB #: 920-02293
DRAWING NUMBER SIZE
051-02159 D
Apple Inc.
BOM #: 939-02493
REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
21 10 3
POWER
PP_VDD_MAIN
IN
IN
PP_VDD_BOOST PP_VDD_BOOST 3 21
MAKE_BASE=TRUE
AP_TO_BB_RESET_L
D
21 4 IN
D 4
4
IN
PMU_TO_BBPMU_RESET_L
AP_TO_BBPMU_RADIO_ON_L
IN
22 7
AOP
UART_AOP_TO_BB_TXD
IN
22 7 OUT UART_BB_TO_AOP_RXD
22 7 OUT BB_TO_STROBE_DRIVER_GSM_BURST_IND
13
RF SIGNALS
50_UAT_TRX_UHB_MCS
IO
17 50_UAT_TRX_MLB_MB_HB_MCS
21 7 OUT UART_BB_TO_WLAN_COEX IO
17 50_UAT_TRX_LB_MCS
21 7 UART_WLAN_TO_BB_COEX IO
IN
17 IO
50_LAT_DRX_MLB_MB_HB_MCS
17 50_LAT_DRX_LB_MCS
22 7 AP_TO_BB_COREDUMP IO
IN
16 50_UAT_TRX_UHB_MCW
7 AP_TO_BB_IPC_GPIO1 IO
IO
16 50_UAT_TRX_MLB_MB_HB_MCW
22 7 AP_TO_BB_MESA_ON IO
IN
15 IO
50_UAT_TRX_LB_MCW
22 7 OUT BB_TO_AP_RESET_DETECT_L 16 IO
50_LAT_DRX_MLB_MB_HB_MCW
15 50_LAT_DRX_LB_MCW
22 7 IN
AP_TO_BB_TIME_MARK IO
22 4 IN
DISPLAY_TO_MANY_BSYNC 19 IO
50_UAT_WLAN_2G_WEST
19 50_LMHGW_UAT1
7 IN
PP1V8_S2 IO
18 IO 50_LHB_LAT1
C 19 16 IO 50_DSM_HB_IN_TRX_UHB C
TUNER/DOCK MAKE_BASE=TRUE
PCIE OUT
IO
UAT_TUNER_RFFE_CLK
UAT_TUNER_RFFE_DATA
UAT_TUNER_RFFE_CLK
UAT_TUNER_RFFE_DATA
7
7
22 6 IN
90_PCIE_AP_TO_BB_REFCLK_P
8 7
LAT_TUNER_RFFE1_CLK MAKE_BASE=TRUE
OUT
22 6 IN
90_PCIE_AP_TO_BB_REFCLK_N
8 7
LAT_TUNER_RFFE1_DATA
IO
6 IN
90_PCIE_AP_TO_BB_TXD_P
6 IN
90_PCIE_AP_TO_BB_TXD_N
6 OUT 90_PCIE_BB_TO_AP_RXD_P
6 OUT 90_PCIE_BB_TO_AP_RXD_N
7 IN
PCIE_AP_TO_BB_RESET_L
7 IO
PCIE_BB_BI_AP_CLKREQ_L
7 OUT BB_TO_PMU_PCIE_HOST_WAKE_L
B B
STOCKHOLM
21 IO
NFC_SWP
6
SWD/USB
SWD_AOP_TO_MANY_SWCLK
4
22 4 OUT
IN
NFC_TO_BB_CLK_REQ
BB_TO_NFC_CLK
IN
6 IO
SWD_AOP_BI_BB_SWDIO
21 4 IN
PMU_TO_BB_USB_VBUS_DETECT
21 6 IO
90_USB_BB_DATA_P
21 6 IO
90_USB_BB_DATA_N
A
22 7 OUT
AUDIO
I2S_BB_TO_AP_BCLK
A
22 7 OUT I2S_BB_TO_AP_LRCLK
22 7 IN
I2S_AP_TO_BB_DOUT
22 7 OUT I2S_BB_TO_AP_DIN
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
RF PMIC: SWITCHERS & LDOS CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST
U_PMIC_E
PDM9655 XW301_E
SHORT-10L-0.1MM-SM
93 BGA 72 2 1
PP_VDD_MAIN VDD_S1 VREG_S1 PP_0V8_SMPS1_SNS_E
MAKE_BASE=TRUE 3
SYM 6 OF 6 VOLTAGE=0.80V
PP_VDD_BOOST PP_VDD_BOOST 11 12 13 17
103 VDD_S1 ROOM=PMU
21 3 2 IN
114 SREG
VOLTAGE=4.3V VDD_S1 L304_E
1UH-20%-3.6A-0.035OHM PP_0V8_SMPS1_E OUT 5
VOLTAGE=0.80V
D
3 GND 84
95
GND_S1
GND_S1
VSW_S1
VSW_S1
94
104 VSW_SMPS1_E 2 1 1 C317_E 1 C322_E 0.80V/2898MA
D
2016 26UF
105 115 20% 26UF
GND_S1 VSW_S1 XW302_E
116 RADIO_PMIC SHORT-10L-0.1MM-SM 2 4V
X5R
20%
GND_S1 2 1 0402-0.1MM 2 4V
X5R
PP_1V2_SMPS2_SNS_E 0402-0.1MM
74 41 VOLTAGE=1.20V GND 3
3 PP_VDD_MAIN VDD_S2 VREG_S2 L301_E ROOM=PMU
2.2UH-20%-2.7A-0.09OHM PP_1V2_SMPS2_E 3
63 VOLTAGE=1.20V
VSW_S2 1 2
53 73 VSW_SMPS2_E
3 GND GND_S2 VSW_S2 2016
1 C318_E 1 C323_E 1.2V/1366MA
XW303_E 26UF 26UF
PP_VDD_MAIN 43 23 PP_1V0_SMPS3_SNS_E SHORT-10L-0.1MM-SM 20% 20%
3 VDD_S3 VREG_S3
44 VOLTAGE=1.00V 2 1 2 4V
X5R 2 4V
X5R
VDD_S3 54 ROOM=PMU 0402-0.1MM 0402-0.1MM
VSW_S3 L305_E
10UF 1 C321_E
NEED 0.8MM PARTS STILL
20% 1 C326_E
2 10V
X5R-CERM
26UF 0.80V/1250MA
C
20% 26UF
C 0402-0.1MM-1 GND MAKE_BASE=TRUE
2 4V
X5R
0402-0.1MM
20%
2 4V
X5R
0402-0.1MMGND 3
21 10 3 2 IN
PP_VDD_MAIN PP_VDD_MAIN 3
PP_VDD_MAIN 3
1 C303_E
10UF
20%
2 10V
X5R-CERM
0402-0.1MM-1
GND MAKE_BASE=TRUE
U_PMIC_E
21 10 3 2 IN
PP_VDD_MAIN PP_VDD_MAIN 3 PDM9655
98 BGA 42
PP_VDD_MAIN 3
21 10 3 2 IN
PP_VDD_MAIN VIN_VPH1 VREG_L1 VOLTAGE=1.20V PP_1V2_LDO1_E OUT 8 12 1.20V/523.3MA
29 SYM 4 OF 6 32
VIN_VPH2 VREG_L2 VOLTAGE=1.20V PP_1V2_LDO2_E OUT 5 1.20V/695MA
LREG 2
1 PP_1V2_SMPS2_E 31 VREG_L3 VOLTAGE=1.00V PP_1V0_LDO3_E OUT 8 1V/431MA
C304_E 3 VDD_L1_2 4
10UF 52 VREG_L4 VOLTAGE=0.90V PP_0V9_LDO4_E OUT 5 0.90V/128MA
VDD_L1_2 85
20%
12 VREG_L5 VOLTAGE=1.80V PP_1V8_LDO5_E 4 5 8 11 12 13 15 16 20 1.80V/272.4MA
2 10V
OUT
PP_1V0_SMPS3_E VDD_L3_8 107
X5R-CERM MAKE_BASE=TRUE 3 IN
VREG_L6 VOLTAGE=1.8V PP_1V8_LDO6_E 1.80V/221.6MA
0402-0.1MM-1 PP_1V0_SMPS3_E 14 VDD_L4
OUT 3 4 5 6 7 8 10 21
3 GND
3 IN
VREG_L7 33 PP_2V7_LDO7 2.7V/5MA
PP_1V8_SMPS4_E 96 VDD_L5_6
4 3 IN
VREG_L8 22 VOLTAGE=1.00V PP_1V0_LDO8_E 1.00V/368.3MA
PP_VDD_BOOST 34 VDD_L7
OUT 8
21 3 2
VREG_L9 3 VOLTAGE=0.80V PP_0V8_LDO9_E 0.80V/1045MA
PP_1V0_SMPS3_E 13 VDD_L9
OUT 5
3 IN
VREG_L10 19 VOLTAGE=3.00V PP_3V0_LDO10_E 3.00V/30MA
PP_VDD_BOOST 20 VDD_L10_11_12_13
OUT 5
21 3 2
VREG_L11 9 VOLTAGE=3.00V PP_UIM1_LDO11_E 5 21 1.8V/60MA
OUT
B 21 10 3 2 IN
MAKE_BASE=TRUE
PP_VDD_MAIN PP_VDD_MAIN 3
1 C14_E VREG_L12
VREG_L13
21
10
VOLTAGE=2.70V
VOLTAGE=3.00V
PP_2V7_LDO12_E
PP_UIM2_LDO13_E
2.7V/69MA
1.8V/60MA
B
4UF OUT 5
PP_VDD_MAIN 3
20%
2 6.3V
CERM-X5R
0201
1 C301_E
10UF
20%
2 10V
C306_E C307_E C308_E 1 C309_E 1 C310_E 1 C311_E C312_E 1 C313_E 1 C314_E 1 C315_E 1 C316_E
X5R-CERM 4.7UF 4.7UF 4.7UF 4UF 4.7UF 4.7UF 4.7UF 15UF 2.2UF 2.2UF 2.2UF
0402-0.1MM-1 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
GND MAKE_BASE=TRUE 6.3 6.3 6.3 2 6.3V 6.3V
2 X5R-CERM1 2 6.3V 6.3 2 6.3V 2 6.3V 6.3V
2 X5R-CERM 2 6.3V
X5R X5R X5R CERM-X5R X5R-CERM1 X5R CERM X5R-CERM X5R-CERM
0402-0.1MM 0402-0.1MM 0402-0.1MM 0201 402 402 0402-0.1MM 0402-0.1MM 0201 0201 0201
21 10 3 2 IN
PP_VDD_MAIN
MAKE_BASE=TRUE
PP_VDD_MAIN 3
VIO TX & RX
PP_1V8_LDO6_E PP_1V8_LDO6_E
PP_VDD_MAIN 3 21 10 8 7 6 5 4 3 11 12 13
17
1 C305_E
10UF
20%
2 10V
X5R-CERM R301_E
0402-0.1MM-1 MAKE_BASE=TRUE 1
0.00 2 PP_1V8_VIO_RX_E
GND 11 12 13
0%
1/32W
MF
01005
MAKE_BASE=TRUE
PP_1V8_LDO6_E 16
A A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
1 NOTICE OF PROPRIETARY PROPERTY: BRANCH
C1114_E
47PF THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
5%
2 16V
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
CERM
01005
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
3 OF 22
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 55 OF 81
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
0%
<0.10V NOSTUFF 51.1K T500/DEV1 1/32W
MF
01005
1 C407_E
PROTO1.5
RADIO_PMIC
0.15V-0.25V 422K 51.1K 16V
47PF
5%
PROTO2.5/DEV2
2 CERM
PROTO1/DEV3
RADIO_PMIC
0.55V-0.65V 105K 51.1K
0.75V-0.85V 66.5K 51.1K PROTO2/DEV4
0.95V-1.05V 44.2K 51.1K EVT U_PMIC_E
PDM9655
1.15V-1.25V 28K 51.1K CARRIER/DEV5 BGA
SYM 1 OF 6
SLEEP_CLK 35 50_SLEEP_CLK_32K_E 6 22 U_PMIC_E
PDM9655
1.35V-1.45V 16.5K 51.1K DVT/DEV6 22 6 XO_OUT_D0_EN_E 28 BB_CLK_EN CLKS LN_BB_CLK
RF_CLK1
30
49
50_MDM_19P2M_CLK_E
50_WTR_38P4M_CLK_R_E
6 22
4
90 GND
BGA
1.75V-1.85V 10K NOSTUFF SPARE NOTE XTAL SYMBOL MIRRORED 3 PP_1V8_SMPS4_E 15 VDD_XO_RF VREG_RF 7 VREG_RF_PMIC_E
11
58
GND
GND
COMPARED TO PREVIOUS SCH XTAL_38P4M_OUT_E 5 XTAL_OUT GND_RF_CLK 8 59 GND
XTAL_38P4M_IN_E 6 69
R409 R410 PRODUCT TYPE Y
RADIO_PMIC XTAL_IN GND
C404_E
PA_THERM2
1
79
Y401_E PP_1V8_LDO5_E
XO_THERM_E 60 17 VREG_XO_PMIC_E 4.7UF GND
XO_THERM VREG_XO
38.4MHZ-10PPM-7PF 20% 106
51.1K RADIO DEV 1
GND
0.00V-0.10V 2 6.3
1.6X1.2-SM 1
NOSTUFF R413_E XO_GND_E 48 GND_XOADC X5R
3 1 100K 0402-0.1MM
3RD TYPE 2
1% RADIO_PMIC
422K 51.1K 1/32W 18 GND_XO_CLK GND_XO 16 C402_E 1
0.15V-0.25V 2 4
NOSTUFF
MF
01005 1UF
10%
R416_E
2RADIO_PMIC 0.00 2
0.35V-0.45V 180K 51.1K POR MLB (FF) 3 1
16V
CER-X6S 2
0402 GND_RF_CLK_XW_E
4 DVDD_BYP_PMIC_E 1
0% NOSTUFF
PMU_TO_BBPMU_RESET_L 2 4
C401_E 1/32W
SPARE 4
RADIO_PMIC
0.55V-0.65V 105K 51.1K 1000PF
10%
2 6.3V
GND_XO_XW_E
MF
01005
RADIO_PMIC
0.95V-1.05V SHORT-10L-0.1MM-SM
ROOM=PMU 1
ROOM=PMU 0%
1/32W
MF
28K 51.1K SPARE 7
2 1
1.15V-1.25V XW2_E
01005
RADIO_PMIC
SHORT-10L-0.1MM-SM
1.35V-1.45V 16.5K 51.1K SPARE 8 ROOM=PMU
1 R418_E
0.00 2
PMIC_CBLPWR_L_E
7.87K 51.1K SPARE 9
4 1
1.55V-1.65V 0%
1/32W
NOSTUFF
MF
1.75V-1.85V 10K NOSTUFF SPARE A 01005
RADIO_PMIC
20 16 15 13 12 11 8 5 4 3 PP_1V8_LDO5_E
16.5K
MAV17.1 1 JPN
1%
PP_1V8_LDO5_E
MAV17.3 3 JPN
BGA
105K 51.1K
20 16 15 13 12 11 8 5 4 3 24 GPIO_01 GPIO_07 77
0.55V-0.65V 20 16 15 13 12 11 8 5 4 3 PP_1V8_LDO5_E
4 BOARD_REV_ID_E
NC
57 GPIO_02
SYM 3 OF 6
GPIO_08 78
NC
NC
1
R408_E
66.5K MAV17.4 4 ROW
GPIO
1.15V-1.25V 2
MF
01005
OMIT_TABLE
JAPAN_ROW_SEL_E 4
A XW1_E
PS_HOLD_E 1 BAT_ID_THERM REF_BYP 6.3V
A
6
2 X5R-CERM SHORT-10L-0.1MM-SM 4 OPT_2_E
5% 61 25 01005
1/32W 4 PMIC_PA_THERM1_E PA_THERM1 GND_REF GND_REF_XW_E 2 1 NOSTUFF NOSTUFF
MF PAGE TITLE
01005
RADIO_PMIC
4 PRODUCT_TYPE_E 62
51
PA_THERM2
PA_THERM3
VREF_LPDDR 82
92
VREF_LPDDR_E
RADIO_PMIC 1
R412_E
150
1
R411_E
150
PMIC: CLOCKS & CONTROL
VREF_MDM VREF_PX_BIAS_E 5 1% 1%
R415_E DRAWING NUMBER SIZE
0.00 2 VREF_WTR 83 VREF_DAC_E 9
1/32W
MF
1/32W
MF 051-02159 D
10 QPOET_PMIC_ADC_E 1
2 01005 2 01005 Apple Inc. REVISION
0%
1/32W
MF
RADIO_PMIC RADIO_PMIC RADIO_PMIC
10.0.0
01005 R404_E NOTICE OF PROPRIETARY PROPERTY: BRANCH
0.00 2
1 BB_VREF_LPDDR2_E 6 THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
0% THE POSESSOR AGREES TO THE FOLLOWING: PAGE
1/32W
MF
01005
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
4 OF 22
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SHEET
56 OF 81
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST
BB:POWER U_MDM_E
1 C527_E
0.22UF
20%
PP_1V8_LDO5_E 3 4 5 8 11 12 13 15 16 20
2 6.3V
X5R PP_3V0_LDO10_E 3
MDM9655 01005-1 1 C535_E
BGA 1.0UF
SYM 8 OF 8 10% U_MDM_E
2 6.3V
X5R-CERM
PP_1V2_LDO2_E B20
PWM2
E16 0201-1 MDM9655
5 3 VDD_P1 VDD_USB_HS_1P8
1 1 1 1 B21 A1 BGA L9
C508_E C510_E C514_E C517_E VDD_P1 GND GND
D 0.22UF
20%
0.22UF
20%
0.22UF
20% 10%
1.0UF F20 VDD_P1
VDD_USB_SS_1P8 C15
PP_1V8_LDO6_E 3 4 5 6 7 8 10 21
A4 GND
SYM 4 OF 8
GND
GND L12 D
2 6.3V 2 6.3V 2 6.3V 2 6.3V
F21 VDD_P1 VDD_PCIE_1P8 E12 A7 GND GND L13
X5R X5R X5R X5R-CERM
01005-1 01005-1 01005-1 0201-1 K20 VDD_P1 1 C528_E 1 C534_E A12 GND GND L16
VDD_USB_HS_3P1 B17
K21 VDD_P1 0.1UF 0.1UF A16 GND GND L17
20% 20%
M2 VDD_P1 VDD_DDR_CORE_1P8 A20 2 6.3V 2 6.3V
A18 GND GND L19
DO WE NEED TO POWER VDD_P2 FOR SECURE DIGITAL? X5R-CERM X5R-CERM
N2 VDD_P1 VDD_DDR_CORE_1P8 E1 01005 01005 A19 GND GND L20
1 C515_E
VOLTAGE=1.8V N20 VDD_P1 VDD_DDR_CORE_1P8 H21 A21 GND GND L21
1 C511_E 1.0UF
10% N21 VDD_P1 VDD_DDR_CORE_1P8 T1 B16 GND GND M1
1.0UF 2 6.3V PP_1V2_LDO2_E
10% X5R-CERM 3 5 B18 GND GND M9
2 6.3V 0201-1 AA15 VDD_P2 VDD_DDR_CORE_1P2 C20
X5R-CERM B19 M10
0201-1 G1 XW501_E GND GND
A3 VDD_P3
VDD_DDR_CORE_1P2
J20
SHORT-10L-0.1MM-SM C540_E C7 GND GND M13
C10 VDD_DDR_CORE_1P2 VDD_DDR_CORE_1P2_G1_E 1.0UF C9 M14
VDD_P3 M21 ROOM=PMU 1 2 GND GND
E2 VDD_DDR_CORE_1P2 C12 M17
21 10 8 7 6 5 4 3 PP_1V8_LDO6_E VDD_P3 N1 GND GND
1 1 1 1 1 1 1 1 L1 VDD_DDR_CORE_1P2 10% C14 M20
C501_E C502_E C504_E C506_E C509_E C512_E C516_E C519_E VDD_P3 P1 6.3V GND GND
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF T2 VDD_DDR_CORE_1P2 X5R-CERM C18 N6
20% 20% 20% 20% 20% 20% 20% 20% VDD_P3 0201-1 GND GND
2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 6.3V
2 X5R-CERM 2 6.3V 2 6.3V U21 VDD_P3 VREF_SDC U16 VREF_PX_BIAS_E C19 GND GND N7
X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM 4
01005 01005 01005 01005 01005 01005 01005 01005 AA4 W11 C21 N10
VDD_P3 VREF_UIM XW502_E GND GND
AA17 SHORT-10L-0.1MM-SM D1 N11
VDD_P3 B7 QLINK_0V9_E GND GND
VDD_QLINK_CLK_0P9 PP_0V9_LDO4_E 3 5 D4 N14
AA12 C8 ROOM=PMU GND GND
21 3 PP_UIM1_LDO11_E VDD_P4 VDD_QLINK_IO_0P9 PP_0V9_LDO4_E 3 5 E10 N15
GND GND
3 PP_UIM2_LDO13_E AA10 VDD_P5 VDD_PLL F12 PP_1V8_LDO5_E 3 4 5 8 11 12 13 15 16 20
E15 GND GND N19
E20 P7
21 10 8 7 6 5 4 3 PP_1V8_LDO6_E AA7 VDD_P7 VDD_QFPROM_PRG F17 PP_1V8_LDO5_E P501_E
P2MM-NSM
3 4 5 8 11 12 13 15 16 20 E21
GND
GND
GND
GND P8
AA19 VDD_P7 SM
VDD_ALWAYS_ON T11 PP_VDD_AON_E 1 F1 GND GND P11
1 C503_E 1 C505_E 1 C507_E VOLTAGE=1.00V
PP
C16 VDD_USB_HS_0P9 F10 GND GND P12
1.0UF 1.0UF 0.1UF
10% 10% 20% 1 C530_E 1 C524_E 1 C556_E 1 C536_E 1 C541_E F13 GND GND P15
2 6.3V 2 6.3V 2 6.3V B14 VDD_USB_SS_0P9
X5R-CERM X5R-CERM X5R-CERM 1.0UF 0.1UF 1.0UF 1.0UF 1.0UF F14 P16
C 0201-1 0201-1 01005 C13 VDD_USB_SS_0P9 10%
2 6.3V
X5R-CERM
20%
6.3V
2 X5R-CERM
10%
2 6.3V
X5R-CERM
10%
2 6.3V
X5R-CERM
10%
2 6.3V
X5R-CERM
F19
GND
GND
GND
GND P17 C
B10 VDD_PCIE_0P9 0201-1 01005 0201-1 0201-1 0201-1 G5 GND GND P21
5 3 PP_0V9_LDO4_E C11 VDD_PCIE_0P9 G6 GND GND R1
1 C513_E 1 C518_E G7 GND GND R5
0.1UF 1.0UF G8 GND GND R6
20% 10%
2 6.3V 2 6.3V
G12 GND GND R8
X5R-CERM X5R-CERM
01005 0201-1 G13 GND GND R9
G16 GND GND R12
G17 GND GND R13
G19 GND GND R16
G20 GND GND T5
G21 GND GND T9
U_MDM_E H9 GND GND T10
MDM9655 H10 GND GND T13
BGA H14 GND GND T14
SYM 7 OF 8
H20 GND GND U1
PWM1
J5 GND GND V21
PP_0V8_SMPS5_E F15 VDD_CORE VDD_MODEM F6 PP_0V8_SMPS1_E
5 3 3 5 J6 GND GND AA1
F16 VDD_CORE VDD_MODEM F7
J7 GND GND AA5
G14 VDD_CORE VDD_MODEM G9
J10 GND GND AA8
H13 VDD_CORE VDD_MODEM G10
J11 GND GND AA9
J12 VDD_CORE VDD_MODEM H6
J14 GND GND AA11
J13 VDD_CORE VDD_MODEM H7
J15 GND GND AA14
K13 VDD_CORE VDD_MODEM H8
J21 GND GND AA18
K14 VDD_CORE VDD_MODEM J8
K1 GND
L14 VDD_CORE VDD_MODEM J9
K7 GND
B
N12
N13
VDD_CORE
VDD_CORE
VDD_MODEM
VDD_MODEM
K6
K9
K8 GND B
K11 GND
P13 VDD_CORE VDD_MODEM K10
K12 GND GND AA20
P14 VDD_CORE VDD_MODEM L7
K15 GND GND AA21
R7 VDD_CORE VDD_MODEM M6
K16 GND
R10 VDD_CORE VDD_MODEM M7
L5 GND
R11 VDD_CORE VDD_MODEM M8
L6 GND
R14 VDD_CORE VDD_MODEM N8
L8 GND
R15 VDD_CORE VDD_MODEM N9
T7 VDD_CORE VDD_MODEM P9
T8 VDD_CORE VDD_MODEM P10
T15 VDD_CORE
VDD_MEM L11 PP_0V8_LDO9_E
T16 VDD_CORE
3 5
VDD_MEM L15
5 3 PP_0V8_LDO9_E D19 VDD_MEM VDD_MEM M5
E19 VDD_MEM VDD_MEM M11
F5 VDD_MEM VDD_MEM M12 5 3 PP_0V8_SMPS5_E
F8 VDD_MEM VDD_MEM M15 1 C521_E 1 C525_E 1 C531_E 1 C537_E 1 C542_E 1 C545_E 1 C548_E 1 C551_E 1 C554_E
F9 VDD_MEM VDD_MEM M16 2.2UF 0.22UF 0.22UF 0.22UF 0.22UF 0.1UF 0.1UF 0.1UF 0.1UF
20% 20% 20% 20% 20% 20% 20% 20% 20%
F11 VDD_MEM VDD_MEM M19 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V
X5R-CERM X5R X5R X5R X5R X5R-CERM X5R-CERM X5R-CERM X5R-CERM
G11 VDD_MEM VDD_MEM N16 0201 01005-1 01005-1 01005-1 01005-1 01005 01005 01005 01005
G15 N17 OMIT_TABLE
VDD_MEM VDD_MEM
H5 VDD_MEM VDD_MEM P6
H11 VDD_MEM VDD_MEM R17 5 3 PP_0V8_LDO9_E
H12 VDD_MEM VDD_MEM T6 1 C522_E 1 C526_E 1 C532_E 1 C538_E 1 C543_E 1 C546_E 1 C549_E 1 C552_E 1 C555_E
H15 VDD_MEM VDD_MEM T12 2.2UF 0.22UF 0.22UF 0.22UF 0.22UF 0.1UF
20% 20% 20% 20% 20% 20% 0.1UF 0.1UF 0.1UF
H16 T17 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 6.3V 20% 20% 20%
A PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
TABLE_5_HEAD
J16
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM U12
2 X5R-CERM
0201
X5R
01005-1
X5R
01005-1
X5R
01005-1
X5R
01005-1
2 X5R-CERM
01005
6.3V
2 X5R-CERM
01005
6.3V
2 X5R-CERM
01005
2 6.3V
X5R-CERM
01005
A
J17 U15 OMIT_TABLE PAGE TITLE
BB: POWER
VDD_MEM VDD_MEM
TABLE_5_ITEM
D
90_PCIE_AP_TO_BB_TXD_N OUT 2 6 6 90_PCIE_AP_TO_BB_TXD_P
MAKE_BASE=TRUE
90_PCIE_AP_TO_BB_TXD_P 2 6
D
90_PCIE_BB_TO_AP_RXD_P OUT 2 6
6 90_PCIE_AP_TO_BB_TXD_N 90_PCIE_AP_TO_BB_TXD_N 2 6
MAKE_BASE=TRUE
90_PCIE_BB_TO_AP_RXD_N OUT 2 6 6 90_PCIE_BB_TO_AP_RXD_P 90_PCIE_BB_TO_AP_RXD_P 2 6
MAKE_BASE=TRUE
90_PCIE_BB_TO_AP_RXD_N 90_PCIE_BB_TO_AP_RXD_N
U_MDM_E
6 2 6
MAKE_BASE=TRUE MDM9655
U_MDM_E
BGA
MDM9655
SYM 6 OF 8
BGA MEMORY
SYM 1 OF 8 4 BB_VREF_LPDDR2_E N5 VREF_LPDDR2 VREF_DQ_BDM H19
USB_PCIE 1 C603_E K19 VREF_DQ0
BDM_ZQ D2 BB_BDM_ZQ_E
PCIE_REFCLK_P E13 90_PCIE_AP_TO_BB_REFCLK_P 6
0.1UF H17 VREF_DQ1
IN 20%
PCIE_REFCLK_M E14 90_PCIE_AP_TO_BB_REFCLK_N 6 2 6.3V EBI1_CAL P5 BB_EBI1_CAL_E
RADIO_BB
IN X5R-CERM
01005
21 2 90_USB_BB_DATA_P E17 USB_HS_DP PCIE_TX_P A11 PCIE_BB_TO_AP_TX CAPS ARE MOVED TO AP PAGE TO BE CONSISTENT WITH D1X
90_PCIE_BB_TO_AP_RXD_P 6 RADIO_BB
OUT 1 1
21 2 90_USB_BB_DATA_N C17 USB_HS_DM PCIE_TX_M B11 90_PCIE_BB_TO_AP_RXD_N 6
R604_E R605_E
OUT
240 240
B13 A9 1% 1%
USB_SS_TX_P PCIE_RX_P 90_PCIE_AP_TO_BB_TXD_P 6 1/32W 1/32W
NC IN
MF MF
A13 USB_SS_TX_M PCIE_RX_M B9 90_PCIE_AP_TO_BB_TXD_N
NC IN 6
2 01005
RADIO_BB 2 01005
RADIO_BB
A15 USB_SS_RX_P PCIE_REXT A10 PCIE_CAL_RES_E
NC
B15 USB_SS_RX_M
NC
1
B12 NC R603_E
NC 100
A14 1%
SS_CAL_RES_E USB_SS_REXT 1/32W
A17 MF
BB_USB_HS_TXRTUNE_E USB_HS_REXT 2 01005
RADIO_BB
1
R601_E
100 1
R602_E
C 1%
1/32W
MF 1%
4.02K C
2 01005
RADIO_BB
1/32W
MF
01005
2RADIO_BB
PP_1V8_LDO6_E
21 10 8 7 5 4 3
NOTE: NO STUFF BUFFER FOR EUREKA CONFIG
U2_E
74AUP1G34GX
U_MDM_E
5
SOT1226
MDM9655 2 4
BGA
NC
3
SYM 3 OF 8
1
22 4 50_SLEEP_CLK_32K_E Y2 SLEEP_CLK CONTORL RESOUT* N3 NC
NC
XO_OUT_D0_EN_E L2 CXO_EN PS_HOLD M3 PS_HOLD_E
B B
22 4 4
A A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
BB:GPIOS & QLINK CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST
D
U_MDM_E
MDM9655
D
BGA
SYM 5 OF 8
Y10 GPIO A2
GPIO_0 GPIO_40 BB_GNSS_LNA_EN_E 20 22
U20 RADIO_BB A8 QLINK_REQ_W0_E
OUT
U_MDM_E
GPIO_1 GPIO_41 7
W10 B8 QLINK_EN_W0_E
MDM9655
GPIO_2 GPIO_42 7
U10 B3 BGA
GPIO_3 GPIO_43 NC
Y1 V3 SYM 2 OF 8
GPIO_4 GPIO_44 75_RFFE3_SDATA_E 7
NC ANALOG_RF
W3 GPIO_5 GPIO_45 V1 75_RFFE3_SCLK_E
NC 7
QLINK_CLK_P_E E9 QLINK_CLK_P NC B4
W2 GPIO_6 GPIO_46 V2 UAT_TUNER_RFFE_DATA
22 8 IN NC
NC 7
QLINK_CLK_N_E E8 QLINK_CLK_M NC C4
W1 GPIO_7 GPIO_47 U3 UAT_TUNER_RFFE_CLK
22 8 IN NC
NC 7
QLINK_DL0_P_E A5 QLINK_DL0_P
UART_BB_TO_AOP_RXD Y8 GPIO_8 GPIO_48 U2 75_RFFE5_SDATA_E
22 8 IN
NC D20
DEVIATE FROM MAV13
22 2 OUT 7
QLINK_DL0_N_E B5 QLINK_DL0_M NC
UART_AOP_TO_BB_TXD U5 GPIO_9 GPIO_49 T3 75_RFFE5_SCLK_E
22 8 IN
NC D21
22 2 IN 7
QLINK_DL1_P_E C6 QLINK_DL1_P NC
I2C MOVE PER EUREKA BB_EEPROM_I2C_SDA_E W8 GPIO_10 GPIO_50 Y18 22 8 IN
7
NC QLINK_DL1_N_E C5 QLINK_DL1_M NC P2
BB_EEPROM_I2C_SCL_E U8 GPIO_11 GPIO_51 W18 AP_TO_BB_TIME_MARK
22 8 IN NC
7 OUT 2 22
QLINK_DL2_P_E B6 QLINK_DL2_P NC AA2
I2S_BB_TO_AP_LRCLK W5 GPIO_12 GPIO_52 G3 UART_BB_TO_WLAN_COEX
22 8 IN NC
22 2 2 7 21
QLINK_DL2_N_E A6 QLINK_DL2_M NC AA3
I2S_AP_TO_BB_DOUT U6 GPIO_13 GPIO_53 W19 UART_WLAN_TO_BB_COEX
22 8 IN NC
22 2 IN 2 7 21
QLINK_UL0_P_E E6 QLINK_UL0_P
I2S_BB_TO_AP_DIN Y5 GPIO_14 GPIO_54 Y21 22 8 OUT
22 2 OUT NC QLINK_UL0_N_E E7 QLINK_UL0_M
22 2 I2S_BB_TO_AP_BCLK W4 GPIO_15 GPIO_55 P20 BB_TO_AP_RESET_DETECT_L 2 22
22 8 OUT
OUT
U9 GPIO_16 GPIO_56 W21 AP_TO_BB_COREDUMP 2 22
NC IN
U7 R20
GPIO_17 NC PER RFSW. MOVED TO PIN50
BB EEPROM
NC GPIO_57
Y6 GPIO_18 GPIO_58 Y20 MPM AP_TO_BB_IPC_GPIO1 2
NC BI
AA6 GPIO_19 GPIO_59 R19
NC NC
Y9 GPIO_20 GPIO_60 W6 PCIE_AP_TO_BB_DEV_WAKE PER EUREKA
NC NC PP_1V8_LDO6_E
Y7 GPIO_21 GPIO_61 Y3 BB_TO_PMU_PCIE_HOST_WAKE_L 2 7
3 4 5 6 7 8 10 21
NC
W7 P19
C
1 C701_E
C NC
NC
W9
GPIO_22
GPIO_23
GPIO_62
GPIO_63 V19
NC
NC
1
R701_E
10K
1UF
20%
1
R702_E
10K
CONFIGURABLE BY DIP SWITCH FAST_BOOT_SELECT0_E T20 GPIO_24 GPIO_64 W17 PCIE_BB_BI_AP_CLKREQ_L 1% 2 10V 1%
7 BI 2 7
1/32W X5R 1/32W
T21 GPIO_25 GPIO_65 Y17 PCIE_AP_TO_BB_RESET_L 2 MF 0201 MF
NC IN RADIO_BB
75_RFFE6_SCLK_E K3 W20 AP_TO_BB_MESA_ON 2 01005 2 01005
A1
7 GPIO_26 GPIO_66 IN 2 22 RADIO_BB RADIO_BB
7 75_RFFE6_SDATA_E J2 GPIO_27 GPIO_67 R21 FAST_BOOT_SELECT1_E 7 VCC
WMSS_RESET_L_E H1 GPIO_28 GPIO_68 H3
8
H2 U19
NC U_EEPROM_E
GPIO_29 GPIO_69 BB_SIM1_REMOVAL_ALARM_E 4 CAT24C08C4A
NC BI
F2 GPIO_30 GPIO_70 Y19 WLCSP
NC NC BB_EEPROM_I2C_SCL_E B1 SCL RADIO_BB SDA B2 BB_EEPROM_I2C_SDA_E
E3 GPIO_31 GPIO_71 Y4 7 7
NC NC
D3 GPIO_32 GPIO_72 J3 75_RFFE2_SDATA_E 7
NOR SPI STATUS - RF DEV ONLY NC
C3 GPIO_33 GPIO_73 J1 75_RFFE2_SCLK_E 7
NC
C2 GPIO_34 GPIO_74 L3 LAT_TUNER_RFFE1_DATA 7 VSS
NC PP1V8_S2
C1 GPIO_35 GPIO_75 K2 LAT_TUNER_RFFE1_CLK PP_1V8_LDO6_E
2
A2
7 21 10 8 7 6 5 4 3
NC
22 2 BB_TO_STROBE_DRIVER_GSM_BURST_IND B1 GPIO_36 GPIO_76 W12 BB_SIM1_DATA_E 21
OUT BI 1
B2 GPIO_37 GPIO_77 T19 BB_SIM1_DETECT_E 1 R801_E
NC IN 21 R714_E 100K
F3 GPIO_38 GPIO_78 U11 BB_SIM1_RST_E 21 10K 5%
NC OUT
1% 1/32W
G2 GPIO_39 GPIO_79 Y11 BB_SIM1_CLK_E 21 1/32W MF
NC OUT
MF 2 01005
2 01005
RADIO_BB
21 10 8 7 6 5 4 3 PP_1V8_LDO6_E 7 2 PCIE_BB_BI_AP_CLKREQ_L
7 FAST_BOOT_SELECT0_E
21 10 8 7 6 5 4 3 PP_1V8_LDO6_E
MAKE_BASE=TRUE
MAKE_BASE=TRUE
7 LAT_TUNER_RFFE1_DATA LAT_TUNER_RFFE1_DATA 2 8
BI
75_RFFE2_SDATA_E 75_RFFE2_SDATA_E 1
7 BI 16 R713_E
100K
5%
1/32W
MF
75_RFFE3_SCLK_E 75_RFFE3_SCLK_E 75_RFFE5_SCLK_E 75_RFFE5_SCLK_E
7 11 12 13 7 17
2 01005
7 2 BB_TO_PMU_PCIE_HOST_WAKE_L
0% RADIO_WTR
1/32W
MF
01005
R717_E
0.00 2
7 QLINK_EN_W0_E 1 QLINK_EN_W0_R_E OUT 8
0% RADIO_WTR
7 UAT_TUNER_RFFE_CLK UAT_TUNER_RFFE_CLK 2 7 75_RFFE6_SCLK_E 75_RFFE6_SCLK_E 10 11 12 13 1/32W
MF
01005
A A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
1 C803_E
0.1UF
20%
2 6.3V
X5R-CERM
01005
U_WTR_E
WTR5975
CSP 1 C801_E
C801 AND C803 TO 0.1UF PER EUREKA
SYM 1 OF 5 0.1UF
VDD_1P0_DIG 187 20%
110 2 6.3V
X5R-CERM
VDD_1P0_DIG 01005
4 50_WTR_38P4M_CLK_E 50 XO_IN VDD_1P0_DIG 232 PP_1V0_LDO8_E 6 5 4 3 PP_1V8_LDO6_E
21 10 7
DNC 113
NC 1 C802_E
252 DNC VDD_1P8_DIG 155
NC 0.1UF
229 DNC 20%
NC
241 2 6.3V
X5R-CERM
DNC DNC 253 NC
NC
230 DNC
01005 PLACE C827 AT
NC
QLINK_CLK- 153 QLINK_CLK_N_E
CENTER OF STAR
20 50_GNSS_WTR_IN_E 20 GNSS_IN QLINK_CLK+ 175 QLINK_CLK_P_E
7 22
7 22
ROUTING
19 DNC
NC PP_1V0_LDO3_E PP_1V8_LDO5_E PP_1V2_LDO1_E
QLINK_UL0- 164
3 8 3 4 5 8 11 12 3 8 12
QLINK_UL0_N_E 7 22 13 15 16 20
C 10 ETDAC_QPOET1_P_E 75
246
ETDAC_CH0+ QLINK_DL0+ 186
196
QLINK_DL0_P_E 7 22
X5R-CERM1
402
2 X5R-CERM1
402
X5R-CERM1
402 C
ETDAC_CH1- QLINK_DL1- QLINK_DL1_N_E 7 22
NC
234 ETDAC_CH1+ QLINK_DL1+ 219 QLINK_DL1_P_E 7 22
NC
R811_E QLINK_DL2- 231 QLINK_DL2_N_E 7 22
0.00 101 209
7 2 LAT_TUNER_RFFE1_CLK 1 2 75_RFFE1_SCLK_WTR_E DNC QLINK_DL2+ QLINK_DL2_P_E 7 22
MF 0.00 8 3 PP_1V0_LDO3_E
LAT_TUNER_RFFE1_DATA 01005 1 2
7 2
GND 247
0% 1 C805_E 1 C808_E
GND 57
1/32W
MF 0.1UF 0.1UF
WMSS_RESET_L_E 01005 222 WMSS_RESET* GND 5 20% 20%
2 6.3V 2 6.3V
7
A A
PAGE TITLE
XCVR
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
TRANSCEIVER: TX & RX CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST
PART#
117S0161
QTY
1
DESCRIPTION
01005 OR
REFERENCE DESIGNATOR(S)
R919_E
CRITICAL
CRITICAL
BOM OPTION
ROW
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
D U_WTR_E
D
WTR5975
CSP
U_WTR_E SYM 4 OF 5
DNC 6
WTR5975 NC
DNC 17
CSP R901_E NC
49.9 2 DNC 27
SYM 3 OF 5 1 50_FBRX_TERM_E NC
45 GND DNC 12 DNC 28
NC NC
TABLE_5_HEAD
XCVR
GND
MF
01005
OMIT_TABLE
R919_E JPN = STUFF DRAWING NUMBER SIZE
0.00 2 50_DRX_HB_OUT1_MBHB_WTR_IN_E 051-02159 D
9 50_DRX_HB_WTR_IN_E 1 16 Apple Inc. REVISION
0%
1/32W
MF
STRIPLINE
10.0.0
01005 NOTICE OF PROPRIETARY PROPERTY: BRANCH
OMIT_TABLE
ROW = STUFF THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
9 OF 22
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 61 OF 81
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
QET:MODULE
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST
D D
MAKE_BASE=TRUE
21 3 2 PP_VDD_MAIN PP_VDD_MAIN 10
PP_VDD_MAIN 10
13 12 11 7 75_RFFE6_SCLK_E R1001_E
0.00 2
QPOET_VDD_1P8_E 1 PP_1V8_LDO6_E 3 4 5 6 7 8 21
0%
VDD_AMP_DECOUPLING_E 1/32W
MF
01005
1 C1000_E
1 C1001_E 6800PF
10UF 10%
22 13 12 11 7 75_RFFE6_SDATA_E 20% 2 6.3V
X5R
2 6.3V
X5R 01005
0402-10
SDATA C3
VBAT D4
VBAT_SW D2
VDD_AMP D7
SCLK B2
VDD_1P8 B7
C C
U_QET_E U_QET_E
P215 P215
B3 VIN_BOB LGA-1 LGA-1
10 PP_VDD_MAIN
SYM 1 OF 2 ECM_OUT B6 QPOET_PMIC_ADC_E 4
SYM 2 OF 2
A1 C9
A2 D6
A3 D3
A4 D1
ETDAC_QPOET1_P_E
8
C5 DAC+ A5 E1
ETDAC_QPOET1_N_E
8
B5 DAC- A6 D9
A7 E2
A8 GND GND E4
A9 E3
B1 E7
QPOET_USID_E B8 USID_LSB VCC_PA_ET0 C8 PP_QET_PA_E 11 12 13
B4 E6
VOLTAGE=4.0V
VCC_PA_ET1 D8 B9 E5
C1 E8
C2 E9
1
R1006_E C4
0.00 C7
0%
1/32W
MF
2 01005
B VCC_PA_GSM0 C6
VCC_PA_GSM1 D5
NC B
NC
A A
PAGE TITLE
QPOET MODULE
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
LB PAD
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST
TABLE_5_HEAD
MF
A5 GND THRM_PAD H6 01005 0.1UF 47PF 2 01005 01005 PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
470PF 20% 5% NOSTUFF
A4 H7 10% 2 6.3V 2 16V
TABLE_5_ITEM
GND THRM_PAD RADIO_LB_PAD 152S2006 1 6.2NH UHQ, LB ANT MATCH R1104_E CRITICAL ROW
A6 H8 2 10V
X5R
X5R-CERM
01005
CERM
01005 RADIO_LB_PAD
GND THRM_PAD 01005
A7 GND THRM_PAD H9 RADIO_LB_PAD RADIO_LB_PAD
A8 GND THRM_PAD H10
A9 GND THRM_PAD H11
A10 GND THRM_PAD H13 17 13 12 3 PP_1V8_LDO6_E
A11 H14 VOLTAGE=1.8V
A12
GND
GND
THRM_PAD
THRM_PAD B6
1 C1110_E
180PF
A13 GND THRM_PAD B7 10%
10V
2 CERM
A14 GND THRM_PAD B8
01005
A15 GND THRM_PAD B9
A16 GND THRM_PAD B10 13 12 10 7 75_RFFE6_SCLK_E
B1 GND THRM_PAD B11
1 C1107_E
B16 GND THRM_PAD B13
47PF
C1 GND THRM_PAD B14 5%
C16 B15 2 16V
CERM
GND THRM_PAD 01005
D1 GND THRM_PAD C2 NOSTUFF
D16 C3 RADIO_LB_PAD
GND THRM_PAD
75_RFFE6_SDATA_E
E1 GND THRM_PAD C4 22 13 12 10 7
R1105_E
E16 C5 1 1.00 2
GND THRM_PAD C1116_E PP_1V8_VDD_LNA_LB_PAD_E 1 PP_1V8_LDO5_E 3 4 5 8 12 13 15 16 20
F1 C6 47PF VOLTAGE=1.8V
GND THRM_PAD 1%
5% 1/32W
F16 C7 2 16V MF
G1
GND
GND
THRM_PAD
THRM_PAD C8
CERM
01005
1 C1112_E 01005
NOSTUFF 0.22UF
G16 C9
C
20%
C H1
GND
GND
THRM_PAD
THRM_PAD C10 13 12 3 PP_1V8_VIO_RX_E
RADIO_LB_PAD
2 6.3V
X5R
01005-1
H16 C11
GND THRM_PAD 1 C1102_E
PP_VCC1_LB_PA_E
J1 GND THRM_PAD C12
180PF
VOLTAGE=4.0V
1 C1105_E
J2 GND THRM_PAD C13 10%
2 10V 47PF
J3 GND THRM_PAD C14 CERM 5%
J4 D3
01005 2 16V
CERM
GND THRM_PAD 01005
J5 GND THRM_PAD D4 NOSTUFF
J6 D5 RADIO_LB_PAD
GND THRM_PAD 13 12 7 75_RFFE3_SCLK_E
J7 GND THRM_PAD D6 22 13 12 7 75_RFFE3_SDATA_E
J8 GND THRM_PAD D7
SDATA_TX G15
VIO_TX H15
VCC1 D15
VCC2 C15
VBATT E15
SCLK_TX F15
SDATA_RX B3
SCLK_RX B5
VIO_RX B4
VDD_LNA B2
J9 GND THRM_PAD D8
J10 GND THRM_PAD D9
J11 GND THRM_PAD D10
J12 D11 RADIO_LB_PAD
GND THRM_PAD R1108_E
J13 GND THRM_PAD D12 RADIO_LB_PAD 0.00 2
J14 D13 50_LBPAD_2G_OUT_E 1 50_LBPAD_2G_OUT_2G_CPL_IN_JPN_E 17
GND THRM_PAD R1101_E
J15 D14 1%
GND THRM_PAD 0.00 2 1/20W 1
J16 GND THRM_PAD E2 9 50_TX_LB_WTR_E 1 50_TX_LB_PA_IN_E B12 TX_LB_IN PA_LB_E LB_2G_ANT H12 MF
0201
E3 0% SKY78140 OMIT_TABLE
THRM_PAD 1/32W
1 LGA L1102_E
E4 MF
01005
C1103_E 10NH-3%-250MA
THRM_PAD 47PF SYM 1 OF 2 0201
THRM_PAD E5 5%
E6 2 16V
CERM OMIT_TABLE
THRM_PAD 01005
E7 2 RADIO_LB_PAD
THRM_PAD NOSTUFF
E8 RADIO_LB_PAD
THRM_PAD
THRM_PAD E9
E10
B
THRM_PAD
E11 R1104_E B
THRM_PAD 6.8NH-3%-0.4A-0.3OHM
THRM_PAD E12
E13 LB_ANT H2 50_PAD_ANT_LB_E 1 2 50_PAD_ANT_LB_CPL2_IN_E 17
THRM_PAD 0201
E14 OMIT_TABLE
THRM_PAD
THRM_PAD F2
1 L1103_E
1.8PF
THRM_PAD F3 +/-0.05PF
2 25V
1 L1101_E
THRM_PAD F4 C0G-CERM
0201
0.5PF
+/-0.05PF
THRM_PAD F5 2 25V
COG-CERM
THRM_PAD F6 0201
F7 RADIO_LB_PAD
THRM_PAD OMIT_TABLE
THRM_PAD F8
THRM_PAD F9
THRM_PAD F10 9 50_PRX_LB2_WTR_IN_E D2 PRX_LB
THRM_PAD F11
THRM_PAD F12
THRM_PAD F13
THRM_PAD F14
THRM_PAD G2
THRM_PAD G3
THRM_PAD G4
THRM_PAD G5
THRM_PAD G6
THRM_PAD G7
THRM_PAD G8
THRM_PAD G9
G10
A THRM_PAD
THRM_PAD G11 A
G12 PAGE TITLE
LB PAD
THRM_PAD
THRM_PAD G13
THRM_PAD G14 DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
HB PAD 195
196
197
198
199
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
PA_HB_E
HB-PAD-AFEM-8072
LGA
SYM 3 OF 3
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
293
294
295
296
297
THRM_PAD THRM_PAD
13 11 10 PP_QET_PA_E 200 298
THRM_PAD THRM_PAD
RADIO_HB_PAD 201 299
THRM_PAD THRM_PAD
R1207_E
1.00 NOSTUFF VOLTAGE=1.8V R1205_E 202 THRM_PAD THRM_PAD 300 PA_HB_E
D
1
1%
2 HB_SNUBBER_E
1 C1205_E
RADIO_HB_PAD
PP_1V8_VDD_LNA_HB_PAD_E 1
0.00 2
PP_1V8_LDO5_E 3 4 5 8 11 13 15 16 20
203 THRM_PAD THRM_PAD 301 1 GND
HB-PAD-AFEM-8072
LGA GND 108 D
1/32W 47PF R1203_E 1 C1207_E 0% 204 THRM_PAD THRM_PAD 302 2 GND SYM 2 OF 3 GND 109
MF 1 C1211_E 5% 0.00 2 1/32W
01005 2 16V 1 PP_VCC1_HB_PA_E 1000PF MF 205 THRM_PAD THRM_PAD 303 3 GND GND 110
470PF CERM VOLTAGE=4.0V 10% 01005
10% 01005 0% 2 6.3V 206 THRM_PAD THRM_PAD 304 4 GND GND 111
2 10V
X5R RADIO_HB_PAD 1/32W X5R-CERM
01005 207 305 5 112
01005 NOSTUFF MF THRM_PAD THRM_PAD GND GND
01005 RADIO_HB_PAD RADIO_HB_PAD 208 306 6 113
THRM_PAD THRM_PAD GND GND
VOLTAGE=1.2V R1206_E 209 THRM_PAD THRM_PAD 307 7 GND GND 114
0.00 2 210 308 9 115
17 13 11 3 PP_VDD_BOOST PP_1V2_VDD_LNA_HB_PAD_E 1 PP_1V2_LDO1_E 3 8 THRM_PAD THRM_PAD GND GND
1 C1206_E 1 C1208_E 0% 211 THRM_PAD THRM_PAD 309 10 GND GND 116
1/32W
1UF 0.1UF MF 212 THRM_PAD THRM_PAD 310 11 GND GND 117
20% 20% 01005
2 16V 2 6.3V 213 THRM_PAD THRM_PAD 311 13 GND GND 118
CER-X5R X5R-CERM
0201 01005 214 THRM_PAD THRM_PAD 312 15 GND GND 119
RADIO_HB_PAD RADIO_HB_PAD 215 313 16 120
THRM_PAD THRM_PAD GND GND
17 13 11 3 PP_1V8_LDO6_E 216 314 19 121
THRM_PAD THRM_PAD GND GND
13 11 10 7 75_RFFE6_SCLK_E 217 315 21 122
C1201_E 22 13 11 10 7 75_RFFE6_SDATA_E 218
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD 316 22
GND
GND
GND
GND 123
10PF PP_1V8_VIO_RX_E 219 124
5% 3
13 11 THRM_PAD THRM_PAD 317 26 GND GND
16V 75_RFFE3_SCLK_E
NP0-C0G 13 11 7 220 THRM_PAD THRM_PAD 318 27 GND GND 125
01005 13
75_RFFE3_SDATA_E
NOSTUFF C1202_E 7
11
22
221 THRM_PAD THRM_PAD 319 31 GND GND 126
10PF 222 THRM_PAD THRM_PAD 320 33 GND GND 127
SDATA_RX 30
SCLK_RX 29
VIO_RX 28
SDATA_TX 25
SCLK_TX 24
VIO_TX 23
VBATT 20
VCC1 18
VCC2 17
VBIAS_LNA 41
VDD_LNA 40
5%
16V 223 THRM_PAD THRM_PAD 321 35 GND GND 128
NP0-C0G
01005 224 THRM_PAD THRM_PAD 322 37 GND GND 129
NOSTUFF 225 323 39 130
THRM_PAD THRM_PAD GND GND
226 THRM_PAD THRM_PAD 324 42 GND GND 131
RADIO_HB_PAD 227 325 43 132
THRM_PAD THRM_PAD GND GND
R1201_E 228 THRM_PAD THRM_PAD 326 44 GND GND 133
0.00 2 12 TX_MB_IN PA_HB_E 229 327 45 134
C 9 50_TX_MB_WTR_E 1
0%
50_TX_MB_PA_IN_E
HB-PAD-AFEM-8072 230
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD 328 46
GND
GND
GND
GND 135 C
1/32W NOSTUFF 231 329 47 136
MF LGA THRM_PAD THRM_PAD GND GND
01005 1 C1203_E SYM 1 OF 3 232 THRM_PAD THRM_PAD 330 48 GND GND 137
0.5PF
+/-0.05PF 233 THRM_PAD THRM_PAD 331 49 GND GND 138
2 16V
C0G-CERM 234 332 50
01005 THRM_PAD THRM_PAD GND
RADIO_HB_PAD 235 THRM_PAD THRM_PAD 333 51 GND THRM_PAD 139
236 THRM_PAD THRM_PAD 334 52 GND THRM_PAD 140
237 THRM_PAD THRM_PAD 335 53 GND THRM_PAD 141
RADIO_HB_PAD
C1200_E 50_HBPAD_2G_OUT_MATCH_E R1211_E 238 THRM_PAD THRM_PAD 336 54 GND THRM_PAD 142
27PF 50_HBPAD_2G_OUT_E R1209_E 2.4NH+/-0.1NH-0.6A 239 THRM_PAD THRM_PAD 337 55 GND THRM_PAD 143
14 TX_HB_IN 0.00 2 50_2G_HB_PA_OUT_CPL2_IN_E 240 338 56 144
9 50_TX_HB_WTR_E 1 2 50_TX_HB_PA_IN_E TX_2GHB_OUT 8 1 1 2 17 THRM_PAD THRM_PAD GND THRM_PAD
NOSTUFF 0201 241 339 57 145
1% THRM_PAD THRM_PAD GND THRM_PAD
5% 1 C1204_E 1/20W OMIT_TABLE
16V
NP0-C0G 0.5PF MF
0201
1 C1212_E RADIO_HB_PAD
242 THRM_PAD THRM_PAD 340 59 GND THRM_PAD 146
01005 +/-0.05PF RADIO_HB_PAD 1PF 243 THRM_PAD THRM_PAD 341 60 GND THRM_PAD 147
2 16V
C0G-CERM
+/-0.05PF
244 342 61 148
01005 OMIT_TABLE 2 25V
C0G-CERM THRM_PAD THRM_PAD GND THRM_PAD
RADIO_HB_PAD 0201 245 THRM_PAD THRM_PAD 343 58 GND THRM_PAD 149
246 THRM_PAD THRM_PAD 344 63 GND THRM_PAD 150
247 THRM_PAD THRM_PAD 345 64 GND THRM_PAD 151
248 THRM_PAD THRM_PAD 346 65 GND THRM_PAD 152
249 THRM_PAD THRM_PAD 347 66 GND THRM_PAD 153
250 THRM_PAD THRM_PAD 348 67 GND THRM_PAD 154
251 THRM_PAD THRM_PAD 349 68 GND THRM_PAD 155
252 350 69 156
R1210_E 253
THRM_PAD THRM_PAD GND THRM_PAD
157
9 50_PRX_MB1_PAD_MB_A_WTR_IN_E 36 PRX_MB1
R1202_E 1.4NH+/-0.1NH-1.1A THRM_PAD THRM_PAD 351 70 GND THRM_PAD
158
62 50_PAD_ANT_HB_E 1
0 2 50_PAD_ANT_HB_MATCH_E 1 2 50_PAD_ANT_HB_CPL2_IN_E
254 THRM_PAD THRM_PAD 352 71 GND THRM_PAD
ANT 17 255 353 72 159
THRM_PAD THRM_PAD GND THRM_PAD
B 5%
1/20W
0201
OMIT_TABLE 256 THRM_PAD THRM_PAD 354 73 GND THRM_PAD 160 B
9 50_PRX_MB2_PAD_MB_B_WTR_IN_E 38 PRX_MB2
MF
201 1 C1209_E 257 THRM_PAD THRM_PAD 355 74 GND THRM_PAD 161
0.8PF 258 THRM_PAD THRM_PAD 356 75 GND THRM_PAD 162
+/-0.05PF
2 25V 259 THRM_PAD THRM_PAD 357 76 GND THRM_PAD 163
C0G
0201 260 THRM_PAD THRM_PAD 358 77 GND THRM_PAD 164
32 PRX_HB1 OMIT_TABLE 261 359 78 165
9 50_PRX_HB1_PAD_LHB_WTR_IN_E THRM_PAD THRM_PAD GND THRM_PAD
262 THRM_PAD THRM_PAD 360 79 GND THRM_PAD 166
263 THRM_PAD THRM_PAD 361 80 GND THRM_PAD 167
264 THRM_PAD THRM_PAD 362 81 GND THRM_PAD 168
9 50_PRX_HB2_PAD_HB_A_WTR_IN_E 34 PRX_HB2 265 THRM_PAD THRM_PAD 363 82 GND THRM_PAD 169
266 THRM_PAD THRM_PAD 364 83 GND THRM_PAD 170
267 THRM_PAD THRM_PAD 365 84 GND THRM_PAD 171
268 THRM_PAD THRM_PAD 366 85 GND THRM_PAD 172
269 THRM_PAD THRM_PAD 367 86 GND THRM_PAD 173
270 THRM_PAD THRM_PAD 368 87 GND THRM_PAD 174
271 THRM_PAD THRM_PAD 369 88 GND THRM_PAD 175
TABLE_5_HEAD 272 THRM_PAD THRM_PAD 370 89 GND THRM_PAD 176
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION 273 THRM_PAD THRM_PAD 371 90 GND THRM_PAD 177
274 372 91 178
TABLE_5_ITEM
152S2023 1 3.2NH UHQ, 2G HB PAD MATCH R1209_E CRITICAL JPN THRM_PAD THRM_PAD GND THRM_PAD
TABLE_5_ITEM 275 THRM_PAD THRM_PAD 373 92 GND THRM_PAD 179
152S00153 1 1NH UHQ, 2G HB PAD MATCH R1211_E CRITICAL JPN 276 374 93 180
THRM_PAD THRM_PAD GND THRM_PAD
277 375 94 181
TABLE_5_ITEM
131S0425 1 0.5PF, HB ANT MATCH C1209_E CRITICAL JPN THRM_PAD THRM_PAD GND THRM_PAD
TABLE_5_ITEM 278 THRM_PAD THRM_PAD 376 95 GND THRM_PAD 182
152S2042 1 1.8NH UHQ, HB ANT MATCH R1210_E CRITICAL JPN 279 377 96 183
THRM_PAD THRM_PAD GND THRM_PAD
280 THRM_PAD THRM_PAD 378 97 GND THRM_PAD 184
281 379 98 185
A 282
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD 380 99
GND
GND
THRM_PAD
THRM_PAD 186 A
283 381 100 187
TABLE_5_HEAD
PAGE TITLE
HB PAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION THRM_PAD THRM_PAD GND THRM_PAD
TABLE_5_ITEM 284 THRM_PAD THRM_PAD 382 101 GND THRM_PAD 188
131S0329 1 0.4PF, HB ANT MATCH C1209_E CRITICAL ROW 285 383 102 189
THRM_PAD THRM_PAD GND THRM_PAD DRAWING NUMBER SIZE
286 384 103 190 051-02159 D
TABLE_5_ITEM
152S2000 1 2.0NH UHQ, HB ANT MATCH R1210_E CRITICAL ROW THRM_PAD THRM_PAD GND THRM_PAD
287 THRM_PAD THRM_PAD 385 104 GND THRM_PAD 191 Apple Inc. REVISION
288 THRM_PAD THRM_PAD 386 105 GND THRM_PAD 192 10.0.0
289 THRM_PAD THRM_PAD 387 106 GND THRM_PAD 193 NOTICE OF PROPRIETARY PROPERTY: BRANCH
290 THRM_PAD THRM_PAD 388 107 GND THRM_PAD 194 THE INFORMATION CONTAINED HEREIN IS THE
291 PROPRIETARY PROPERTY OF APPLE INC.
THRM_PAD THRM_PAD 389 THE POSESSOR AGREES TO THE FOLLOWING: PAGE
292 THRM_PAD THRM_PAD 390 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
12 OF 22
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 64 OF 81
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST
D
TABLE_5_ITEM
D
132S0316 1 UHB LNA DECOUPLING, 0.1UF C1312_E CRITICAL JPN
PP_VDD_BOOST 3 11 12 17
TABLE_5_ITEM
PP_VCC1_UHB_PA_E
VOLTAGE=4.0V
1 0.00 B1 D7
C1301_E 12 11 7 75_RFFE3_SCLK_E PP_1V8_VDD_LNA_UHB_PAD_E 1 2 PP_1V8_LDO5_E 3 4 5 8 11 12 15 16 20 B3 D8
18PF VOLTAGE=1.8V
C 5%
2 16V
CERM RADIO_UHB_PAD
0%
1/32W
MF
B5
B7
D9
E3
C
01005
NOSTUFF 1 C1305_E
1 C1312_EOMIT_TABLE 01005
B8 E4
0.1UF
18PF 22 12 11 7 75_RFFE3_SDATA_E 20% B9 E5
5% 2 6.3V
2 16V
CERM
X5R-CERM
01005
B10 E6
01005 OMIT_TABLE B11 E7
NOSTUFF C1 E8
VCC2 G10
VCC1 F10
VIO_TX L10
C11 E9
VBATT I10
VDD_LNA B6
SDATA_RX L6
SCLK_RX L5
VIO_RX L4
SDATA_TX L8
SCLK_TX L9
D1 F3
D2 F4
D11 F5
E1 F6
RADIO_UHB_PAD R1305_E E10 F7
R1302_E OMIT_TABLE 2NH+/-0.1NH-0.6A E11 F8
0.00 2
9 50_TX_MLB_2G_WTR_E 1 50_TX_MLB_2G_IN_E D10 TX_MLB_IN PA_UHB_E ANT_MLB1 L2 50_PAD_ANT_MLB1_E 1 2 50_PAD_MLB1_2G_HB_CPL2_IN_E 17
F1 F9
0% SKY78141 0201 F2 GND GND G3
1/32W OMIT_TABLE 1
MF LGA RADIO_UHB_PAD F11 G4
01005 RADIO_UHB_PAD SYM 1 OF 2
G1
OMIT_TABLE G5
1 C1307_E
JPN = STUFF
C1318_E G11 G6
0.5PF 15NH-3%-0.3A-0.7OHM
+/-0.05PF 0201 H1 G7
2 16V
C0G-CERM OMIT_TABLE H2 G8
01005
NOSTUFF 2 H10 G9
H11 H3
RADIO_UHB_PAD I1 H4
R1303_E R1306_E I2 H5
0.00 C10 E2 50_PAD_ANT_UHB1_E 0.00 2 50_TRX_UHB_LAT_DIPLEXER_IN_E 18
I11 H6
9 50_TX_UHB_WTR_E 1 2 50_TX_UHB_IN_E TX_UHB_IN ANT_UHB1 1
B 0%
1/32W
MF
1
1%
1/20W
MF
1
J1
J10
H7
H8 B
01005 RADIO_UHB_PAD 0201 J11
OMIT_TABLE H9
OMIT_TABLE 1 C1308_E L1310_E RADIO_UHB_PAD C1319_E K1 I3
0.5PF 7.5NH+/-0.3%-0.4A 7.5NH+/-0.3%-0.4A
+/-0.05PF 0201 0201 K2 I4
2 16V
C0G-CERM OMIT_TABLE OMIT_TABLE K10 I5
01005
NOSTUFF 2 2 K11 I6
L1 I7
RADIO_UHB_PAD L3 I8
R1307_E L7 I9
G2 0.00 2 L11 J3
ANT_UHB2 50_PAD_ANT_UHB2_E 1 50_UAT_TRX_UHB_MCS 2
1% M1 J4
1/20W M2
MF RADIO_UHB_PAD J5
0201 M3
OMIT_TABLE J6
1 C1320_E M4 J7
0.5PF
+/-0.05PF M5 J8
2 25V
COG-CERM M6 J9
0201
NOSTUFF M7 K3
M8 K4
M9 K5
9 50_PRX_MLB1_DRX_MB_LHB_WTR_IN_E B4 PRX_MLB1 CPL_OUT3 J2 50_UHBCPL_OUT_2G_CPL_IN_E 17
M10 K6
M11 K7
K8
B2 C2 RADIO_2G_PA K9
9 50_PRX_UHB1_PAD_UHB_A_WTR_IN_E PRX_UHB1 NC/GND 50_2G_LB_PA_OUT_E R1309_E
1
0.00 2
50_UHBPAD_2G_LB_PA_OUT_2G_CPL_IN_E 17
A
1%
1
1/20W
MF
0201
1 A
PAGE TITLE
UHB PAD
OMIT_TABLE
L1301_E L1302_E
10NH-5%-250MA 10NH-5%-250MA DRAWING NUMBER SIZE
0201 0201
NOSTUFF NOSTUFF 051-02159 D
RADIO_2G_PA RADIO_2G_PA Apple Inc. REVISION
2 2
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
2G PA - ROW
D D
TABLE_5_HEAD
C C
TABLE_5_ITEM
B B
A A
PAGE TITLE
2G PA
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
LB DSM
D D
VOLTAGE=1.8V FL1501_E
VIO_HB_LB_DSM_FILT_E
PP_1V8_VDD_LNA_LBDSM_E
0.00 PP_1V8_LDO5_E
16 IN 3 4 5 8 11 12 13 16 20
SCLK_HB_LB_DSM_FILT_E
16 IN
0%
SDATA_HB_LB_DSM_FILT_E 1/32W
16 MF
IN 1 C1504_E 01005
150PF
5%
2 25V
C0G
01005
C C
10
7
8
9
SDATA
SCLK
VIO
VDD
DSM_LB_E
SKY13760-19
BGA R1507_E
SYM 1 OF 2
17 50_DRX_LB_IN1_MATCH_E 1
0.00 2 50_UAT_TRX_LB_MCW
DRX_LB_IN_1 2
0% METROCIRC
1 1/32W
MF
01005
L1502_E
22NH-3%-0.14A-2.26OHM
01005
R1501_E R1508_E
50_DRX_LB_OUT_E
1
0.00 2 50_DRX_LB_OUT_MATCH_E 4 15 50_DRX_LB_IN2_MATCH_E 1
0.00 2 50_LAT_DRX_LB_MCW
20 OUT DRX_LB_OUT_1 DRX_LB_IN_2 2
TO DIPLEXER
THEN MLB STRIPLINE 0% 0% METROCIRC
1/32W 1/32W
MF 1 1 MF
01005 NOSTUFF NOSTUFF 01005 DSM_LB_E
SKY13760-19
L1501_E L1503_E BGA
4.7NH-3%-0.270A 4.7NH-3%-0.270A SYM 2 OF 2
01005 01005
1 GND
2 GND
2 2 3 GND
B R1506_E 5 GND B
12PF 6 GND
50_DSM_TRX_LB_IN_LB_E
DRX_LB_IN_3 13 50_DRX_LB_IN3_MATCH_E 1 2 19
11 GND
IN
TO QUADPLEXER 12 GND
5%
1 16V 14 GND
CERM
01005 16 GND
L1504_E 18 GND
20NH-3%-0.14A-2.26OHM 19 GND
01005
20 GND
A A
PAGE TITLE
LB DSM
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
HB DSM
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST
DECOUPLING SHARED WITH LB DSM R1607_E
TABLE_5_HEAD
D
1 C1602_E
47PF
0%
1/32W
MF
D
5% 01005
2 16V
CERM
01005
VOLTAGE=1.8V FL1601_E
1 C1603_E PP_1V8_VDD_LNA_HBDSM_E 1
0.00 2 PP_1V8_LDO5_E
120PF 3 4 5 8 11 12 13 15 20
5% 0%
2 25V
COG 1/32W
01005 MF
1 C1604_E 01005
47PF
R1603_E 5%
50_DRX_HB_OUT1_MBHB_WTR_IN_E 0.00 2 2 16V
CERM
1
16 9 OUT 01005 TABLE_5_HEAD
SDATA 28
SCLK 27
VIO 26
VDD 25
JPN = STUFF TABLE_5_ITEM
DSM_HB_E
SKY13762 R1613_E
BGA 1.0NH-+/-0.1NH-0.9A-0.05OHM
SYM 1 OF 2 50_DRX_HB_IN1_MATCH_E 50_UAT_TRX_MLB_MB_HB_MCW
R1600_E
2 DRX_HB_OUT1 DRX_HB_IN1 21 1 2 2
50_DSM_HB_OUT1_MCU_ROW_E
1
0.00 2 01005 METROCIRC
16
TO METROCIRC 0%
1/32W
MF
01005
1
NOSTUFF
1 L1608_E
OMIT_TABLE 0.4PF
ROW = STUFF +/-0.05PF
L1603_E 2 16V
C0G
4.7NH-3%-0.270A 01005
C 01005 NOSTUFF C
2
R1611_E
50_DRX_HB_OUT2_MATCH_E 50_DRX_HB_IN2_MATCH_E 0.00 2 50_LAT_DRX_MLB_MB_HB_MCW
4 DRX_HB_OUT2 DRX_HB_IN2 23 1 2 DSM_HB_E
0%
1/32W
METROCIRC SKY13762
1 MF BGA
NOSTUFF 01005 1
SYM 2 OF 2
3
L1605_E 5
4.7NH-3%-0.270A
01005 7
8
2 9
10
11
R1601_E R1615_E GND
50_DRX_HB_OUT2_UHB_LTEU_A_WTR_IN_E 0.00 2 50_DRX_HB_IN3_MATCH_E 0.00 2 50_DSM_HB_IN_TRX_MBHB_E 12
9 OUT
1 6 DRX_HB_OUT3 DRX_HB_IN3 20 1 IN 19
14
STRIPLINE
0% 0% TO QUADPLEXER
1/32W 1/32W 15
MF 1 MF
01005 NOSTUFF 01005 17
1
NOSTUFF 18
L1607_E 19
L1601_E 4.7NH-3%-0.270A
01005 22
4.7NH-3%-0.270A
01005 24
2
2
B B
R1612_E
50_DRX_UHB_IN2_MATCH_E 0.00 2 50_UAT_TRX_UHB_MCW
DRX_UHB_IN2 13 1 2
0% METROCIRC
OMIT_TABLE 1/32W
MF
R1602_E 01005 1
50_DRX_HB_OUT1_MBHB_WTR_IN_E 0.00 2 1 L1606_E OMIT_TABLE R1617_E
16 9 OUT
1 50_DRX_HB_OUT3_MATCH_E 0.8PF JPN = STUFF 0.00
STRIPLINE +/-0.05PF 0%
0% 1/32W
1/32W 2 16V
C0G-CERM MF
MF 01005 01005
01005 2OMIT_TABLE
OMIT_TABLE 1 ROW = STUFF
ROW = STUFF NOSTUFF
50_DSM_HB_OUT1_MCU_ROW_E 16
2 0% TO UAT4 ANTENNA
1/32W
MF
01005
A 1 A
NOSTUFF PAGE TITLE
L1604_E
4.7NH-3%-0.270A
HB DSM
DRAWING NUMBER SIZE
01005
051-02159 D
Apple Inc. REVISION
2
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
COUPLER2 PART#
118S0724
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST
QTY
1
DESCRIPTION
0201 0R
REFERENCE DESIGNATOR(S)
R1810_E
CRITICAL
CRITICAL
BOM OPTION
ROW
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
PART#
118S0724
QTY
1
DESCRIPTION
0201 0R
REFERENCE DESIGNATOR(S)
R1809_E
CRITICAL
CRITICAL
BOM OPTION
JPN
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
131S00142 1 150PF, DC BLOCK FOR GSM R1813_E CRITICAL ROW 152S2007 1 8.2NH 2G LB MATCH R1812_E CRITICAL JPN
PP_1V8_LDO6_E 1
0.00 2 PP_1V8_VIO_TX_CPL2_E
13 12 11 3
TABLE_5_ITEM TABLE_5_ITEM
131S00001 1 0.1PF, CPLR HB LAT MATCH L1801_E CRITICAL ROW 152S00055 1 2.6NH, CPLR HB LAT MATCH R1807_E CRITICAL JPN
0%
1/32W
1 C1803_E
TABLE_5_ITEM TABLE_5_ITEM
MF 152S2044 1 2.2NH, CPLR HB LAT MATCH R1807_E CRITICAL ROW 131S0249 1 2.2PF, 2G LB MATCH C1810_E CRITICAL JPN
01005
180PF
D 10%
2 10V
D
CERM
01005
7 75_RFFE5_SCLK_E
PP_VDD_BOOST 3 11 12 13
RFFE_DAT 2
RFFE_CLK 1
VIO 3
VDD 7
50_CPL2_DRX_LB_E 1 50_LAT_DRX_LB_MCS 2
1% METROCIRC
DRX_LB_OUT 6 1/20W
MF
0201
1 C1809_E
1.3PF
+/-0.25PF
2 25V
11 50_PAD_ANT_LB_CPL2_IN_E 20 TRX_LB_IN CPL2_E COG-CERM
201
SKY13770
LGA NOSTUFF
SYM 1 OF 2 R1803_E RADIO_CPL2
C 13 50_UHBPAD_2G_LB_PA_OUT_2G_CPL_IN_E 2.2NH+/-0.1NH-0.6A C
TRX_LB_UAT 11 50_CPL2_TRX_LB_E 1 2 50_UAT_TRX_LB_MCS 2
1RADIO_CPL2 0201-1 METROCIRC
R1813_E
0.00
1%
1 C1808_E CPL2_E
1/20W
1.3PF SKY13770
MF CPL2G_E +/-0.25PF LGA
RADIO_CPL2
0201
2OMIT_TABLE WIFI RADIO_CPL2 2 25V
COG-CERM 4 SYM 2 OF 2
R1812_E LDJ0Q869M30CG015 R1815_E 201 GND
0.00 LGA 0.00 5 GND
50_LBPAD_2G_OUT_2G_CPL_IN_JPN_E 1 2 50_2G_CPL_IN_E 2 IN MAIN_OUT 150_2G_CPL_OUT_E 1 2 50_2G_LB_PA_OUT_CPL2_IN_E 19 TX_2GLB NOSTUFF
11
8 GND
1% 1% RADIO_CPL2 10
1/20W
3 4
1/20W GND
50_UHBCPL_OUT_2G_CPL_IN_E
13 MF
0201
COUPLED_OUT TERMINATE MF
0201 1 C1810_E R1806_E 12 GND
OMIT_TABLE 1.0PF 68PF 13 GND
+/-0.1PF
2 16V TRX_LB_LAT 18 50_TRX_LB_LAT_E 1 2 50_TRX_LB_LAT_DIPLEXER_IN_E 18
14 GND
NP0-C0G
01005 15 GND
OMIT_TABLE 5% 1
50V 16 GND
17 50_2G_CPL_OUT_CPL2_IN_E C0G
0201 17
L1802_E 21
GND
GND
150NH-5%-0.08A
0201 22 GND
RADIO_CPL2 24
32 TRX_HB_IN GND
12 50_PAD_ANT_HB_CPL2_IN_E
2 25 GND
RADIO_CPL2 26 GND
R1807_E 28 GND
1.0NH-+/-0.05NH-1.1A-0.04OHM 29 GND
TRX_HB_LAT 23 50_TRX_HB_LAT_E 1 2 50_TRX_HB_LAT_DIPLEXER_IN_E 18
34 GND
0201 36 GND
1 OMIT_TABLE
B L1801_E B
15NH-3%-0.3A-0.7OHM
12 50_2G_HB_PA_OUT_CPL2_IN_E 0201
OMIT_TABLE
RADIO_CPL2 31
1 TX_2GHB
R1810_E 2
0.00
1% RADIO_CLP2
1/20W
MF
0201
R1802_E
2OMIT_TABLE 0.00 2
TRX_HB_UAT 30 50_CPL2_TRX_HB_E 1 50_UAT_TRX_MLB_MB_HB_MCS 2
1.3PF
50_2G_CPL_OUT_CPL2_IN_E 27 RF_CPL3_IN +/-0.25PF
2 25V
17
COG-CERM
A 201
A
NOSTUFF
9
PAGE TITLE
RADIO_CPL2
COUPLER2
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
50_CPL2_CPLOUT_E
9
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
LOWER ANTENNA CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST
D D
50_TRX_LB_LAT_DIPLEXER_IN_E
17
OMIT_TABLE
FLTRI_E R1903_E
TRIPLEXER-LB-MB-HB 0.8NH-+/-0.05NH-1.1A-0.04OHM
LFD2H829MMZ4E518
5 LGA 50_LHB_LAT1_MATCH_E 50_LHB_LAT1
LB ANT 7 1 2 2
50_TRX_HB_LAT_DIPLEXER_IN_E 0201
17
3 MLB-MB-HB OMIT_TABLE 1
1 UHB
GND
1 L1901_E C1901_E
0.3PF
+/-0.05PF 18NH+/-3%-0.250A
2 25V 0201
2
4
6
8
9
C0G-CERM
0201 RADIO_CPL2
RADIO_CPL2 NOSTUFF
OMIT_TABLE 2
50_TRX_UHB_LAT_DIPLEXER_IN_E
C 13
C
TABLE_5_HEAD
B B
A A
PAGE TITLE
LOWER ANTENNA
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
UAT & LB/UHB DIPLEXER CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST
D D
50_DSM_TRX_LB_IN_LB_E
15 OUT
NOSTUFF
1 C2002_E
18PF
2%
2 16V
CERM
01005
50_DSM_HB_IN_TRX_MBHB_E
16 OUT
L2011_E
18NH-3%-0.16A-1.63OHM
01005
NOSTUFF
2
3
4
6
7
8
10
11
12
14
16
17
CERM
01005
50_GNSS_QPLEX_E
20 OUT
B B
50_DSM_HB_IN_TRX_UHB
16 2 OUT
A A
PAGE TITLE
UPPER ANTENNA
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
4
VCC
LNA_GPS_E
R2102_E SKY65790-11 R2103_E
50_GNSS_DPLX_MATCH_E 1
0.00 2 50_GNSS_OUT_MATCH_E 5 RFOUT LGA 7
50_GNSS_IN_MATCH_E
1
0.00 2 50_GNSS_QPLEX_E
RFIN IN 19
0% 0%
1/32W LNA_EN 3 1/32W
PLACE AT WTR END MF MF NOSTUFF
01005 01005
1 GND
L2108_E 1 C2102_E
12NH-3%-140MA 18PF
9
8
6
2
1
50_GNSS_WTR_IN_E 50_GNSS_DPLX_MCH_WTR_E L2102_E 2%
8
1 2
1.0NH+/-0.1NH-0.580A 2 16V
CERM
01005
01005
C
01005-1
C 1
NOSTUFF
1 C2107_E L2106_E
1.0NH+/-0.1NH-0.580A
+/-0.1PF 01005
2 16V
NP0-C0G NOSTUFF
01005 BB_GNSS_LNA_EN_E 7 22
FL2102_E FL2101_E
IN
2.2PF 2
DIPLEXER-LB-GNSS R2101_E DIPLEXER-LB-GNSS-MIR
4 GNSS LGA 0.00 2 50_DRX_LB_GNSS_DPLX_MATCH_E LGA GNSS 6
COMMON 2 50_DRX_LB_GNSS_DPLX_E 1 2 COMMON
6 LB LB 4
50_DRX_LB_WTR_IN_E
R2105_E
0.00 2 50_DRX_LB_DPLX_MCH_WTR_E
1 STRIPLINE 0%
1/32W
MF
9 1 GND 01005 GND
1
0%
1/32W
L2104_E 50_DRX_LB_OUT_E
IN 15
1.0NH+/-0.1NH-0.580A
1
3
5
5
3
1
MF
01005 01005
L2101_E
1 NOSTUFF 1.0NH+/-0.1NH-0.580A
01005 1
L2105_E 2 NOSTUFF
1.0NH+/-0.1NH-0.580A
01005 2 L2103_E
NOSTUFF 1.0NH+/-0.1NH-0.580A
01005
NOSTUFF
2
2
B B
A A
PAGE TITLE
GNSS
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 72 OF 81
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SIM CARD: CONNECTOR CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE ONLY - NOT A CHANGE REQUEST
TABLE_ALT_HEAD
D
512S00026 512S00017 BOM_TABLE_ALTS J204_E SIMCRD,KYOCERA
D
21 5 3 PP_UIM1_LDO11_E
10 8 7 6 5 4 3 PP_1V8_LDO6_E
RADIO_SIMCARD
1
R201_E
15.00K 1
1% R202_E
1/32W 470K
MF 1%
2 01005 1/32W
MF
2 01005
RADIO_BB
21 7 BB_SIM1_DETECT_E
9 SIM_DETECT_GND SIM_DETECT 8 RADIO_SIMCARD
1 VCC
GND
DEBUG CONNECTOR
RADIO_SIMCARD PP_UIM1_LDO11_E 3 5 21 5
10
11
12
13
14
15
16
1 C203_E
2.2UF
20% 1 DZ202_E
2 6.3V
X5R-CERM
0201
12V-33PF
01005
2 RADIO_SIMCARD
SIM CARD MLB 516S1185
FLEX 516S1184
J_DEBUG_E
20-5857-036-001-829
DZ201_E C
C ESDZV5-4BF4 41
F-ST-SM
BB_SIM1_DETECT_E SM 10 3 2 PP_VDD_MAIN 37 38
7 21
BB_SIM1_DATA_E
21 7
1 4 NFC_SWP 2 21
IO
2 PMU_TO_BB_USB_VBUS_DETECT 1 2 90_USB_BB_DATA_P
GND
4 2 2 6
DZ203_E BB_SIM1_RST_E 2 3
BB_SIM1_CLK_E
3 4 90_USB_BB_DATA_N
5.5V-6.2PF 21 7 7 21 2 6
0201 5 6 PP_UIM1_LDO11_E 3 5 21
7 8 BB_SIM1_RST_E IN 7 21
1
5
9 10 BB_SIM1_CLK_E IN 7 21
11 12 BB_SIM1_DATA_E BI 7 21
13 14 NFC_SWP 2 21
15 16 BB_SIM1_DETECT_E OUT 7 21
4 2 AP_TO_BB_RESET_L 17 18
6 BB_JTAG_TCK_E 19 20
6 BB_JTAG_TMS_E 21 22
SELECT 23 24
25 26
27 28
29 30 BB_JTAG_RST_L_E OUT 6
3 2 PP_VDD_BOOST 31 32 UART_BB_TO_WLAN_COEX 2 7
33 34 UART_WLAN_TO_BB_COEX 2 7
35 36
39 40
42
NOSTUFF
B B
A A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
PP54_E
1
PP
P2MM-NSM
SM
QLINK_UL0_P_E 7 8
D
PCIE
PP 2 4 1 QLINK_UL0_N_E 7 8
PP
PP34_E
P2MM-NSM
SM PP55_E
1 50_MDM_19P2M_CLK_E 4 6
P2MM-NSM
PP SM
1 QLINK_CLK_P_E
LAYOUT: VIA STUB AT BB PINS PP 7 8
PP56_E
PP1_E
P2MM-NSM
P2MM-NSM
SM
SM 1 QLINK_CLK_N_E
1 90_PCIE_AP_TO_BB_REFCLK_P PP 7 8
PP36_E
PP 2 6
PP2_E
P2MM-NSM PP18_E
P2MM-NSM
SM
P2MM-NSM PP47_E
SM P2MM-NSM
1 50_SLEEP_CLK_32K_E SM
PP 4 6 1 QLINK_DL0_P_E 7 8
PP
PP48_E
P2MM-NSM
SM
1 QLINK_DL0_N_E 7 8
PP
PP49_E
P2MM-NSM
SM
1 QLINK_DL1_P_E
PP20_E PP 7 8
P2MM-NSM PP50_E
P2MM-NSM
SM SM
1 BB_TO_AP_RESET_DETECT_L
I2S
PP 2 7 1 QLINK_DL1_N_E 7 8
PP
PP51_E
P2MM-NSM
SM
1 QLINK_DL2_P_E 7 8
PP
C PP25_E
PP52_E
P2MM-NSM
SM
C
P2MM-NSM 1 QLINK_DL2_N_E 7 8
SM PP
1 I2S_BB_TO_AP_LRCLK 2 7
PP
PP26_E
P2MM-NSM
RFFE
SM
1 I2S_BB_TO_AP_BCLK 2 7
PP
PP27_E
P2MM-NSM
SM
1 I2S_AP_TO_BB_DOUT 2 7
PP
PP28_E
P2MM-NSM
SM
1 I2S_BB_TO_AP_DIN 2 7
PP
PP40_E
P2MM-NSM
SM
1 75_RFFE3_SDATA_E 7 11 12 13
PP
PP41_E
P2MM-NSM
SM
1 75_RFFE6_SDATA_E
OTHERS
PP 7 10 11 12 13
CTRL
B PP21_E PP23_E B
P2MM-NSM P2MM-NSM
SM DISPLAY_TO_MANY_BSYNC SM
1 2 4 1 BB_GNSS_LNA_EN_E 7 20
PP PP
PP22_E
P2MM-NSM PP29_E
SM P2MM-NSM
1 AP_TO_BB_COREDUMP SM
PP 2 7 1 AP_TO_BB_TIME_MARK 2 7
PP
PP35_E
P2MM-NSM
SM
1
PP30_E
P2MM-NSM
AP_TO_BB_MESA_ON
SPMI
2 7 SM
PP
1 BB_TO_STROBE_DRIVER_GSM_BURST_IND
2 7
PP
UART PP57_E
P2MM-NSM
SM
PP58_E
1
PP
P2MM-NSM
SM
SPMI_CLK_E 4 6
PP31_E
P2MM-NSM
1
PP
SPMI_DATA_E 4 6
SM
1 UART_BB_TO_AOP_RXD 2 7
PP
PP24_E
A
P2MM-NSM
SM
PP
1 UART_AOP_TO_BB_TXD 2 7 SYNC_MASTER=PROBE POINTS SYNC_DATE=07/18/2016 A
PAGE TITLE
TEST POINTS
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D21 RADIO_MLB_FF
5/22/2017
D D
76 50 IO
50_UAT_TRX_UHB_MCS
76 50 IO
50_UAT_TRX_LB_MCS
76 50 IO
50_UAT_TRX_MLB_MB_HB_MCS
76 50 IN
50_LAT_DRX_MLB_MB_HB_MCS
76 50 IN
50_LAT_DRX_LB_MCS
76 50 50_UAT_TRX_UHB_MCW
C C
IO
76 50 IO
50_UAT_TRX_MLB_MB_HB_MCW
76 50 IO
50_UAT_TRX_LB_MCW
76 50 OUT 50_LAT_DRX_MLB_MB_HB_MCW
76 50 OUT 50_LAT_DRX_LB_MCW
76 50 IO
50_LHB_LAT1
76 50 IO
50_LMHGW_UAT1
76 50 IO
50_DSM_HB_IN_TRX_UHB
76 50 IO
50_LAT_WLAN_NORTH
76 50 IO
50_LAT_WLAN_SOUTH
76 50 IO
50_UAT_WLAN_5G_EAST
76 50 IO
50_UAT_WLAN_2G_EAST
76 50 IO
50_UAT_WLAN_2G_WEST
76 50 IO
50_LAT_WLAN_MLC
78 50 IN LAT_TUNER_RFFE1_CLK
LAT_TUNER_RFFE1_DATA
B B
78 50 IO
78 77 50 IN UAT_TUNER_RFFE_CLK
78 77 50 IO UAT_TUNER_RFFE_DATA
77 50 IO PP1V8_S2
77 50 IO PP3V0_S2
78 50 IN
PP1V8_S2
78 50 OUT BB_TO_LAT_GPO1
78 50 OUT BB_TO_LAT_GPO2
78 50 OUT BB_TO_LAT_GPO3
78 50 OUT BB_TO_LAT_GPO4
A FRONT PAGE A
DRAWING TITLE
SCH,MLB,D21
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
METROCIRC
D NORTH-SOUTH METROCIRC EAST-WEST METROCIRC D
339S00297 339S00296
EAST MLB WEST MLB
MCEW_EF
FLTPSSL-515H
12 SM 17
76 50_LAT_DRX_MLB_MB_HB_MCE_EF SIGNAL1-E SIGNAL1-W 50_LAT_DRX_MLB_MB_HB_MCW 50 75
50_UAT_WLAN_2G_EAST 6 19 50_UAT_WLAN_2G_WEST
UPPER MLB LOWER MLB
75 50 SIGNAL2-E SIGNAL2-W 50 75
14 21
MCNS_EF 76 50_UAT_TRX_LB_MCE_EF
8
SIGNAL3-E SIGNAL3-W
23
50_UAT_TRX_LB_MCW 50 75
75 50 50_DSM_HB_IN_TRX_UHB
L7753_EF
1.0NH+/-0.1NH-0.22A-0.9OHM
01005
UAT
NOSTUFF JUAT2_EF
2 FL2002_EFOMIT_TABLE MM8830-2600B
DPX255850DT-5156C1SJ
CHANGE TO 0.4NH
F-RT-SM
LGA
R7752_EF
1 LBP 0
3 HBP COMMP 6 50_UHB_W5G_UAT2_EF 1 2 50_UHB_W5G_UAT2_TEST_EF 1 2 50_UAT2_M_EF 77
C R
5%
L7751_EF 1/20W
B 50_UAT_WLAN_5G_WEST_EF
0.00 50_W5G_DPX_IN_EF
GND
1 C7753_EF MF
201
UAT
1 C7754_EF GND B
0.5PF 0.5PF
2
4
5
7
8
9
76
0% +/-0.05PF +/-0.05PF
3
1/32W 2 25V 25V
LAT MLC
1 COG-CERM 2 COG-CERM
MF 0201 0201
01005
OMIT_TABLE 1 UAT UAT
L7750_EF NOSTUFF NOSTUFF
1.0NH+/-0.1NH-0.22A-0.9OHM
01005
L7752_EF
UAT 1.0NH+/-0.1NH-0.22A-0.9OHM
NOSTUFF 01005
UAT
JLAT_EF 2 NOSTUFF
MM3929-2700A05 2
M-ST-SM
1 50_LAT_WLAN_MLC
50 75
2 TABLE_5_HEAD
LB/MLB/MB/HB
4
TABLE_5_ITEM
TABLE_5_ITEM
JUAT1_EF
MM8830-2600B
A R7751_EF
F-RT-SM
A
1.3NH+/-0.1NH-1.1A R7753_EF PAGE TITLE
75 50 50_LMHGW_UAT1 1 2 50_LMHGW_UAT1_MATCH_EF 1
0 2 50_LMHGW_UAT1_TEST_EF 1 2 50_UAT1_TUNER_EF 77
METROCIRC
C R DRAWING NUMBER SIZE
0201
C7752_EF
5%
1/20W
C7751_EF 051-02159 D
1
0.5PF
MF
201
1
0.5PF GND
Apple Inc. REVISION
+/-0.05PF
2 25V
UAT +/-0.05PF
2 25V
10.0.0
3
FL6701_EF FL6702_EF
UAT_TUNER_RFFE_DATA 1
0.00 2 UAT_TUNER_RFFE4_DATA_FILT_EF
TUNFX_EF UAT_TUNER_RFFE4_CLK_FILT_EF 1
0.00 2 UAT_TUNER_RFFE_CLK
78 75 50
505066-0620 50 75 78
0% F-ST-SM 0%
1/32W 1/32W
MF 1 C6702_EF 8 7 1 C6703_EF MF
01005 01005
27PF 27PF
D
5%
2 16V
NP0-C0G
2 1
5%
2 16V
NP0-C0G D
01005 4 3 01005
FL6700_EF UAT 6 5 UAT FL6703_EF
150OHM-25%-200MA-0.7DCR 150OHM-25%-200MA-0.7DCR
75 50 PP1V8_S2 1 2 VDD_TUNER_RFFE_VIO_1V8_FILT_EF PP3V0_TRISTAR_UAT_TUNER_B2B_FILT_EF 1 2PP3V0_S2 50 75 77
10 9 VOLTAGE=3.0V
01005 01005
UAT
1 C6701_EF 1 C6705_EF
27PF 27PF
5% 5%
UAT TUNER
USPST_VDD_EF 1 2 PP3V0_S2 50 75 77
0201 VOLTAGE=3.0V
1 C8001_EF 1 C8006_EF
1.0UF 33PF
20% 5%
2 10V
X5R-CERM 2 16V
NP0-C0G-CERM
L8002_EF 0201-1 01005
120NH-5%-40MA
78 UAT_TUNER_GPO1_EF 1 2 UAT_TUNER_GPO_FIL1_EF
0201
4
L6750_EF 1 C8005_EF VDD
33PF
270NH-3%-0.060A-15OHM 5% SP2T1_EF
C USP2T2_VDD_EF 1 2 PP3V0_S2
VOLTAGE=3.0V
50 75 77
2 16V
NP0-C0G-CERM
01005
QM18147
WLCSP
C
1
0201 L8001_EF
1 C6750_EF 120NH-5%-40MA 2
C6751_EF 33PF CB1
1.0UF 5% UAT_TUNER_GPO2_EF 1 2 UAT_TUNER_GPO_FIL2_EF 3 CB2
L6751_EF 20% 2 16V
NP0-C0G-CERM
78
0201
2 10V
X5R-CERM 01005 1
120NH-5%-40MA 0201-1 1 C8002_EF
RF1
5 RF2 NC 6
78 UAT_TUNER_GPO3_EF 1 2 UAT_TUNER_GPO_FIL3_EF 33PF NC
5%
0201 2 16V GND
NP0-C0G-CERM
4
1 C6752_EF 01005
VDD
8
7
33PF USPST_RF1_EF USPST_RF2_EF
5% SP2T2_EF
2 16V
NP0-C0G-CERM QM18147
01005 WLCSP
L6752_EF
120NH-5%-40MA 2 CB1 1 1
USP2T2_RF2_EF
ALT_GND_RF1_EF ALT_GND_RF2_EF
1 C8003_EF 1 C8004_EF
1
USP2T2_RF1_EF 18PF 18PF
2% 2%
L6753_EF 2 25V
C0H-CERM
0201
2 25V
C0H-CERM
0201 AGND_EF
5.1NH-+/-0.2NH-0.47A-0.12OHM STDOFF-2.2OD0.25H-0.50-1.70
B 03015
ALT_GND_RF_EF 1
B
2 1
USP2T2_RF2_NOTCH_EF
L8005_EF
5.6NH-+/-0.2NH-0.47A-0.12OHM
03015
OMIT_TABLE
1 C6755_EF 1 C6754_EF
1.2PF 18PF
5G WIFI
+/-0.05PF 2% 2
2 25V
C0G-CERM 2 25V
C0H-CERM
0201 0201
STANDOFF
CHASSIS_GND_EF 77
LB/MLB/GNSS/MB/HB SUAT2_EF
STANDOFF 76 50_UAT2_M_EF
C7731_EF
1
0.00 2
50_UAT2_FEED_EF
STDOFF-2.56OD1.4ID0.99H-SM
1
1%
L6701_EF C6738_EF SUAT1_EF 1 C7730_EF 1/20W
MF 1
1.6NH-+/-0.2NH-0.7A-0.06OHM 18PF STDOFF-2.56OD1.4ID0.99H-SM 1.0PF 0201 NOSTUFF
UP_RFFE
+/-0.05PF UP_RFFE
76 50_UAT1_TUNER_EF 1 2 50_UAT1_NOTCH_EF 1 2 50_UAT1_FEED_EF 1 25V
2 C0G-CERM
BI
03015 0201 L7709_EF
2% UP_RFFE 1.5NH+/-0.1NH-1.0A
1 25V UP_RFFE NOSTUFF 0201
C0H-CERM UP_RFFE
0201
1 C6736_EF
1.0PF
L6702_EF UP_RFFE
2
+/-0.05PF 12NH-3%-0.31A-0.28OHM
2 25V
C0G-CERM
03015 1 C6737_EF VOLTAGE=0V
0201 0.6PF
UP_RFFE +/-0.05PF
A NOSTUFF
NO_XNET_CONNECTION
2 2 25V
CERM
0201
A
PAGE TITLE
GROUND RING
1 C6734_EF 1 C6735_EF 1 C6730_EF 1 C6731_EF 1 C6732_EF 1 C6733_EF
UP_RFFE
10.0.0
100PF 18PF 220PF 56PF 4.0PF 220PF NOTICE OF PROPRIETARY PROPERTY: BRANCH
5% 5% 5% 5% +/-0.1PF 5% THE INFORMATION CONTAINED HEREIN IS THE
16V
2 NP0-C0G 2 16V
CERM 2 6.3V
CERM 2 16V
NP0-C0G 2 16V
NP0-C0G 2 6.3V
CERM PROPRIETARY PROPERTY OF APPLE INC.
01005 01005 01005 01005 01005 01005 THE POSESSOR AGREES TO THE FOLLOWING: PAGE
D D
FL6901_EF
10-OHM-1.1A
78 75 50 PP1V8_S2 1 2 PP1V8_GPOUAT_EF
01005
1 C6910_EF1 C6911_EF
1UF 33PF
20% 5%
10V
2 X5R 2 16V
NP0-C0G-CERM
0201 01005
GPOUAT_EF
QM18098
WLCSP
R6910_EF A3 VIO GPO1 A4 UAT_TUNER_GPO1_EF 77
0.00 2 B1
77 75 50 UAT_TUNER_RFFE_CLK 1 GPOUAT_RFFE4_CLK_FILT_EF A1 GPO2 UAT_TUNER_GPO2_EF 77
NOSTUFF SCLK B2
0% GPO3 UAT_TUNER_GPO3_EF 77
1/32W
MF
01005
1 C6912_EF A2 SDATA GPO4 B4 UAT_TUNER_GPO4_EF 77
33PF GND
5%
2 16V
C NP0-C0G-CERM
C
B3
01005
R6911_EF
1
0.00 2
77 75 50 UAT_TUNER_RFFE_DATA GPOUAT_RFFE4_DATA_FILT_EF
0% NOSTUFF
1/32W
MF 1 C6913_EF
USID=0X8
01005
33PF
5%
2 16V
NP0-C0G-CERM
01005
FL6902_EF
10-OHM-1.1A
78 75 50 PP1V8_S2 1 2 PP1V8_GPOLAT_EF
01005
1 C6914_EF1 C6915_EF
1UF 33PF
20% 5%
10V
2 X5R 2 16V
NP0-C0G-CERM
0201 01005
B GPOLAT_EF
B
QM18099
R6912_EF WLCSP
0.00 2 A3 A4
75 50 LAT_TUNER_RFFE1_CLK 1 GPOLAT_RFFE1_CLK_FILT_EF VIO GPO1 BB_TO_LAT_GPO1 50 75
MF
01005
1 C6916_EF SCLK
GPO3 B4 BB_TO_LAT_GPO3 50 75
33PF A2 SDATA GPO4 C1 BB_TO_LAT_GPO4 50 75
5%
16V
2 NP0-C0G-CERM GPO5 C2
B2 USID1 NC
01005 GPO6 C4
NC
GPO7 C3
R6913_EF NC
1
0.00 2 GPOLAT_RFFE1_DATA_FILT_EF GND
75 50 LAT_TUNER_RFFE1_DATA
0% NOSTUFF
B3
1/32W
MF
01005
1 C6917_EF
33PF
5%
2 16V
USID=0X8
NP0-C0G-CERM
01005
A A
PAGE TITLE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
3 77 WIFI FRONT-END
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
POWER
80 50 IN
PP_VDD_MAIN
80 50 IN
PP1V8_S2
CLOCKS
80 50 IN
PMU_TO_WLAN_CLK32K
80 50 OUT WLAN_TO_AP_TIME_SYNC
CONTROL C
C 80 50 IN
PMU_TO_WLAN_REG_ON
80 50 IN
PMU_TO_BT_REG_ON
80 50 OUT BT_TO_PMU_HOST_WAKE
80 50 IN
AP_TO_BT_WAKE
WLAN PCIE
80 50 IN
90_PCIE_AP_TO_WLAN_REFCLK_P
80 50 IN
90_PCIE_AP_TO_WLAN_REFCLK_N
80 50 IN
90_PCIE_AP_TO_WLAN_TXD_P
80 50 IN
90_PCIE_AP_TO_WLAN_TXD_N
80 50 OUT 90_PCIE_WLAN_TO_AP_RXD_P
80 50 OUT 90_PCIE_WLAN_TO_AP_RXD_N
80 50 IN
PCIE_AP_TO_WLAN_RESET_L
80 50 IO
PCIE_WLAN_BI_AP_CLKREQ_L
80 50 OUT WLAN_TO_PMU_HOST_WAKE
80 50 IN
AP_TO_WLAN_DEVICE_WAKE
WLAN UART
80 50 OUT UART_WLAN_TO_AP_RXD
80 50 IN
UART_AP_TO_WLAN_TXD
80 50 OUT UART_WLAN_TO_AP_CTS_L
80 50 IN
UART_AP_TO_WLAN_RTS_L
BLUETOOTH UART
B 80 50 IN
80 50 OUT
UART_AP_TO_BT_TXD
UART_BT_TO_AP_RXD
B
80 50 IN
UART_AP_TO_BT_RTS_L
80 50 OUT UART_BT_TO_AP_CTS_L
AOP
80 50 IN
AOP_TO_WLAN_CONTEXT_A
80 50 IN
AOP_TO_WLAN_CONTEXT_B
COEX
80 50 IN
UART_BB_TO_WLAN_COEX
80 50 OUT UART_WLAN_TO_BB_COEX
ANTENNA
81 50 IO
50_UAT_WLAN_2G_EAST
81 50 IO
50_UAT_WLAN_5G_EAST
81 50 IO
50_LAT_WLAN_NORTH
81 50 IO
50_LAT_WLAN_SOUTH
81 50 IO
50_LAT_WLAN_MLC
A SymbolPorts A
DRAWING TITLE
SCH,MLB,D21
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
WIFI/BT
1 97
2 WLAN_W 98
D 4 LBEE5W11KN-040
LGA
99 D
80 79 50 PP1V8_S2 PP_VDD_MAIN 50 79
5 SYM 2 OF 2 100
6 101
1 C7600_W 1 C7601_W 1 C7606_W 1 C7607_W 1 C7608_W 1 C7609_W 7 102
27PF 0.01UF 0.01UF 27PF 10UF 10UF
5% 10% 10% 5% 20% 20% 8 103
2 16V
NP0-C0G 2 6.3V
X5R 2 6.3V
X5R 2 16V
NP0-C0G
10V
2 X5R-CERM 2 10V
X5R-CERM 9 104
01005 01005 01005 01005 0402-0.1MM 0402-0.1MM
WLAN WLAN WLAN WLAN 10 105
VDDIO_1P8V 32
VBAT_VCC 15
VBAT_VCC 16
VBAT_RF_VCC 29
VBAT_RF_VCC 30
11 106
12 107
13 108
80 79 50 PMU_TO_WLAN_CLK32K 122 LPO_IN 14 109
IN
17 110
79 50 UART_BB_TO_WLAN_COEX 127 SECI_IN
IN 18 112
79 50 UART_WLAN_TO_BB_COEX 92 SECI_OUT
OUT 21 113
24 114
PP1V8_S2
80 79 50
WLAN_W BT_DEV_WAKE 129 AP_TO_BT_WAKE IN 50 79 80
27 115
1 PMU_TO_WLAN_REG_ON 86 WL_REG_ON LBEE5W11KN-040 28 116
R7600_W 80 79 50 IN
10K LGA 31 117
5% 85 BT_REG_ON SYM 1 OF 2 33 118
1/32W 80 79 50 IN
PMU_TO_BT_REG_ON
MF 37 34 120
BT_UART_RXD UART_AP_TO_BT_TXD
2 01005
WLAN
IN 50 79 80
PP7603_W PP7613_W
P2MM-NSM OMIT P2MM-NSM OMIT
SM SM
80 79 50 UART_WLAN_TO_AP_RXD 1 80 79 50 90_PCIE_AP_TO_WLAN_REFCLK_N 1
PP PP
80 JTAG_WLAN_TRST_L_W 1
SM
PP 80 JTAG_WLAN_SEL_W 1
SM
PP 80 79 50 UART_AP_TO_BT_RTS_L 1
SM
PP Guinness
DRAWING NUMBER SIZE
PP7608_W
P2MM-NSM OMIT
PP7618_W
P2MM-NSM OMIT
PP7623_W
P2MM-NSM OMIT 051-02159 D
80 79 50 AP_TO_WLAN_DEVICE_WAKE 1
SM
PP 80 79 50 PMU_TO_WLAN_REG_ON 1
SM
PP 80 79 50 UART_BT_TO_AP_CTS_L
SM
1
PP
Apple Inc. REVISION
1
C7700_W 0.2PF
+/-0.1PF W25DI_W
6.2NH-3%-0.22A-1.3OHM 2 16V
NP0-C0G DPX205850DT-9184A1SJ
01005 01005 0805
R7701_W
6 0.00
HI COM 2 50_LAT_WLAN_M_W 1 2 50_LAT_WLAN_NORTH BI 50 79
0%
4 1/32W
2
LO 1 C7703_W MF
01005
GND 0.2PF
+/-0.1PF
2 16V
NP0-C0G
1
3
5
01005
NOSTUFF
W2BPF_W
AS17
L7700_W LGA C7701_W
2.3NH-+/-0.1NH-0.45A 4.7PF
50_WLAN_2G_SWOUT_BAW_W 1 2 50_WLAN_G_1_BPF_W 1 INPUT OUTPUT 4 50_WLAN_G_1_M_W 50_WLAN_G_1_DPLX_W
2
81
01005
GND 1 +/-0.1PF
16V
NP0-C0G
01005
2
3
5
6
1 L7701_W 4.0NH-+/-0.1NH-0.27A
L7703_W
0.2PF 01005
+/-0.05PF NOSTUFF
2 16V
CERM
C 01005 2 C
80 ANT_SW_3P3_W
1
2GHZ_C0/BT 80
50_WLAN_G_0_W
NP0-C0G
01005 VDD 79 50 BI
50_LAT_WLAN_SOUTH 1 2 50_LAT_WLAN_MLC BI 50 79
W2XSW_W
BI
0%
L7704_W CXA4440GC
50_WLAN_2G_SWOUT_BAW_W 2GHZ LAT 1 C7712_W 1/32W
MF
1 C7713_W
0.3PF GND
+/-0.05PF
2 16V
C0G-CERM
2
6
9
01005
1
R7720_W
100K
5%
1/32W
MF
2 01005
B B
0% 0%
1/32W 1/32W
MF MF
2
01005 01005
2
2
OMIT_TABLE
C7711_W C7709_W
TABLE_5_HEAD
NOSTUFF
117S0161 1 5G CORE0 BPF MATCH R7711_W CRITICAL JPN NOSTUFF
1
TABLE_5_ITEM
1
A SYNC_DATE=11/28/2016 A
PAGE TITLE
$PAGE_TITLE=WiFiANTFeeds
DRAWING NUMBER SIZE
051-02159 D
Apple Inc. REVISION
10.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH