HP 8753E Network Analyzer Service Guide - Agilent Technologies
HP 8753E Network Analyzer Service Guide - Agilent Technologies
HP 8753E Network Analyzer Service Guide - Agilent Technologies
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Errata<br />
Title & Document Type: <strong>8753E</strong> <strong>Network</strong> <strong>Analyzer</strong> <strong>Service</strong> <strong>Guide</strong><br />
Manual Part Number: 08753-90374<br />
Revision Date: February 1999<br />
<strong>HP</strong> References in this Manual<br />
This manual may contain references to <strong>HP</strong> or Hewlett-Packard. Please note that Hewlett-<br />
Packard's former test and measurement, semiconductor products and chemical analysis<br />
businesses are now part of <strong>Agilent</strong> <strong>Technologies</strong>. We have made no changes to this<br />
manual copy. The <strong>HP</strong> XXXX referred to in this document is now the <strong>Agilent</strong> XXXX.<br />
For example, model number <strong>HP</strong>8648A is now model number <strong>Agilent</strong> 8648A.<br />
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or contain dated information, and the scan quality may not be ideal. If we find a better<br />
copy in the future, we will add it to the <strong>Agilent</strong> website.<br />
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<strong>Service</strong> <strong>Guide</strong><br />
<strong>HP</strong> <strong>8753E</strong> <strong>Network</strong> <strong>Analyzer</strong><br />
HEWLETT<br />
PACKARD
<strong>HP</strong> part number: 08753-90374 Supersedes October 1998<br />
Printed in USA February 1999<br />
Notice.<br />
The information contained in this document is subject to change without notice.<br />
Hewlett-Packard makes no warranty of any kind with regard to this material,<br />
including but not limited to, the implied warranties of merchantability and<br />
fitness for a particular purpose. Hewlett-Packard shall not be liable for errors<br />
contained herein or for incidental or consequential damages in connection with<br />
the furnishing, performance, or use of this material.<br />
@Copyright 1998-1999 Hewlett-Packard Company
<strong>Network</strong> <strong>Analyzer</strong> Documentation Set<br />
The Installation and Quick Start<br />
<strong>Guide</strong> familiarizes you with the<br />
network analyzer’s front and rear<br />
panels, electrical and environmental<br />
operating requirements, as well as<br />
procedures for installing, conGguring,<br />
and verifying the operation of the<br />
analyzer.<br />
The User’s <strong>Guide</strong> shows how to make<br />
measurements, explains<br />
commonly-used features, and tells you<br />
how to get the most performance from<br />
your analyzer.<br />
The Quick Reference <strong>Guide</strong> provides<br />
a summary of selected user features.<br />
The <strong>HP</strong>-IB Programm iug and<br />
Command Reference <strong>Guide</strong> provides<br />
programming information for<br />
operation of the network analyzer<br />
under <strong>HP</strong>-IB control.<br />
. . .<br />
III
The BP BASIC Programming<br />
Examples <strong>Guide</strong> provides a tutorial<br />
introduction using BASIC programming<br />
examples to demonstrate the remote<br />
operation of the network analyzer.<br />
The System Veracation and Test<br />
<strong>Guide</strong> provides the system verification<br />
and performance tests and the<br />
Performance Test Record for your<br />
analyzer.
Contents<br />
1. <strong>Service</strong> Equipment and <strong>Analyzer</strong> Options<br />
lhble of <strong>Service</strong> Test Equipment . . . . . . . . . . . . . . . .<br />
Principles of Microwave Connector Care . . . . . . . . . . . .<br />
<strong>Analyzer</strong> Options Available . . . . . . . . . . . . . . . . . . .<br />
Option lD5, High Stability Frequency Reference . . . . . . . .<br />
Option 002, Harmonic Mode . . . . . . . . . . . . . . . . .<br />
OptionOO6,6GHzOperation . . . . . . . . . . . . . . . . .<br />
Option 010, Time Domain . . . . . . . . . . . . . . . . . .<br />
Option 011, Receiver Configuration . . . . . . . . . . . . . .<br />
Option 075,750 Impedance. . . . . . . . . . . . . . . . . .<br />
Option lDT, Delete Display . . . . . . . . . . . . . . . . . .<br />
Option lCM, Rack Mount Flange Kit Without Handles . . . . .<br />
Option lCP, Rack Mount Flange Kit With Handies . . . . . . .<br />
<strong>Service</strong> and Support Options . . . . . . . . . . . . . . . . . .<br />
Option W32 . . . . . . . . . . . . . . . . . . . . . . . . .<br />
Option W34 . . . . . . . . . . . . . . . . . . . . . . . . .<br />
2. System VeriIkation and Performance ‘lksts<br />
System Specifications . . . . . . . . . . . . . . . . . . . . .<br />
Instrument SpecBcations . . . . . . . . . . . . . . . . . . . .<br />
System Verification Procedure . . . . . . . . . . . . . . . . .<br />
Performance Tests . . . . . . . . . . . . . . . . . . . . . . .<br />
How to ConfIrm Performance to System Specifications . . . . .<br />
How to ConfIrm Performance to Instrument Specifications . . .<br />
Certificate of Calibration . . . . . . . . . . . . . . . . . . . .<br />
Sections in This Chapter . . . . . . . . . . . . . . . . . . . .<br />
Performance Test Record . . . . . . . . . . . . . . . . . . . .<br />
System Verification Cycle and Kit Re-certification . . . . . . . .<br />
<strong>HP</strong> <strong>8753E</strong> System Verification . . . . . . . . . . . . . . . . .<br />
Initiaiization . . . . . . . . . . . . . . . . . . . . . . . . .<br />
Measurement Calibration . . . . . . . . . . . . . . . . . . .<br />
Device Verification . . . . . . . . . . . . . . . . . . . . . .<br />
l-l<br />
l-5<br />
l-7<br />
l-7<br />
l-7<br />
l-7<br />
l-7<br />
l-7<br />
l-8<br />
l-8<br />
1-8<br />
l-8<br />
l-9<br />
l-9<br />
l-9<br />
2-l<br />
2-2<br />
2-2<br />
2-3<br />
2-3<br />
2-3<br />
2-4<br />
2-5<br />
2-6<br />
2-7<br />
2-8<br />
2-9<br />
2-11<br />
2-14<br />
contmts-1
Contents-2<br />
In Case of DifficuIty . . . . . . . . . . . . . . . . . . . . .<br />
1. Test Port Output Frequency Range and Accuracy . . . . . . .<br />
In Case of Difficuhy . . . . . . . . . . . . . . . . . . . . .<br />
2. External Source Mode Frequency Range . . . . . . . . . . .<br />
InCaseofDifficulty . . . . . . . . . . . . . . . . . . . . .<br />
3. Test Port Output Power Accuracy . . . . . . . . . . . . . .<br />
InCaseofDifficuIty . . . . . . . . . . . . . . . . . . . . .<br />
4. Test Port Output Power Range and Linearity . . . . . . . . .<br />
In Case of Difficulty . . . . . . . . . . . . . . . . . . . . .<br />
5.MinhnumRChannelLevel. . . . . . . . . . . . . . . . . .<br />
In Case of Difficulty . . . . . . . . . . . . . . . . . . . . .<br />
6. Test Port Input Noise Floor Level . . . . . . . . . . . . . .<br />
Port 1 Noise Floor Level from 300 kHz to 3 GHz (IF BW = 3 kHz)<br />
Port 1 Noise Floor Level from 300 kHz to 3 GHz (IF BW = 10 Hz)<br />
Port 2 Noise Floor Level from 300 kHz to 3 GHz (IF BW = 10 Hz)<br />
Port 2 Noise Floor Level from 300 kHz to 3 GHz (IF BW = 3 kHz)<br />
Port 2 Noise Floor Level from 3 GHz to 6 GHz (IF BW = 3 kHz) .<br />
Port 2 Noise Floor Level from 3 GHz to 6 GHz (IF BW = 10 Hz) .<br />
Port 1 Noise Floor Level for 3 GHz to 6 GHz (IF BW = 10 Hz) . .<br />
Port 1 Noise Floor Level from 3 GHz to 6 GHz (IF BW = 3 kHz) .<br />
InCaseofDifficulty . . . . . . . . . . . . . . . . . . . . .<br />
7. Test Port Input Frequency Response . . . . . . . . . . . . .<br />
Power Meter Calibration for Test Port 1 from 300 kHz to 3 GHz .<br />
Test Port 2 Input Frequency Response from 300 kHz to 3 GHz .<br />
Power Meter Calibration on Port 2 from 300 kHz to 3 GHz . . .<br />
Test Port 1 Input Frequency Response from 300 kHz to 3 GHz .<br />
Power Meter Calibration for Test Port 2 from 3 GHz to 6 GHz . .<br />
Test Port 1 Input Frequency Response from 3 GHz to 6 GHz<br />
Power Meter Calibration on Test Port 1 from 3 GHz to 6 GHz : 1<br />
Test Port 2 Input Frequency Response from 3 GHz to 6 GHz . .<br />
In Case of Difficulty . . . . . . . . . . . . . . . . . . . . .<br />
8. Test Port Crosstalk<br />
CrosstaurtoTestPort2from30d1;H;.tb3GI;z’ 1 1 1 1 1 1 1 1<br />
Crosstalk to Test Port 1 from 300 kHz to 3 GHz . . . . . . . .<br />
CrosstaIktoTestPortlfrom3GHzto6GHz . . . . . . . . .<br />
Crosstalk to Test Port 2 from 3 GHz to 6 GHz . . . . . . . . .<br />
InCaseofDifficuIty . . . . . . . . . . . . . . . . . . . . .<br />
9. Calibration Coefficients . . . . . . . . . . . . . . . . . . .<br />
First FulI 2-Port Calibration . . . . . . . . . . . . . . . . .<br />
Directivity (Forward) Calibration Coefficient . . . . . . . . . .<br />
Source Match (Forward) Calibration Coefficient . . . . . . . .<br />
2-17<br />
2-18<br />
2-20<br />
2-21<br />
2-23<br />
2-24<br />
2-26<br />
2-27<br />
2-29<br />
2-31<br />
2-33<br />
2-37<br />
2-38<br />
2-39<br />
2-39<br />
2-40<br />
2-40<br />
2-41<br />
2-41<br />
2-41<br />
2-42<br />
243<br />
2-44<br />
2-47<br />
2-48<br />
249<br />
2-49<br />
2-51<br />
2-52<br />
2-53<br />
2-53<br />
2-54<br />
2-55<br />
2-55<br />
2-55<br />
2-56<br />
2-56<br />
2-58<br />
2-59<br />
2-61<br />
2-61
Transmission Tracking (Forward) Calibration Coefficient . . . . 2-61<br />
Reflection Tracking (Forward) Calibration Coefficient . . . . . . 2-61<br />
Load Match (Reverse) Calibration Coefficient . . . . . . . . . 2-61<br />
Transmission Tracking (Reverse) Calibration Coefficient . . . . 2-62<br />
Second FuiI 2-Port Calibration . . . . . . . . . . . . . . . . 2-62<br />
Load Match (Forward) Calibration Coefficient . . . . . . . . . 2-64<br />
Directivity (Reverse) Calibration Coefficient . . . . . . . . . . 2-64<br />
Source Match (Reverse) Calibration Coefficient . . . . . . . . . 2-64<br />
Reflection Tracking (Reverse) Calibration Coefficient . . . . . . 2-64<br />
10. System Trace Noise (Only for <strong>Analyzer</strong>s without Option 006) . 2-65<br />
System Trace Noise for A/R Magnitude . . . . . . . . . . . . 2-66<br />
System Trace Noise for A/R Phase . . . . . . . . . . . . . . 2-66<br />
System Trace Noise for B/R Magnitude . . . . . . . . . . . . 2-66<br />
System Trace Noise for B/R Phase . . . . . . . . . . . . . . 2-67<br />
In Case of DifficuIty . . . . . . . . . . . . . . . . . . . . . 2-67<br />
11. System Trace Noise (Only for <strong>Analyzer</strong>s with Option 006) . . 2-68<br />
System Trace Noise for A/R Magnitude from 30 kHz to 3 GHz . . 2-69<br />
System Trace Noise for A/R Magnitude from 3 GHz to 6 GHz . . 2-69<br />
System Trace Noise for A/R Phase from 3 GHz to 6 GHz . . . . 2-69<br />
System Trace Noise for A/R Phase from 30 kHz to 3 GHz . . . . 2-70<br />
System Trace Noise for B/R Magnitude from 30 kHz to 3 GHz . . 2-70<br />
System Trace Noise for B/R Magnitude from 3 GHz to 6 GHz . . 2-70<br />
System Trace Noise for B/R Phase from 3 GHz to 6 GHz . . . . 2-70<br />
System Trace Noise for B/R Phase from 30 kHz to 3 GHz . . . . 2-71<br />
InCaseofDifficuIty . . . . . . . . . . . . . . . . . . . . . 2-71<br />
12. Test Port Input Impedance . . . . . . . . . . . . . . . . . 2-72<br />
In Case of Difficulty . . . . . . . . . . . . . . . . . . . . . 2-76<br />
13. Test Port Receiver Magnitude Dynamic Accuracy . . . . . . . 2-77<br />
Initial CalcuIations . . . . . . . . . . . . . . . . . . . . . . 2-79<br />
Power Meter Calibration . . . . . . . . . . . . . . . . . . . 2-80<br />
Adapter Removal Calibration . . . . . . . . . . . . . . . . . 2-83<br />
Measure Test Port 2 Magnitude Dynamic Accuracy . . . . . . . 2-85<br />
Measure Test Port 1 Magnitude Dynamic Accuracy . . . . . . . 2-87<br />
InCaseofDifficuIty . . . . . . . . . . . . . . . . . . . . . 2-87<br />
14. Test Port Receiver Magnitude Compression . . . . . . . . . 2-89<br />
Test Port 2 Magnitude Compression . . . . . . . . . . . . . . 2-90<br />
Test Port 1 Magnitude Compression . . . . . . . . . . . . . . 2-91<br />
In Case of Difficulty . . . . . . . . . . . . . . . . . . . . . 2-91<br />
15. Test Port Receiver Phase Compression . . . . . . . . . . . . 2-92<br />
Test Port 2 Phase Compression . . . . . . . . . . . . . . . . 2-93<br />
Test Port 1 Phase Compression . . . . . . . . . . . . . . . . 2-94<br />
Contents-3
2a.<br />
2b.<br />
3.<br />
Contents4<br />
In Case of Difficulty . . . . . . . . . . . . . . . . . . . . .<br />
16. Test Port Output/Input Harmonics (Option 002 <strong>Analyzer</strong>s<br />
without Option 006 only) . . . . . . . . . . . . . . . . . .<br />
‘l&t Port Output Worst Case 2nd Harmonic . . . . . . . . . .<br />
Test Port Output Worst Case 3rd Harmonic . . . . . . . . . .<br />
Port 1 Input Worst Case 2ndHarmonic . . . . . . . . . . . .<br />
PortlInputWorstCase3rdHarmonic. . . . . . . . . . . . .<br />
Port2InputWorstCase2ndHarmonic . . . . . . . . . . . .<br />
Port 2 Input Worst Case 3rd Harmonic . . . . . . . . . . . . .<br />
17. Test Port Output/Input Harmonics (Option 002 <strong>Analyzer</strong>s with<br />
Option 006 only) . . . . . . . . . . . . . . . . . . . . . .<br />
Test Port Output Worst Case 2nd Harmonic . . . . . . . . . .<br />
Test Port Output Worst Case 3rd Harmonic . . . . . . . . . .<br />
Port 1 Input Worst Case 2ndHarmonic . . . . . . . . . . . .<br />
PortlInputWorstCase3rdHarmonic. . . . . . . . . . . . .<br />
Port2InputWorstCase2ndHarmonic . . . . . . . . . . . .<br />
Port2InputWorstCase3rdHarmonic. . . . . . . . . . . . .<br />
18. Test Port Output Harmonics (<strong>Analyzer</strong>s without Option 002) .<br />
Procedure . . . . . . . . . . . . . . . . . . . . . . . . . .<br />
Performance ‘lkst Record<br />
For <strong>Analyzer</strong>s with a Frequency Range of 30 kHz to 3 GHz . . . .<br />
Performance ‘l&t Record<br />
For <strong>Analyzer</strong>s with a Frequency Range of 30 kHz to 6 GHz . . . .<br />
Adjustments and Cmmction Constants<br />
Post-Repair Procedures for <strong>HP</strong> <strong>8753E</strong> . . . . . . . . . . . . . .<br />
A9 Switch Positions . . . . . . . . . . . . . . . . . . . . . .<br />
Source Default Correction Constants (Test 44) . . . . . . . . . .<br />
Source Pretune Default Correction Constants (Test 45) . . . . . .<br />
Analog Bus Correction Constants (Test 46) . . . . . . . . . . . .<br />
Source Pretune Correction Constants (Test 48) . . . . . . . . . .<br />
RF Output Power Correction Constants (Test 47) . . . . . . . . .<br />
Power Sensor Calibration Factor Entry . . . . . . . . . . . .<br />
IF Arnphfier Correction Constants (Test 51) . . . . . . . . . . .<br />
ADC Offset Correction Constants (Test 52) . . . . . . . . . . . .<br />
Sampler Magnitude and Phase Correction Constants (Test 53) . . .<br />
Power Sensor Calibration Factor Entry . . . . . . . . . . . .<br />
Determine the Insertion Loss of the Cable at 1 GHz . . . . . .<br />
Sampler Correction Constants Routine . . . . . . . . . . . .<br />
2-94<br />
2-95<br />
2-96<br />
2-97<br />
2-97<br />
2-99<br />
2-99<br />
2-100<br />
2-101<br />
2-102<br />
2-103<br />
2-104<br />
2-105<br />
2-105<br />
2-106<br />
2-107<br />
2-108<br />
2a-1<br />
2b-1<br />
3-2<br />
3-5<br />
3-7<br />
3-8<br />
3-9<br />
3-10<br />
3-11<br />
3-12<br />
3-16<br />
3-17<br />
3-18<br />
3-19<br />
3-20<br />
3-21
Cavity Oscillator Frequency Correction Constants (Test 54) . . . . 3-28<br />
Spur Search Procedure with a Filter . . . . . . . . . . . . . 3-30<br />
Spurs Search Procedure without a Filter . . . . . . . . . . . 3-31<br />
Serial Number Correction Constants (Test 55) . . . . . . . . . . 3-34<br />
Option Numbers Correction Constants (Test 56) . . . . . . . . . 3-36<br />
Initialize EEPROMs (Test 58) . . . . . . . . . . . . . . . . . . 3-37<br />
EEPROM Backup Disk Procedure . . . . . . . . . . . . . . . . 3-38<br />
Correction Constants Retrieval Procedure . . . . . . . . . . . . 3-40<br />
LoadingFirmware.. . . . . . . . . . . . . . . . . . . . . . 3-41<br />
LoadingFirmwareintoanExistingCPU. . . . . . . . . . . . 3-41<br />
In Case of Difficulty . . . . . . . . . . . . . . . . . . . . 3-42<br />
LoadingFirmwareintoaNewCPU . . . . . . . . . . . . . . 3-43<br />
In Case of DifficuIty . . . . . . . . . . . . . . . . . . . . 3-43<br />
Fractional-N Frequency Range Adjustment . . . . . . . . . . . 3-45<br />
Frequency Accuracy Adjustment . . . . . . . . . . . . . . . . 3-48<br />
Instruments with Option ID5 only . . . . . . . . . . . . . . 3-51<br />
In Case of Difficulty . . . . . . . . . . . . . . . . . . . . . 3-51<br />
High/Low Band Transition Adjustment . . . . . . . . . . . . . 3-52<br />
Fractional-N Spur Avoidance and FM Sideband Adjustment . . . . 3-54<br />
Source Spur Avoidance Tracking Adjustment . . . . . . . . . . 3-58<br />
Unprotected Hardware Option Numbers Correction Constants . . 3-60<br />
Sequences for Mechanical Adjustments . . . . . . . . . . . . . 3-62<br />
How to Load Sequences from Disk . . . . . . . . . . . . . . . 3-62<br />
How to Set Up the Fractional-N Frequency Range Adjustment . . 3-63<br />
How to Set Up the High/Low Band Transition Adjustments . . . . 3-63<br />
How to Set Up the Fractional-N Spur Avoidance and FM Sideband<br />
Adjustment . . . . . . . . . . . . . . . . . . . . . . . . 3-64<br />
Sequence Contents . . . . . . . . . . . . . . . . . . . . . . . 3-64<br />
Sequence for the High/Low Band Transition Adjustment . . . . 3-64<br />
Sequences for the Fractional-N Frequency Range Adjustment . . 3-65<br />
Sequences for the Fractional-N Avoidance and FM Sideband<br />
Adjustment . . . . . . . . . . . . . . . . . . . . . . . 3-66<br />
4. Staxt Troubleshooting Here<br />
Assembly Replacement Sequence . . . . . . . . . . . . . . . .<br />
Having Your <strong>Analyzer</strong> <strong>Service</strong>d . . . . . . . . . . . . . . . . .<br />
Step 1. Initial Observations . . . . . . . . . . . . . . . . . . .<br />
Initiate the <strong>Analyzer</strong> Self-Test . . . . . . . . . . . . . . . .<br />
Step 2. Operator’s Check . . . . . . . . . . . . . . . . . . . .<br />
Description . . . . . . . . . . . . . . . . . . . . . . . . .<br />
Procedure . . . . . . . . . . . . . . . . . . . . . . . . . .<br />
4-2<br />
4-2<br />
4-3<br />
4-3<br />
4-4<br />
4-4<br />
4-4<br />
Contents-5
Step 3. <strong>HP</strong>-IB Systems Check . . . . . . . . . . . . . . . . . . 4-6<br />
If Using a Plotter or Printer . . . . . . . . . . . . . . . . . 4-7<br />
IfUsinganExternaiDiskDrive. . . . . . . . . . . . . . . . 4-7<br />
Troubleshooting Systems with Multiple Peripherals . . . . . . . 48<br />
Troubleshooting Systems with Controllers . . . . . . . . . . . 4-8<br />
Step 4. Faulty Group Isolation . . . . . . . . . . . . . . . . . 4-9<br />
Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . 4-10<br />
Check the Rear Panel LEDs . . . . . . . . . . . . . . . . . . 4-10<br />
Check the A8 Post Regulator LEDs . . . . . . . . . . . . . . 4-10<br />
Digital Control . . . . . . . . . . . . . . . . . . . . . . . . . 4-11<br />
Observe the Power Up Sequence . . . . . . . . . . . . . . . 4-11<br />
Verify IntemaI Tests Passed . . . . . . . . . . . . . . . . . . 4-12<br />
Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-13<br />
Phase Lock Error Messages . . . . . . . . . . . . . . . . . . 413<br />
Check Source Output Power . . . . . . . . . . . . . . . . . 4-13<br />
No Oscilloscope or Power Meter? Try the ABUS . . . . . . . . 4-15<br />
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-16<br />
ObservetheAandBInputTraces . . . . . . . . . . . . . . 4-16<br />
Receiver Error Messages . . . . . . . . . . . . . . . . . . . 4-17<br />
Faulty Data . . . . . . . . . . . . . . . . . . . . . . . . . 4-17<br />
Accessories . . . . . . . . . . . . . . . . . . . . . . . . . . 4-18<br />
Accessories Error Messages . . . . . . . . . . . . . . . . . . 4-18<br />
5. Power Supply Troubleshooting<br />
Assembly Replacement Sequence . . . . . . . . . . . . . . . . 5-2<br />
Simplified Block Diagram . . . . . . . . . . . . . . . . . . . . 5-3<br />
StartHere. . . . . . . . . . . . . . . . . . . . . . . . . . . 54<br />
Check the Green LED and Red LED on Al5 . . . . . . . . . . 54<br />
Check the Green LEDs on A8 . . . . . . . . . . . . . . . . . 5-5<br />
Measure the Post Regulator Voltages . . . . . . . . . . . . . 5-5<br />
If the Green LED of the Al5 Is not ON Steadily . . . . . . . . . 5-7<br />
Check the Line Voltage, Selector Switch, and Fuse . . . . . . . 5-7<br />
IftheRedLEDoftheA15IsON . . . . . . . . . . . . . . . . 5-8<br />
Check the A8 Post Regulator . . . . . . . . . . . . . . . . . 5-8<br />
Verify the Al5 Preregulator . . . . . . . . . . . . . . . . . 5-9<br />
Check for a Faulty Assembly . . . . . . . . . . . . . . . . . 5-11<br />
Check the Operating Temperature . . . . . . . . . . . . . . 5-13<br />
Inspect the Motherboard . . . . . . . . . . . . . . . . . . . 5-13<br />
IftheGreenLEDsoftheABarenotalION . . . . . . . . . . . 5-14<br />
Remove AS, Maintain A15Wl Cable Connection . . . . . . . . 5-14<br />
Check the A8 Fuses and Voltages . . . . . . . . . . . . . . . 5-14<br />
Contents-6
Remove the Assemblies . . . . . . . . . . . . . . . . . . . 5-15<br />
Briefly Disable the Shutdown Circuitry . . . . . . . . . . . . 5-16<br />
Inspect the Motherboard . . . . . . . . . . . . . . . . . . . 5-18<br />
Error Messages<br />
5-19<br />
Check the Fuses and Isolate .A8 . 1 : 1 . 1 1 1 : 1 : 1 1 1 : 1 5-20<br />
Pan Troubleshooting . . . . . . . . . . . . . . . . . . . . . .<br />
Fan Speeds . . . . . . . . . . . . . . . . . . . . . . . . .<br />
Check the Pan Voltages . . . . . . . . . . . . . . . . . . . .<br />
5-22<br />
5-22<br />
5-22<br />
Short ABTP3 to Ground . . . . . . . . . . . . . . . . . . . 5-22<br />
Intermittent Problems . . . . . . . . . . . . . . . . . . . . . 5-23<br />
6. Digital Control Troubleshooting<br />
Digital Control Group Block Diagram . . . . . .<br />
Assembly Replacement Sequence . . . . . . . .<br />
CPU Troubleshooting (A9) . . . . . . . . . . .<br />
A9 CC Switch Positions . . . . . . . . . . . .<br />
Checking A9 CPU Red LED Patterns . . . . .<br />
Display Troubleshooting (A2, A18, A19, A27) . .<br />
Evaluating your Display . . . . . . . . . . .<br />
Backlight Intensity Check . . . . . . . . .<br />
Red, Green, or Blue Pixels Specifications . .<br />
Dark Pixels Specifications . . . . . . . . .<br />
Newton’s Riis . . . . . . . . . . . . . .<br />
Troubleshooting a White Display . . . . . . .<br />
Troubleshooting a Black Display . . . . . . .<br />
Troubleshooting a Display with Color Problems<br />
Front Panel Troubleshooting (Al, A2) . . . . . .<br />
Check Front Panel LEDs After Preset . . . . .<br />
Identify the Stuck Key . . . . . . . . . . . .<br />
Inspect Cables . . . . . . . . . . . . . . . .<br />
Test Using a Controller . . . . . . . . . . . .<br />
Run the Internal Diagnostic Tests . . . . . . . .<br />
If the Fault Is Intermittent . . . . . . . . . . .<br />
Repeat Test Function . . . . . . . . . . . . .<br />
<strong>HP</strong>-IB Failures . . . . . . . . . . . . . . . . .<br />
........ 6-2<br />
........ 6-3<br />
........ 64<br />
........ 6-4<br />
........ 6-5<br />
........ 6-7<br />
........ 6-7<br />
........ 6-8<br />
........ 6-9<br />
........ 6-10<br />
........ 6-10<br />
........ 6-12<br />
........ 6-12<br />
........ 6-12<br />
........ 6-13<br />
........ 6-13<br />
........ 6-14<br />
........ 6-16<br />
........ 6-16<br />
........ 6-17<br />
........ 6-19<br />
........ 6-19<br />
........ 6-19
7. Source Troubleshooting<br />
Assembly Replacement Sequence . . . . . . . . . . . . . . . . 7-2<br />
Before You Start Troubleshooting . . . . . . . . . . . . . . . . 7-2<br />
Power. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3<br />
1. Source Default Correction Constants (Test 44) . . . . . . . . 7-3<br />
2. RF Output Power Correction Constants (Test 47) . . . . . . 7-3<br />
3. Sampler Magnitude and Phase Correction Constants (Test 53) 7-3<br />
Phase Lock Error . . . . . . . . . . . . . . . . . . . . . . . 7-4<br />
Phase Lock Loop Error Message Check . . . . . . . . . . . . 74<br />
A4 Sampler/Mixer Check . . . . . . . . . . . . . . . . . . . 7-6<br />
A3 Source and All Phase Lock Check . . . . . . . . . . . . 7-8<br />
YO Coil Drive Check with Analog Bus . . . . . . . . . . . . 7-11<br />
YO Coil Drive Check with Oscilloscope . . . . . . . . . . . 7-12<br />
Al2 Reference Check . . . . . . . . . . . . . . . . . . . . 7-13<br />
Analog Bus Method . . . . . . . . . . . . . . . . . . . . 7-13<br />
Oscilloscope Method . . . . . . . . . . . . . . . . . . . . 7-15<br />
1OOkHzPulses . . . . . . . . . . . . . . . . . . . . . . 7-16<br />
PLREF Waveforms . . . . . . . . . . . . . . . . . . . . . 7-17<br />
REFSiiAtAllTP9. . . . . . . . . . . . . . . . . . 7-17<br />
HighBandREFSii . . . . . . . . . . . . . . . . . . 7-17<br />
LowBandREFSiial . . . . . . . . . . . . . . . . . . 7-18<br />
FNLOatA12Check. . . . . . . . . . . . . . . . . . . . 7-19<br />
4 MHz Reference Signal . . . . . . . . . . . . . . . . . . 7-20<br />
2ND LO Waveforms . . . . . . . . . . . . . . . . . . . . 7-21<br />
90 Degree Phase Offset of 2nd LO Signals in High Band . . 7-21<br />
InPhase2ndLOSignalsinLowBand . . . . . . . . . . . 7-21<br />
Al2 Digital Control Siials Check . . . . . . . . . . . . . . 7-23<br />
LENREFLine . . . . . . . . . . . . . . . . . . . . . . 7-23<br />
LHBandLLBLines. . . . . . . . . . . . . . . . . . . 7-24<br />
A13/A14 Fractional-N Check . . . . . . . . . . . . . . . . . 7-24<br />
Fractional-N Check with Analog Bus . . . . . . . . . . . . 7-24<br />
Al4 VCO Range Check with Oscilloscope . . . . . . . . . . 7-25<br />
Al4 VCO Exercise . . . . . . . . . . . . . . . . . . . . . 7-27<br />
Al4 Divide-by-N Circuit Check . . . . . . . . . . . . . . . 7-29<br />
A14-to-Al3 Digital Control Siials Check. . . . . . . . . . . 7-29<br />
HMBLine . . . . . . . . . . . . . . . . . . . . . . . 7-31<br />
A7 Pulse Generator Check . . . . . . . . . . . . . . . . . . 7-32<br />
A7 Pulse Generator Check with Spectrum <strong>Analyzer</strong> . . . . . 7-32<br />
Rechecking the A13/A14 Fractional-N . . . . . . . . . . . . 7-33<br />
A7 Pulse Generator Check with Oscilloscope . . . . . . . . . 7-34<br />
All Phase Lock Check . . . . . . . . . . . . . . . . . . . . 7-35<br />
Contents-8
Phase Lock Check with PLL DIAG . . . . . . . . . . . . . 7-36<br />
Phase Lock Check by Signal Examination . . . . . . . . . . 7-36<br />
Source Group Troubleshooting Appendix . . . . . . . . . . . . 7-38<br />
Troubleshooting Source Problems with the Analog Bus . . . . . 7-38<br />
Phase Lock Diagnostic Tools . . . . . . . . . . . . . . . . . 7-38<br />
Phase Lock Error Messages . . . . . . . . . . . . . . . . . 7-38<br />
Phase Lock Diagnostic Routines . . . . . . . . . . . . . . . 7-39<br />
Broadband Power Problems . . . . . . . . . . . . . . . . . 7-39<br />
8. Receiver Troubleshooting<br />
Assembly Replacement Sequence . . . . . . . . . . . . . . . . 8-2<br />
Receiver Failure Error Messages . . . . . . . . . . . . . . . . 8-3<br />
ChecktheAandBInputs . . . . . . . . . . . . . . . . . . . 8-4<br />
Troubleshooting When AU Inputs Look Bad . . . . . . . . . . . 8-6<br />
RunIntemalTests18and17 . . . . . . . . . . . . . . . . . 8-6<br />
Check 2nd LO . . . . . . . . . . . . . . . . . . . . . . . . 8-6<br />
Checkthe4MHzREFSiiaI . . . . . . . . . . . . . . . . . . 8-7<br />
Check A10 by Substitution or SiiaI Examination . . . . . . . 8-8<br />
Troubleshooting When One or More Inputs Look Good . . . . . . 8-11<br />
Checkthe4kHzSiial. . . . . . . . . . . . . . . . . . . . 8-11<br />
Check the Trace with the Sampler Correction Constants Off . . 8-12<br />
Check 1st I.0 Siial at Sampler/Mixer . . . . . . . . . . . . . 8-14<br />
Check 2nd LO Signal at Sampler/Mixer . . . . . . . . . . . . 8-14<br />
9. Accessories Troubleshooting<br />
Assembly Replacement Sequence . . . . . . . . . . . . . . . .<br />
Inspect the Accessories . . . . . . . . . . . . . . . . . . . . .<br />
Inspect the Test Port Connectors and Calibration Devices . . . .<br />
Inspect the Error Terms . . . . . . . . . . . . . . . . . . . .<br />
Cable Test . . . . . . . . . . . . . . . . . . . . . . . . . .<br />
Verify Shorts and Opens . . . . . . . . . . . . . . . . . . .<br />
10. <strong>Service</strong> Key Menus and Error Messages<br />
<strong>Service</strong> Key Menus. . . . . . . . . . . . . . . . . . . . . . . 10-l<br />
Error Messages . . . . . . . . . . . . . . . . . . . . . . . . 10-l<br />
<strong>Service</strong> Key Menus . Internal Diagnostics . . . . . . . . . . . . lo-2<br />
Tests Menu . . . . . . . . . . . . . . . . . . . . . . . . . 10-3<br />
Test Options Menu . . . . . . . . . . . . . . . . . . . . . . lo-5<br />
Self Diagnose Softkey . . . . . . . . . . . . . . . . . . . . lo.7<br />
Test Descriptions. . . . . . . . . . . . . . . . . . . . . . . lo-7<br />
Internal Tests . . . . . . . . . . . . . . . . . . . . . . . lo-7<br />
9-2<br />
9-3<br />
9-3<br />
9-3<br />
9-5<br />
9-6<br />
Contents-9
External Tests . . . . . . . . . . . . . . . . . . . . . . .<br />
System Verification Tests . . . . . . . . . . . . . . . . . .<br />
Adjustment Tests . . . . . . . . . . . . . . . . . . . . .<br />
Display Tests . . . . . . . . . . . . . . . . . . . . . . .<br />
Test Patterns . . . . . . . . . . . . . . . . . . . . . . .<br />
<strong>Service</strong> Key Menus - <strong>Service</strong> Features . . . . . . . . . . . . . .<br />
<strong>Service</strong> Modes Menu . . . . . . . . . . . . . . . . . . . . .<br />
<strong>Service</strong> Modes More Menu . . . . . . . . . . . . . . . . . .<br />
Analog Bus . . . . . . . . . . . . . . . . . . . . . . . . .<br />
Description of the Analog Bus . . . . . . . . . . . . . . .<br />
TheMainADC. . . . . . . . . . . . . . . . . . . . . . .<br />
The Frequency Counter . . . . . . . . . . . . . . . . . .<br />
Analog In Menu . . . . . . . . . . . . . . . . . . . . . . .<br />
Analog Bus Nodes . . . . . . . . . . . . . . . . . . . . . .<br />
A3 Source . . . . . . . . . . . . . . . . . . . . . . . . .<br />
A10 Digital IF . . . . . . . . . . . . . . . . . . . . . . .<br />
All Phase Lock . . . . . . . . . . . . . . . . . . . . . .<br />
A12 Reference . . . . . . . . . . . . . . . . . . . . . . .<br />
Al4 Fractional-N (Digital) . . . . . . . . . . . . . . . . .<br />
PEEK/POKE Menu . . . . . . . . . . . . . . . . . . . . . .<br />
Firmware Revision Softkey . . . . . . . . . . . . . . . . . . .<br />
<strong>HP</strong>-IB <strong>Service</strong> Mnemonic Deiinitions . . . . . . . . . . . . . .<br />
Invoking Tests Remotely . . . . . . . . . . . . . . . . . . .<br />
Analog Bus Codes . . . . . . . . . . . . . . . . . . . . . .<br />
Error Messages . . . . . . . . . . . . . . . . . . . . . . . .<br />
10-11<br />
10-12<br />
10-13<br />
10-15<br />
lo-16<br />
10-18<br />
lo-18<br />
10-21<br />
10-22<br />
lo-22<br />
lo-23<br />
lo-23<br />
lo-24<br />
lo-26<br />
lo-26<br />
lo-33<br />
lo-34<br />
10-40<br />
1043<br />
1046<br />
lo-47<br />
lo-48<br />
1048<br />
1049<br />
10-50<br />
11. Error lkrms<br />
Error Terms Can Also Serve a Diagnostic Purpose . . . . . . . . 11-l<br />
FuII Two-Port Error-Correction Procedure . . . . . . . . . . . . 11-3<br />
Error l&m Inspection . . . . . . . . . . . . . . . . . . . . .<br />
If Error Terms Seem Worse than Typical Values . . . . . . . .<br />
11-8<br />
11-9<br />
Uncorrected Performance . . . . . . . . . . . . . . . . . .<br />
Error Term Descriptions . . . . . . . . . . . . . . . . . . . .<br />
Directivity (EDF and EDR) . . . . . . . . . . . . . . . . . .<br />
11-9<br />
11-10<br />
11-11<br />
Description . . . . . . . . . . . . . . . . . . . . . . . . 11-11<br />
Significant System Components . . . . . . . . . . . . . . . 11-11<br />
Affected Measurements . . . . . . . . . . . . . . . . . . . 11-11<br />
Source Match (ESF and ESR) . . . . . . . . . . . . . . . . . 11-12<br />
Description . . . . . . . . . . . . . . . . . . . . . . . . 11-12<br />
Significant System Components . . . . . . . . . . . . . . 11-12 .<br />
Affected Measurements . . . . . . . . . . . . . . . . . . 11-12<br />
Contents-l 0
Reflection Tracking (ERF’ and ERR) . . . . . . . . . . . . . . 11-13<br />
Description . . . . . . . . . . . . . . . . . . . . . . . . 11-13<br />
Significant System Components . . . . . . . . . . . . . . . 11-13<br />
Affected Measurements . . . . . . . . . . . . . . . . . . 11-13<br />
Isolation (Crosstalk, EXF and EXR) . . . . . . . . . . . . . . 11-14<br />
Description . . . . . . . . . . . . . . . . . . . . . . . . 11-14<br />
Significant System Components . . . . . . . . . . . . . . . 11-14<br />
Affected Measurements . . . . . . . . . . . . . . . . . . 11-14<br />
LoadMatch(ELF’andELR). . . . . . . . . . . . . . . . . . 11-15<br />
Description . . . . . . . . . . . . . . . . . . . . . . . . 11-15<br />
Significant System Components . . . . . . . . . . . . . . . 11-15<br />
Affected Measurements . . . . . . . . . . . . . . . . . . 11-15<br />
Transmission Tracking (ETF and ETR) . . . . . . . . . . . . . 11-16<br />
Description . . . . . . . . . . . . . . . . . . . . . . . . 11-16<br />
Significant System Components . . . . . . . . . . . . . . . 11-16<br />
Affected Measurements . . . . . . . . . . . . . . . . . . 11-16<br />
12. Theory of Operation<br />
How the <strong>HP</strong> <strong>8753E</strong> Works . . . . . . . . . . . . . . . . . . . 12-1<br />
The Built-In Synthesized Source . . . . . . . . . . . . . . . 12-2<br />
The Source Step Attenuator . . . . . . . . . . . . . . . . 12-2<br />
The Built-In Test Set . . . . . . . . . . . . . . . . . . . . . 12-3<br />
The Receiver Block . . . . . . . . . . . . . . . . . . . . . 12-3<br />
The Microprocessor . . . . . . . . . . . . . . . . . . . . 12-3<br />
Required Peripheral Equipment . . . . . . . . . . . . . . . . 12-3<br />
A Close Look at the <strong>Analyzer</strong>’s Functional Groups . . . . . . . . 12-4<br />
Power Supply Theory . . . . . . . . . . . . . . . . . . . . . 12-5<br />
Al5 PrereguIator . . . . . . . . . . . . . . . . . . . . . . 12-5<br />
Line Power Module . . . . . . . . . . . . . . . . . . . . 12-6<br />
Preregulated Voltages . . . . . . . . . . . . . . . . . . . 12-6<br />
Regulated +5 V Digital Supply . . . . . . . . . . . . . . . 12-6<br />
Shutdown Indications: the Green LED and Red LED . . . . . 12-6<br />
A8 Post Regulator . . . . . . . . . . . . . . . . . . . . . . 12-7<br />
Voltage Indications: the Green LEDs . . . . . . . . . . . . 12-7<br />
Shutdown Circuit . . . . . . . . . . . . . . . . . . . . . 12-7<br />
Variable Pan Circuit and Air Flow Detector . . . . . . . . . 12-7<br />
Display Power . . . . . . . . . . . . . . . . . . . . . . . 12-8<br />
Probe Power . . . . . . . . . . . . . . . . . . . . . . . 12-8<br />
Digital Control Theory . . . . . . . . . . . . . . . . . . . . . 12-8<br />
Al Front Panel . . . . . . . . . . . . . . . . . . . . . . . 12-10<br />
A2 Front Panel Processor . . . . . . . . . . . . . . . . . . . 12-10<br />
Contmte11
Contents-12<br />
A9 CPU/A10 Digital IF . . . . . . . . . . . . . . . . . . . . 12-10<br />
Main CPU . . . . . . . . . . . . . . . . . . . . . . . . . 12-10<br />
MainRAM. . . . . . . . . . . . . . . . . . . . . . . . . 12-11<br />
EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . 12-11<br />
Digital SiiaI Processor . . . . . . . . . . . . . . . . . . 12-11<br />
Al8 Display . . . . . . . . . . . . . . . . . . . . . . . . . 12-11<br />
A19 GSP . . . . . . . . . . . . . . . . . . . . . . . . . . 12-12<br />
A27 Inverter . . . . . . . . . . . . . . . . . . . . . . . . 12-12<br />
Al6 Rear Panel . . . . . . . . . . . . . . . . . . . . . . . 12-12<br />
Source Theory Overview . . . . . . . . . . . . . . . . . . . . 12-14<br />
A14/A13 Fractional-N . . . . . . . . . . . . . . . . . . . . 12-14<br />
Al2 Reference . . . . . . . . . . . . . . . . . . . . . . . . 12-14<br />
A7 Pulse Generator . . . . . . . . . . . . . . . . . . . . . 12-15<br />
All Phase Lock . . . . . . . . . . . . . . . . . . . . . . . 12-15<br />
A3 Source . . . . . . . . . . . . . . . . . . . . . . . . . . 12-15<br />
Source Super Low Band Operation . . . . . . . . . . . . . . . 12-15<br />
Source Low Band Operation . . . . . . . . . . . . . . . . . . 12-16<br />
Source High Band Operation . . . . . . . . . . . . . . . . . . 12-19<br />
Source Operation in other Modes/Features . . . . . . . . . . . . 12-22<br />
Frequency Offset . . . . . . . . . . . . . . . . . . . . . . 12-22<br />
Harmonic Analysis (Option 002) . . . . . . . . . . . . . . . . 12-22<br />
External Source Mode . . . . . . . . . . . . . . . . . . . . 12-23<br />
Tuned Receiver Mode . . . . . . . . . . . . . . . . . . . . 12-25<br />
Signal Separation . . . . . . . . . . . . . . . . . . . . . . . 12-26<br />
TheBuiIt-InTestSet . . . . . . . . . . . . . . . . . . . . . 12-26<br />
A21 andA22’IWPortCouplers . . . . . . . . . . . . . . 12-26<br />
A23LEDFrontPanel . . . . . . . . . . . . . . . . . . . 12-26<br />
A24 Transfer Switch . . . . . . . . . . . . . . . . . . . . 12-26<br />
A25 Test Set Interface . . . . . . . . . . . . . . . . . . . 12-26<br />
Receiver Theory . . . . . . . . . . . . . . . . . . . . . . . . 12-28<br />
A4lA5lA6 Sampler/Mixer . . . . . . . . . . . . . . . . . . . 12-29<br />
TheSamplerCircuitinHighBand. . . . . . . . . . . . . . 12-29<br />
The Sampler Circuit in Low Band or Super Low Band . . . . 12-29<br />
The2ndLOSignaI . . . . . . . . . . . . . . . . . . . . . 12-29<br />
The Mixer Circuit . . . . . . . . . . . . . . . . . . . . . 12-30<br />
AlODi@talIF . . . . . . . . . . . . . . . . . . . . . . . . 12-30
13. Replaceable parts<br />
Replacing an Assembly . . . . . . . . . . . . . . . . . . . . .<br />
Rebuilt-Exchange Assemblies . . . . . . . . . . . . . . . . . .<br />
Ordering Information . . . . . . . . . . . . . . . . . . . . .<br />
Replaceable Part Listings . . . . . . . . . . . . . . . . . . . .<br />
Major Assemblies, ‘Ibp . . . . . . . . . . . . . . . . . . . .<br />
Major Assemblies, Bottom . . . . . . . . . . . . . . . . . .<br />
Cables, Top . . . . . . . . . . . . . . . . . . . . . . . . .<br />
Cables, Bottom . . . . . . . . . . . . . . . . . . . . . . .<br />
Cables, Front . . . . . . . . . . . . . . . . . . . . . . . .<br />
Cables, Rear . . . . . . . . . . . . . . . . . . . . . . . . .<br />
Cables, Source . . . . . . . . . . . . . . . . . . . . . . . .<br />
F’ront Panel Assembly, Outside . . . . . . . . . . . . . . . .<br />
kont Panel Assembly, Inside . . . . . . . . . . . . . . . . .<br />
Rear Panel Assembly . . . . . . . . . . . . . . . . . . . . .<br />
Rear Panel Assembly, Option lD5 . . . . . . . . . . . . . . .<br />
Hardware, Top. . . . . . . . . . . . . . . . . . . . . . . .<br />
Hardware, Bottom . . . . . . . . . . . . . . . . . . . . . .<br />
Hardware, Front . . . . . . . . . . . . . . . . . . . . . . .<br />
Hardware, Test Set Deck . . . . . . . . . . . . . . . . . . .<br />
Hardware, Disk Drive Support . . . . . . . . . . . . . . . .<br />
Hardware, Memory Deck . . . . . . . . . . . . . . . . . . .<br />
Hardware, Preregulator . . . . . . . . . . . . . . . . . . .<br />
Chassis Parts, Outside . . . . . . . . . . . . . . . . . . . .<br />
Chassis Parts, Inside . . . . . . . . . . . . . . . . . . . . .<br />
Miscellaneous . . . . . . . . . . . . . . . . . . . . . . . .<br />
13-2<br />
13-3<br />
13-3<br />
13-5<br />
13-6<br />
13-8<br />
13-10<br />
13-12<br />
13-14<br />
13-16<br />
13-18<br />
13-20<br />
13-22<br />
13-24<br />
13-26<br />
13-28<br />
13-30<br />
13-32<br />
13-34<br />
13-36<br />
13-38<br />
13-40<br />
1342<br />
1344<br />
1346<br />
14. Assembly Replacement and Post-Repair Procedures<br />
Replacing an Assembly . . . . . . . . . . . . . . . . . . . . . 14-2<br />
Procedures described in this chapter . . . . . . . . . . . . . 14-3<br />
LineFuse . . . . . . . . . . . . . . . . . . . . . . . . . . . 144<br />
Tools Required . . . . . . . . . . . . . . . . . . . . . . . . 14-4<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 144<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 144<br />
Covers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-6<br />
Tools Required . . . . . . . . . . . . . . . . . . . . . . . . 14-6<br />
Removing the top cover . . . . . . . . . . . . . . . . . . . 14-6<br />
Removing the side covers . . . . . . . . . . . . . . . . . . 146<br />
Removing the bottom cover . . . . . . . . . . . . . . . . . 14-6<br />
Front Panel Assembly . . . . . . . . . . . . . . . . . . . . . 14-8<br />
Tools Required . . . . . . . . . . . . . . . . . . . . . . . . 148<br />
Contents-13
Contents-14<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 14-8<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 14-8<br />
Front Panel Keyboard and Interface Assemblies (Al, A2) . . . . . 14-10<br />
Tools Required . . . . . . . . . . . . . . . . . . . . . . . . 14-10<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 14-10<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 14-10<br />
Display Lamp and Inverter Assemblies (A18, A27) . . . . . . . . 14-12<br />
‘Ibols Required . . . . . . . . . . . . . . . . . . . . . . . . 14-12<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 14-12<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 14-13<br />
Rear Panel Assembly . . . . . . . . . . . . . . . . . . . . . . 1416<br />
‘Ibois Required . . . . . . . . . . . . . . . . . . . . . . . . 14-16<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 14-16<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 14-17<br />
Rear Panel Interface Board Assembly (A16) . . . . . . . . . . . 14-20<br />
‘Ibols Required . . . . . . . . . . . . . . . . . . . . . . . . 14-20<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 14-20<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 14-20<br />
A3 Source Assembly . . . . . . . . . . . . . . . . . . . . . . 14-22<br />
Tools Required . . . . . . . . . . . . . . . . . . . . . . . . 1422<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 1422<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 14-24<br />
A4, A5, A6 Samplers and A7 Pulse Generator . . . . . . . . . . 1426<br />
Tools Required . . . . . . . . . . . . . . . . . . . . . . . . 14-26<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 14-26<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 14-28<br />
AS, AlO, All, A12, A13, Al4 Card Cage Boards . . . . . . . . . 14-30<br />
lbois Required . . . . . . . . . . . . . . . . . . . . . . . . 1430<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 14-30<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 14-30<br />
A9 CPU Board . . . . . . . . . . . . . . . . . . . . . . . . . 14-32<br />
Tools Required . . . . . . . . . . . . . . . . . . . . . . . . 14-32<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 14-32<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 14-32<br />
A9BTl Battery . . . . . . . . . . . . . . . . . . . . . . . . 14-36<br />
Tools Required . . . . . . . . . . . . . . . . . . . . . . . . 14-36<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 14-36<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 14-36<br />
Al5 Preregulator . . . . . . . . . . . . . . . . . . . . . . . 14-38<br />
Tools Required . . . . . . . . . . . . . . . . . . . . . . . . 14-38<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 1438
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 14-38<br />
Al7 Motherboard Assembly . . . . . . . . . . . . . . . . . . 14-40<br />
Tools Required . . . . . . . . . . . . . . . . . . . . . . . . 14-40<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 14-40<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 14-43<br />
A19 Graphics Processor . . . . . . . . . . . . . . . . . . . . 1444<br />
Tools Required . . . . . . . . . . . . . . . . . . . . . . . . 1444<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 1444<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 1444<br />
A20 Disk Drive Assembly . . . . . . . . . . . . . . . . . . . 1446<br />
Tools Required . . . . . . . . . . . . . . . . . . . . . . . . 14-46<br />
Required Diskette . . . . . . . . . . . . . . . . . . . . . . 1446<br />
Prehminary Instructions . . . . . . . . . . . . . . . . . . . 14-46<br />
Install the replacement disk drive. . . . . . . . . . . . . . . 14-48<br />
Test the disk-eject function, and adjust if required. . . . . . . 1448<br />
Reinstall the covers. . . . . . . . . . . . . . . . . . . . . . 1449<br />
A21, A22 Test Port Couplers . . . . . . . . . . . . . . . . . . 14-50<br />
Tools Required . . . . . . . . . . . . . . . . . . . . . . . . 14-50<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 14-50<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 14-50<br />
A23 LED Board . . . . . . . . . . . . . . . . . . . . . . . . 14-52<br />
Tools Required. . . . . . . . . . . . . . . . . . . . . . . . 14-52<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 14-52<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 14-52<br />
A24 Transfer Switch . . . . . . . . . . . . . . . . . . . . . . 14-54<br />
Tools Required . . . . . . . . . . . . . . . . . . . . . . . . 14-54<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 14-54<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 14-54<br />
A25 Test Set Interface . . . . . . . . . . . . . . . . . . . . . 1456<br />
Tools Required . . . . . . . . . . . . . . . . . . . . . . . . 1456<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 1456<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 1456<br />
A26 High Stability Frequency Reference (Option lD5) Assembly . 14-58<br />
Tools Required . . . . . . . . . . . . . . . . . . . . . . . . 14-58<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 14-58<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 14-58<br />
Bl Fan Assembly . . . . . . . . . . . . . . . . . . . . . . . 14-60<br />
Tools Required . . . . . . . . . . . . . . . . . . . . . . . . 14-60<br />
Removal . . . . . . . . . . . . . . . . . . . . . . . . . . 14-60<br />
Replacement . . . . . . . . . . . . . . . . . . . . . . . . 1460<br />
Post-Repair Procedures for <strong>HP</strong> <strong>8753E</strong> . . . . . . . . . . . . . . 1462<br />
Contents-l 5
15. Safety and Licensing<br />
Notice . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-1<br />
Certification . . . . . . . . . . . . . . . . . . . . . . . . . . 15-1<br />
warranty . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-2<br />
Assistance . . . . . . . . . . . . . . . . . . . . . . . . . . 15-2<br />
Shipment for <strong>Service</strong> . . . . . . . . . . . . . . . . . . . . . 15-4<br />
Safety Symbols . . . . . . . . . . . . . . . . . . . . . . . . 15-5<br />
Instrument Markings . . . . . . . . . . . . . . . . . . . . . . 15-5<br />
Safety Considerations . . . . . . . . . . . . . . . . . . . . . 15-6<br />
Safety Earth Ground . . . . . . . . . . . . . . . . . . . . . 15-6<br />
Before Applying Power . . . . . . . . . . . . . . . . . . . 15-6<br />
servicing . . . . . . . . . . . . . . . . . . . . . . . . . . 15-7<br />
General . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-8<br />
Compliance with German FTZ Emissions Requirements . . . . . 15-9<br />
Compliance with German Noise Requirements . . . . . . . . . 15-9<br />
Index<br />
Content*16
Figures<br />
2-l. System Verification Test Setup . . . . . . . . . . . . . . . . 2-10<br />
2-2. Connections for Measurement Calibration Standards . . . . . . 2-12<br />
2-3. Transmission Calibration Setup . . . . . . . . . . . . . . . . 2-13<br />
2-4. Connections for the 20 dB Verification Device . . . . . . . . . 2-14<br />
2-5. Connections for the 50 dB Verification Device . . . . . . . . . 2-15<br />
2-6. Mismatch Device Verification Setup 1 . . . . . . . . . . . . . 2-15<br />
2-7. Mismatch Device Verification Setup 2 . . . . . . . . . . . . . 2-16<br />
2-8. Test Port Output Frequency Range and Accuracy Test Setup . . 2-19<br />
2-9. External Source Mode Frequency Range Test Setup . . . . . . 2-22<br />
2-10. Source Output Power Accuracy Test Setup . . . . . . . . . . . 2-25<br />
2-11. Test Port Output Power Range and Accuracy Test Setup . . . . 2-28<br />
2-12. Minimum R Channel Level Test Setup . . . . . . . . . . . . . 2-32<br />
2-13. Flexible RF Cable Location . . . . . . . . . . . . . . . . . . 2-34<br />
2-14. Connections for Substituting the R Sampler (A4) . . . . . . . . 2-35<br />
2-15. Setup for Checking the R Sampler (A4) . . . . . . . . . . . . 2-36<br />
2-16. Source Input Noise Floor Test Setup . . . . . . . . . . . . . . 2-38<br />
2-17. Setup for Power Meter Calibration on Test Port 1 . . . . . . . 2-44<br />
2-18. Test Port 2 Input Frequency Response Test Setup . . . . . . . 2-47<br />
2-19. Setup for Power Meter Calibration on Test Port 2 . . . . . . . 2-48<br />
2-20. Test Port 1 Input Frequency Response Test Setup . . . . . . . 2-49<br />
2-21. Setup for Power Meter Calibration on Test Port 2 . . . . . . . 2-50<br />
2-22. Setup for Test Port 1 Input Frequency Response . . . . . . . . 2-51<br />
2-23. Setup for Power Meter Calibration on Test Port 1 . . . . . . . 2-52<br />
2-24. Test Port 2 Input Frequency Response Test Setup . . . . . . . 2-53<br />
2-25. Test Port Crosstalk Test Setup . . . . . . . . . . . . . . . . . 2-54<br />
2-26. <strong>HP</strong> <strong>8753E</strong> Bottom View . . . . . . . . . . . . . . . . . . . 2-57<br />
2-27. First FulI 2-Port Calibration Test Setup . . . . . . . . . . . . 2-59<br />
2-28. Transmission Calibration Test Setup . . . . . . . . . . . . . . 2-60<br />
2-29. Second FuR 2-Port Calibration Test Setup . . . . . . . . . . . 2-62<br />
2-30. Transmission Calibration Test Setup . . . . . . . . . . . . . . 2-63<br />
2-31. System Trace Noise Test Setup . . . . . . . . . . . . . . . . 2-65<br />
2-32. System Trace Noise Test Setup . . . . . . . . . . . . . . . . 2-68<br />
Conteints-17
2-33. Sll l-Port Cal Test Setup . . . . . . . . . . . . . . . . . . .<br />
2-34. Test Port 2 Input Impedance Test Setup . . . . . . . . . . . .<br />
2-35. S22 l-Port Cal Test Setup . . . . . . . . . . . . . . . . . . .<br />
2-36. Test Port 1 Input Impedance Test Setup . . . . . . . . . . . .<br />
2-37. Power Meter Calibration for Magnitude Dynamic Accuracy . . .<br />
2-38. FulI 2-Port Calibration with Adapter Removal . . . . . . . . .<br />
2-39. Magnitude Dynamic Accuracy Measurement . . . . . . . . . .<br />
240. Test Port Magnitude Compression Test Setup . . . . . . . . . .<br />
2-41. Test Port Phase Compression Test Setup . . . . . . . . . . . .<br />
242. Test Port Output Harmonics Test Setup . . . . . . . . . . . .<br />
2-43. Receiver Harmonics Test Setup . . . . . . . . . . . . . . . .<br />
2-44. Test Port Output Harmonics Test Setup . . . . . . . . . . . .<br />
245. Receiver Harmonics Test Setup . . . . . . . . . . . . . . . .<br />
246. Test Port Output Harmonics Test Setup . . . . . . . . . . . .<br />
3-l. A9 Correction Constants Switch<br />
3-2. RF Output Correction Constants T&t’S&up’fdr ‘the <strong>HP</strong> <strong>8753E</strong> : :<br />
3-3. First Connections for Insertion Loss Measurement . . . . . . .<br />
34. Second Connections for Insertion Loss Measurement . . . . . .<br />
3-5. Connections for Sampler Correction Routine . . . . . . . . . .<br />
3-6. Connections for Sampler Correction at 6 GHz . . . . . . . . .<br />
3-7. Connections for Sampler Correction at Port 2 . . . . . . . . .<br />
3-8. Connections for Sampler Correction at Port 2 for 6 GHz . . . .<br />
3-9. Connections for the Second Through Cable . . . . . . . . . .<br />
3-10. Setup for Cavity Oscihator Frequency Correction Constant<br />
Routine . . . . . . . . . . . . . . . . . . . . . . . . .<br />
3-11. Typical Display of Spurs with a Filter . . . . . . . . . . . . .<br />
3-12. Typical Display of Four Spurs without a Filter . . . . . . . . .<br />
3-13. lhrget Spur Is Fourth in Display of Five Spurs . . . . . . . . .<br />
3-14. Target Spur Is Almost Invisible . . . . . . . . . . . . . . . .<br />
3-15. Location of the FN VCO TUNE Adjustment . . . . . . . . . .<br />
3-16. Fractional-N Frequency Range Adjustment Display . . . . . . .<br />
3-17. Frequency Accuracy Adjustment Setup . . . . . . . . . . . .<br />
3-18. Location of the VCXO ADJ Adjustment . . . . . . . . . . . .<br />
3-19. High Stability Frequency Adjustment Location . . . . . . . . .<br />
3-20. High/Low Band Transition Adjustment Trace . . . . . . . . .<br />
3-21. High/Low Band Adjustment Locations . . . . . . . . . . . . .<br />
3-22. Fractional-N Spur Avoidance and FM Sideband Adjustment Setup<br />
3-23. Location of API and 100 kHz Adjustments . . . . . . . . . . .<br />
3-24. Location of All Test Points and A3 CAV ADJ Adjustments . . .<br />
3-25. Display of Acceptable versus Excessive Spikes . . . . . . . . .<br />
4-l. Preset Sequence . . . . . . . . . . . . . . . . . . . . . . .<br />
Contents-l 8<br />
2-73<br />
2-74<br />
2-75<br />
2-76<br />
2-81<br />
2-83<br />
2-85<br />
2-90<br />
2-93<br />
2-96<br />
2-98<br />
2-102<br />
2-104<br />
2-109<br />
3-6<br />
3-14<br />
3-20<br />
3-21<br />
3-22<br />
3-23<br />
3-24<br />
3-25<br />
3-25<br />
3-29<br />
3-30<br />
3-31<br />
3-32<br />
3-33<br />
3-46<br />
346<br />
3-49<br />
3-50<br />
3-51<br />
3-53<br />
3-53<br />
3-55<br />
3-56<br />
3-58<br />
3-59<br />
4-3
4-2. Troubleshooting Organization . . . . . . . . . . . . . . . . . 4-9<br />
4-3. Al5 Prereguiator LEDs . . . . . . . . . . . . . . . . . . . . 4-10<br />
44. kont Panel Power Up Sequence . . . . . . . . . . . . . . . 4-11<br />
4-5. Equipment Setup for Source Power Check . . . . . . . . . . . 4-14<br />
4-6. ABUSNode 16: 1 V/GHz . . . . . . . . . . . . . . . . . . . 415<br />
4-7. Equipment Setup . . . . . . . . . . . . . . . . . . . . . . 4-16<br />
4-8. Typical Measurement Trace . . . . . . . . . . . . . . . . . 4-17<br />
4-9. <strong>HP</strong> <strong>8753E</strong> Overall Block Diagram . . . . . . . . . . . . . . . 4-19<br />
5-l. Power Supply Group SimpIified Block Diagram . . . . . . . . . 5-3<br />
5-2. Location of Al5 Diagnostic LEDs . . . . . . . . . . . . . . . 5-4<br />
5-3. A8 Post Regulator Test Point Locations . . . . . . . . . . . . 5-5<br />
5-4. Removing the Line Fuse . . . . . . . . . . . . . . . . . . . 5-7<br />
5-5. Power Supply Cable Locations . . . . . . . . . . . . . . . . 5-9<br />
5-6. A15Wl Plug Detail . . . . . . . . . . . . . . . . . . . . . . 5-11<br />
5-7. kont Panel Probe Power Connector Voltages . . . . . . . . . 5-20<br />
5-8. Power Supply Block Diagram . . . . . . . . . . . . . . . . . 5-25<br />
6-l. Digital Control Group Block Diagram . . . . . . . . . . . . . 6-2<br />
6-2. Switch Positions on the A9 CPU . . . . . . . . . . . . . . . 6-5<br />
6-3. CPU LED Window on Rear Panel . . . . . . . . . . . . . . . 6-6<br />
6-4. Backlight Intensity Check Setup . . . . . . . . . . . . . . . 6-9<br />
6-5. Newtons Rings. . . . . . . . . . . . . . . . . . . . . . . . 6-11<br />
6-6. Preset Sequence . . . . . . . . . . . . . . . . . . . . . . . 6-13<br />
7-l. Basic Phase Lock Error Troubleshooting Equipment Setup . . . 74<br />
7-2. Jumper Positions on the A9 CPU . . . . . . . . . . . . . . . 7-5<br />
7-3. Sampler/Mixer to Phase Lock Cable Connection Diagram . . . . 7-7<br />
74. Waveform Integrity in SRC Tune Mode . . . . . . . . . . . . 7-9<br />
7-5. Phase Locked Output Compared to Open Loop Output in SRC<br />
Tune Mode. . . . . . . . . . . . . . . . . . . . . . . . 7-9<br />
7-6. 1 V/GHz at Analog Bus Node 16 with Source PLL Off. . . . . . 7-11<br />
7-7. YO- and YO+ Coil Drive Voltage Differences with SOURCE PLL<br />
OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-12<br />
7-8. Sharp 109 kHz pulses at A13TP5 (any frequency) . . . . . . . 7-16<br />
7-9.HighBandREFSiiaI(~l6MHzCW). . . . . . . . . . . . . 7-17<br />
7-10. REF’SiiaIatAllTP9(5MHzCW) . . . . . . . . . . . . . . 7-18<br />
7-11. Typical F’N LO Waveform at A12Jl . . . . . . . . . . . . . . 7-19<br />
7-12. 4 MHz Reference SiiaI at A12TP9 (Preset) . . . . . . . . . . 7-20<br />
7-13. 90 Degree Phase Offset of High Band 2nd LO Siiais (116 MHz<br />
cw). . . . . . . . . . . . . . . . . . . . . . . . . . . 7-21<br />
7-14. In-Phase Low Band 2nd LO SiiaIs (14 MHz CW) . . . . . . . . 7-22<br />
7-15. L ENREP Line at A12P2-16 (Preset) . . . . . . . . . . . . . . 7-23<br />
7-16. Complementary L HB and L LB Signals (Preset) . . . . . . . . 7-24<br />
Contents-19
7-17. 10 MHz HI OUT Waveform from A14Jl . . . . . . . . . . . . 7-26<br />
7-18. 25 MHz HI OUT Waveform from A14Jl . . . . . . . . . . . . 7-26<br />
7-19. 60 MHz HI OUT Waveform from A14Jl . . . . . . . . . . . . 7-27<br />
7-20. LC OUT Waveform at A14J2 . . . . . . . . . . . . . . . . . 7-28<br />
7-21. Al4 Generated Digital Control Signals . . . . . . . . . . . . . 7-30<br />
7-22. H MB Signal at A14Pl-5 (Preset and 16 MHz to 31 MHz Sweep) . 7-31<br />
7-23. Pulse Generator Output . . . . . . . . . . . . . . . . . . . 7-32<br />
7-24. HighQuaiityComb’Ibothat3GHz . . . . . . . . . . . . . . 7-33<br />
7-25. Stable HI OUT SiiaI in FRACN TUNE Mode . . . . . . . . . . 7-34<br />
7-26. Typical 1st IF Waveform in FRACN TUNE/SRC TUNE Mode . . 7-35<br />
7-27. FM Coil - Plot with 3 Point Sweep . . . . . . . . . . . . . . 7-37<br />
8-l. Equipment Setup . . . . . . . . . . . . . . . . . . . . . . 8-4<br />
8-2. Typical Good Trace . . . . . . . . . . . . . . . . . . . . . 8-5<br />
8-3. 4 MHz REF Waveform . . . . . . . . . . . . . . . . . . . . 8-7<br />
8-4. Digital Data Lines Observed UsingL INTCOP as Trigger . . . . S-10<br />
8-5. Digital Control Lines Observed Using L INTCOP as Trigger . . . S-10<br />
8-6. 2nd IF (4 kHz) Waveform . . . . . . . . . . . . . . . . . . . 8-12<br />
8-7. Typical Trace with Sampler Correction On and Off . . . . . . . 8-13<br />
9-l. Typical Return Loss Traces of Good and Poor Cables . . . . . . 9-5<br />
9-2. Typical Smith Chart Traces of Good Short (a) and Open (b) . . . 9-7<br />
10-l. Internal Diagnostics Menus . . . . . . . . . . . . . . . . . . 10-2<br />
10-2. A9 CPU Switch Positions . . . . . . . . . . . . . . . . . . . 10-S<br />
10-3. <strong>Service</strong> Feature Menus . . . . . . . . . . . . . . . . . . . . lo-18<br />
104. Analog Bus Node 1 . . . . . . . . . . . . . . . . . . . . . lo-27<br />
10-5. AnaiogBusNode2 . . . . . . . . . . . . . . . . . . . . . lo-28<br />
10-6. Analog Bus Node 3 . . . . . . . . . . . . . . . . . . . . . lo-29<br />
10-7. AnalogBusNode4 . . . . . . . . . . . . . . . . . . . . . lo-30<br />
10-B. Analog Bus Node 6 . . . . . . . . . . . . . . . . . . . . . 10-31<br />
10-9. Analog Bus Node 7 . . . . . . . . . . . . . . . . . . . . . lo-32<br />
10-10. Analog Bus Node 14 . . . . . . . . . . . . . . . . . . . . . lo-35<br />
10-11. Analog Bus Node 15 . . . . . . . . . . . . . . . . . . . . . lo-36<br />
10-12. Analog Bus Node 16 . . . . . . . . . . . . . . . . . . . . . lo-37<br />
10-13. Counter Readout Location . . . . . . . . . . . . . . . . . . lo-38<br />
10-14. Analog Bus Node 18 . . . . . . . . . . . . . . . . . . . . . 10-39<br />
10-15. Analog Bus Node 20 . . . . . . . . . . . . . . . . . . . . . lo-40<br />
10-16. Analog Bus Node 23 . . . . . . . . . . . . . . . . . . . . . 1041<br />
10-17. Analog Bus Node 29 . . . . . . . . . . . . . . . . . . . . . 1044<br />
10-18. Analog Bus Node 30 . . . . . . . . . . . . . . . . . . . . . 1045<br />
10-19. Location of Firmware Revision Information on Display . . . . . 1047<br />
11-l. Standard Connections for Fuli Two-Port Error-Correction . . . 11-4<br />
11-2. ‘ljpical EDF/EDR without and with Cables . . . . . . . . . . 11-11<br />
Contents-20
11-3. Typical ESF/ESR without and with Cables . . . . . . . . . . .<br />
114. Typical ERF/ERR without and with Cables . . . . . . . . . .<br />
11-5. Typical EXFLEXR with 10 Hz Bandwidth and with 3 kHz<br />
Bandwidth . . . . . . . . . . . . . . . . . . . . . . . .<br />
11-6. Typical ELFLELR . . . . . . . . . . . . . . . . . . . . . .<br />
11-7. Typical ETFLETR . . . . . . . . . . . . . . . . . . . . . .<br />
12-1. Simplified Block Diagram of the <strong>Network</strong> <strong>Analyzer</strong> System . . .<br />
12-2. Power Supply Functional Group, Simplified Block Diagram . . .<br />
12-3. Digital Control Group, Simplified Block Diagram . . . . . . . .<br />
12-4. Low Band Operation of the Source . . . . . . . . . . . . . .<br />
12-5. High Band Operation of the Source . . . . . . . . . . . . . .<br />
12-6. Harmonic Analysis . . . . . . . . . . . . . . . . . . . . . .<br />
12-7. External Source Mode . . . . . . . . . . . . . . . . . . . .<br />
12-8. Tuned Receiver Mode . . . . . . . . . . . . . . . . . . . .<br />
12-9. Simplified Block Diagram of the Built-in Test Set . . . . . . . .<br />
12-10. Receiver Functional Group, Simplified Block Diagram . . . . .<br />
13-1. Module Exchange Procedure . . . . . . . . . . . . . . . . .<br />
11-12<br />
11-13<br />
11-14<br />
11-15<br />
11-16<br />
12-2<br />
12-5<br />
12-9<br />
12-17<br />
12-20<br />
12-23<br />
12-24<br />
12-25<br />
12-27<br />
12-28<br />
13-4<br />
Contents-21
Tables<br />
l-l. Required Tools . . . . . . . . . . . . . . . . . . . . . . . . l-l<br />
l-2. <strong>Service</strong> Test Equipment . . . . . . . . . . . . . . . . . . . l-2<br />
l-3. Connector Care Quick Reference . . . . . . . . . . . . . . . l-6<br />
2-l. Magnitude Dynamic Accuracy Calculations . . . . . . . . . . 2-79<br />
3-l. Related <strong>Service</strong> Procedures . . . . . . . . . . . . . . . . . . 3-2<br />
3-2. PEEK/POKE Addresses . . . . . . . . . . . . . . . . . . . . 3-60<br />
5-l. A8 Post Regulator Test Point Voltages . . . . . . . . . . . . . 5-6<br />
5-2. Output Voltages . . . . . . . . . . . . . . . . . . . . . . . 5-10<br />
5-3. Recommended Order for RemovaYDiscoMection . . . . . . . . 5-12<br />
5-4. Recommended Order for RemovaVDiscoMection . . . . . . . . 5-18<br />
6-l. Front Panel Key Codes . . . . . . . . . . . . . . . . . . . . 6-14<br />
6-2. Internal Diagnostic Test with Commentary . . . . . . . . . . . 6-18<br />
7-l. Output Frequency in SRC Tune Mode . . . . . . . . . . . . . 7-8<br />
7-2. Analog Bus Check of Reference Frequencies . . . . . . . . . . 7-13<br />
7-3. Al2 Reference Frequencies . . . . . . . . . . . . . . . . . . 7-15<br />
7-4. AlX-Related Digitd Control SiiaIs . . . . . . . . . . . . . . 7-23<br />
7-5. VCO Range Check Frequencies . . . . . . . . . . . . . . . . 7-25<br />
7-6. A14to-A13 Digital Control Siiai Locations . . . . . . . . . . 7-30<br />
7-7. 1st IF Waveform Settings . . . . . . . . . . . . . . . . . . . 7-35<br />
7-8. All Input Signals . . . . . . . . . . . . . . . . . . . . . . 7-36<br />
8-l. SiiaIs Required for A10 Assembly Operation . . . . . . . . . 8-9<br />
8-2. 2nd IF (4 kHz) Siiai Locations . . . . . . . . . . . . . . . . 8-11<br />
8-3. 2nd LO Locations . . . . . . . . . . . . . . . . . . . . . . 8-14<br />
9-l. Components Related to Specific Error Terms . . . . . . . . . . 94<br />
10-l. Test status Terms . . . . . . . . . . . . . . . . . . . . . . 10-4<br />
11-l. Calibration Coefficient Terms and Tests . . . . . . . . . . . . 11-7<br />
1 l-2. Uncorrected System Performance . . . . . . . . . . . . . . . 11-9<br />
12-1. Super Low Band Subsweep Frequencies . . . . . . . . . . . . 12-15<br />
12-2. Low Band Subsweep Frequencies . . . . . . . . . . . . . . . 12-18<br />
12-3. High Band Subsweep Frequencies . . . . . . . . . . . . . . . 12-21<br />
12-4. Mixer Frequencies . . . . . . . . . . . . . . . . . . . . . . 12-30<br />
13-1. Reference Designations, Abbreviations, and Options . . . . . . 1348<br />
14-1. Related <strong>Service</strong> Procedures . . . . . . . . . . . . . . . . . . 1462<br />
Contents-22
<strong>Service</strong> Equipment and <strong>Analyzer</strong> Options<br />
‘lhble of <strong>Service</strong> Test Equipment<br />
‘Ihble l-l. Required ‘Idols<br />
T-8, T-10, T-15, T-20, and T-25 TORX screwdrivers<br />
Flat-blade screwdrivers-small, medium, and large<br />
5/164nch open-end wrench (for SMA nuts)<br />
2-mm extended bit allen wrench<br />
3/16, 5/16, and 9/16-&h hex nut drivers<br />
5/164nch open-end torque wrench (set to 10 in-lb)<br />
2.5~mm hex-key driver<br />
Non-conductive and non-ferrous adjustment tool<br />
Needle-nose pliers<br />
Tweezers<br />
Antistatic work mat with wrist-strap<br />
1<br />
<strong>Service</strong> Equipment and <strong>Analyzer</strong> Options l-1
‘able 1-2. <strong>Service</strong> lkst Equipment<br />
llequired Critical J&commended Use*<br />
Equipment specmcatioM Model<br />
Spectrum <strong>Analyzer</strong> Freq. Accuracy f7 Bz <strong>HP</strong> 86633 A, T<br />
Spectrum <strong>Analyzer</strong> BP 8696E P<br />
Frequency Counter Frequency: 300 kB2 - 3 GBz (0 GBz BP 6364B/SlB/62B P<br />
for Option 006)<br />
Synthesized Sweeper Idaxhnum spuriomr input: < -30 dBc <strong>HP</strong> 8362OA P<br />
Residual FM: 60 dB @ 2.06 Bz and pamband that<br />
includes 803 IdBz<br />
BP P/N Q136-0198 A<br />
No substitute <strong>HP</strong> 8496A Opt. 001, Bl8 P
Eesnired<br />
Equipment<br />
Attenuators (tied):<br />
Attenuators (tied):<br />
Power splitter<br />
MinhnumLossPad<br />
Adapter<br />
AdaPt= (2)<br />
Adapter<br />
Adapter<br />
Adapter<br />
Adapter<br />
Adapter<br />
Adapter<br />
Adapter<br />
RF Cable (2 each)<br />
RF Cable Bet<br />
RF+ Cable<br />
RF Cable<br />
RF Cable<br />
RF Cable Bet<br />
<strong>HP</strong>-El Cable<br />
Coax Cable<br />
coax cable<br />
8 P - Performance lbst9<br />
A - mtauent<br />
T - Troubleshooting<br />
able l-2. <strong>Service</strong> ‘l&t Equipment (2 of 3)<br />
Critld<br />
spedficstions<br />
l&tum loss: >s2 dB APG7 20 dB (2)<br />
Type-N 20 cm (2)<br />
Z-Way, 500<br />
Type-N, 6OU to 76Q<br />
APGI to Type-N (f)<br />
APG7 to Type-N (m)<br />
APG7 to 3.6 nun (m)<br />
APG7 to 3.6 nun (f)<br />
BNC to Alligator Clip<br />
APGS.6 (m) to Type-N (f)<br />
APGS.6 Q to Type-N Q<br />
BNC (m) to Type-N (f)<br />
M-N Q to Type-N Q<br />
24-inch, APG7<br />
APG7, 6ou<br />
24~inch, APG7, 6OQ (2)<br />
24-inch, Type-N, 7W (2)<br />
24-inch, Type-N, 600 (3)<br />
‘be-N, LOU<br />
BNC<br />
BNC (m) to BNC (m), 600<br />
Eecvmmended<br />
Model<br />
l-lP 8402A Opt. 020<br />
<strong>HP</strong> 84QlA Opt. 020<br />
BP 11667A<br />
<strong>HP</strong> 11862B<br />
ElP 11624A<br />
EIP 11626A<br />
ElP P/N 126@1746<br />
<strong>HP</strong> P/N 1260-1747<br />
ElP P/N 8120-1292<br />
la P/N l26@1760<br />
El’F’ P/N 1260-1746<br />
HF’ PIN 1260-1477<br />
<strong>HP</strong> P/N 1260-0777<br />
<strong>HP</strong> P/N 812Ck4770<br />
BF’ 11867D<br />
HF’ P/N 812G4770<br />
<strong>HP</strong> P/N 8120-2408<br />
BP P/N 8120-4781<br />
<strong>HP</strong> 11861B<br />
<strong>HP</strong> 10833A/B/t/D<br />
BP P/N 8l20-1840<br />
<strong>HP</strong> 106OSA<br />
CT<br />
P, T<br />
P, T<br />
P, T A<br />
A, P<br />
A, P<br />
A, P<br />
A, P<br />
A<br />
A, P<br />
A, P<br />
P<br />
P<br />
A, P<br />
A, P<br />
P, A<br />
A, P<br />
A, P<br />
P, A<br />
A<br />
A<br />
A<br />
Use*<br />
<strong>Service</strong> Equipment and <strong>Analyzer</strong> Options l-3
pestid<br />
Equipment<br />
Antistatic wrist Btrap<br />
Antistatic wrist strap cord<br />
Gtatic-control lbble Mat and<br />
Earth Ground Wire<br />
Non-Met&c Adjustment lbol<br />
BNC Alligator Clip Adapter<br />
BNGto-BNC Cable<br />
8 P - Performance lb&s<br />
A - A&ustment<br />
T - Troubleshooting<br />
able 1-2. <strong>Service</strong> ‘l&t Equipment (3 of 3)<br />
14 <strong>Service</strong> Equipment and <strong>Analyzer</strong> Options<br />
critical<br />
speciflcatioM<br />
Recommended Use*<br />
Model<br />
BP P/N 0so&1367 A, T P<br />
<strong>HP</strong> P/N 030&0080 A, T P<br />
<strong>HP</strong> P/N 03oo-o707 A, T P<br />
<strong>HP</strong>P/N8830-0024 A<br />
BF’ P/N 8120-1292 A<br />
<strong>HP</strong> P/N 81213l&IO A
Principles of Microwave Connector Care<br />
Proper connector care and connection techniques are critical for accurate,<br />
repeatable measurements.<br />
Refer to the calibration kit documentation for connector care information.<br />
Prior to making connections to the network analyzer, carefully review the<br />
information about inspecting, cleaning, and gaging connectors.<br />
Having good connector care and connection techniques extends the life of these<br />
devices. In addition, you obtain the most accurate measurements.<br />
This type of information is typically located in Chapter 3 of the calibration kit<br />
manuals<br />
For additional connector care instruction, contact your local Hewlett-Packard<br />
Sales and <strong>Service</strong> Office about course numbers <strong>HP</strong> 8505OA + 24A and<br />
<strong>HP</strong> 8505OA + 24D.<br />
See the following table for quick reference tips about connector care.<br />
<strong>Service</strong> Equipment and <strong>Analyzer</strong> Options l-5
‘Ihble 1-3. Connector Care Quick Reference<br />
HandUng and Storage<br />
Do Do Not<br />
Keep connectors clean Touch mating-plane surfaces<br />
Extend sleeve or connector nut Set connectors contact-end down<br />
Use plastic end-caps during storage<br />
vit3uaI Inspection<br />
Do I Do Not<br />
Inspect all connectors carefully Use a damaged connector-ever<br />
Look for metal particles, scratches, and dents<br />
Do<br />
‘lYy compressed air first<br />
Use isopropyl alcohol<br />
Clean connector threads<br />
connector CI-<br />
Do Not<br />
Use any abrasives<br />
Get liquid into plastic support beads<br />
Gaging Connectors<br />
Do<br />
Do Not<br />
Clean and zero the gage before use Use an out-of-spec connector<br />
Use the correct gage type<br />
Use correct end of calibration block<br />
Gage all connectora before first ufx<br />
Making conueetions<br />
Do<br />
Do Not<br />
Align connectors carefully Apply bending force to connection<br />
Make preliminary connection lightly Over tighten preliminary connection<br />
Turn only the connector nut<br />
Twifrt or screw any connection<br />
Use a torque wrench for final connect Tighten past torque wrench ‘break” point<br />
l-6 <strong>Service</strong> Equipment and <strong>Analyzer</strong> Options<br />
I
<strong>Analyzer</strong> Options Available<br />
Option lD5, High Stability Frequency Reference<br />
This option offers f0.05 ppm temperature stability from 0 to 60° C<br />
(referenced to 25O C).<br />
Option 002, Harmonic Mode<br />
This option provides measurement of second or third harmonics of the test<br />
device’s fundamental output signal. Frequency and power sweep are supported<br />
in this mode. Harmonic frequencies can be measured up to the maxinuun<br />
frequency of the receiver. However, the fundamental frequency may not be<br />
lower than 16 MHz.<br />
Option 006, 6 GHz Operation<br />
This option extends the maximurn source and receiver frequency of the analyzer<br />
to 6 GHz.<br />
Option 010, Time Domain<br />
This option displays the time domain response of a network by computing<br />
the inverse Fourier transform of the frequency domain response. It shows<br />
the response of a test device as a function of time or distance. Displaying the<br />
reflection coefficient of a network versus time determines the magnitude and<br />
location of each discontinuity. Displaying the transmission coefficient of a<br />
network versus time determines the characteristics of individual transmission<br />
paths Time domain operation retains all accuracy inherent with the correction<br />
that is active in of such devices as SAW filters, SAW delay lines, RF cables, and<br />
RF antennas.<br />
Option 011, Receiver Configuration<br />
This option allows front panel access to the R, A, and B samplers and receivers.<br />
The transfer switch, couplers, and bias tees have been removed. Therefore,<br />
external accessories are required to make most measurements<br />
<strong>Service</strong> Equipment and <strong>Analyzer</strong> Options l-7
Option 075, 7563 Impedance<br />
This option offers 75 ohm impedance bridges with type-N test port connectors.<br />
Option lDT, Delete Display<br />
This option removes the built-in flat panel display, allowing measurement results<br />
to be viewed with an external VGA monitor only.<br />
Option EM, Rack Mount Flange Kit Without Handles<br />
This option is a rack mount kit containing a pair of flanges and the necessary<br />
hardware to mount the instrument, with handles detached, in an equipment<br />
rack with 482.6 mm (19 inches) horizontal spacing.<br />
Option lCP, Rack Mount Flange Kit With Handles<br />
This option is a rack mount kit containing a pair of flanges and the necessary<br />
hardware to mount the instrument with handles attached in an equipment rack<br />
with 482.6 mm (19 inches) spacing.<br />
l-8 <strong>Service</strong> Equipment and <strong>Analyzer</strong> Options
<strong>Service</strong> and Support Options<br />
The analyzer automatically includes a three-year warranty for repair at a<br />
Hewlett-Packard facility.<br />
The following service and support options are also available. Contact your local<br />
sales or service office.<br />
Option W32<br />
This option provides three years of return to <strong>HP</strong> calibration service.<br />
Option W34<br />
This option provides three years of return to <strong>HP</strong> Standards Compliant<br />
Calibration.<br />
<strong>Service</strong> Equipment and <strong>Analyzer</strong> Options 1-9
System Verification and<br />
Performance lksts<br />
The performance of the <strong>HP</strong> <strong>8753E</strong> network analyzer is specified in two ways:<br />
Specifies warranted performance of the wu?asurm system when making<br />
error-corrected S-parameter measurements. The measurement system<br />
includes the analyzer, test cables, and calibration kit. The System Verification<br />
Procedure is used to conti performance of the measurement system to the<br />
System Specilications.<br />
Specifies the network analyzer’s output and input behavior and its<br />
uncorrected measurement port characteristics. Performance tests are used to<br />
confirm performance of the analyzer to the Instrument Specifications.<br />
System Specifications<br />
System Specifications, also called Measurement Port Specifications, are<br />
described in Chapter 7 of the <strong>HP</strong> <strong>8753E</strong> User’s cuides. They specify warranted<br />
performance of the entire TTMXISU~ tqpctem when making error-corrected<br />
S-parameter measurements The measurement system includes the analyzer, test<br />
cables, and calibration kit. System Specifications are expressed in two ways:<br />
� graphs of measurement uncertainty versus reflection and transmission<br />
coefficients<br />
� residual errors of the measurement system-the corrected Measurement Port<br />
Characteristics<br />
System Specifications, conhrmed by the System Verification Procedure, are<br />
applicable when the measurement system is used to make error-corrected<br />
S-parameter measurements<br />
2<br />
System Verification and 2-l<br />
Performance Tests
Instrument Specifications<br />
Instrument specifications comprise the following sections and tables in Chapter<br />
7, “Specifications and Measurement Uncertainties, n of the <strong>HP</strong> <strong>8753E</strong> User’s<br />
<strong>Guide</strong>:<br />
w all specifications in the section “Instrument Specifications”<br />
w ‘lhble 7-3 “Measurement Port Characteristics (uncorrected) for <strong>HP</strong> <strong>8753E</strong> (5OQ)<br />
with 7-mm ‘l&t Ports”<br />
w ‘lhble 7-7 “Measurement Port Characteristics (uncorrected) for <strong>HP</strong> <strong>8753E</strong> (75Q)<br />
with 7-mm Test Ports”<br />
These specifications apply when the analyzer is used to make measurements<br />
other than error-corrected S-parameter measurements An example would be<br />
the measurement of amplifier gain compression. In such cases, the analyzer’s<br />
output and input behavior-such as source power, receiver accuracy, and<br />
receiver linearity-are important and are covered by Instrument Specifications.<br />
System Veriffication Procedure<br />
The System Verillcation Procedure tests the network analyzer measurement<br />
system, as dellned above, against the System Specillcations. If conllrmation<br />
is successful, the measurement system is capable of making S-parameter<br />
measurements to the accuracy specified by the graphs of measurement<br />
uncertainty. An outline of the System Verification Procedure follows:<br />
w The measurement system is calibrated with the calibration kit to be used<br />
for future measurements The measurement system’s systematic errors are<br />
determined by this procedure.<br />
� The S-parameters of verification-kit test-devices are measured with error<br />
correction applied.<br />
� These measurements are compared to measurement data stored on a unique,<br />
serial-numbered data disk included with the verification kit.<br />
� The measurement system passes the System Verification Procedure if the<br />
measurements of the test devices differ from the measurement data on<br />
the data disk by less than specified test limits. The test limits account for<br />
the specified accuracy of the measurement system and the measurement<br />
uncertainties attributed to the stored data for the test devices.<br />
2-2 System Verification and<br />
Performance Tests
Note Calibration kits are different from verification kits. Culibrution<br />
kits are used to determine the systematic errors of a network<br />
analyzer measurement system. Vmttin kits are used to<br />
conErm system speciEcations and are not used to generate<br />
error-correction. For example, the <strong>HP</strong> 85031B is a 7-mm<br />
calibration kit, but the <strong>HP</strong> 85029B is a 7-mm verification kit.<br />
Performance Wsts<br />
Performance tests are used to confirm analyzer performance against the<br />
Instrument SpeciEcations. If conErmation is successful, the analyzer meets the<br />
Instrument SpeciEcations as deEned above. If the calibration kit to be used for<br />
measurements is also certiEed, successful completion of the Performance Tests<br />
also ensures that the network analyzer measurement system meets the System<br />
Specifications.<br />
How to Confirm Performance to System Specifications<br />
w Complete the System VeriEcation Procedure in this chapter using a certiEed<br />
verification kit, or<br />
� Complete all of the performance tests and certify (or re-certify) the<br />
calibration kit to be used for future measurements. This alternative verifies<br />
both the System Specifications and the Instrument Specifications for the<br />
analyzer.<br />
How to Confirm Performance to Instrument Specifkations<br />
� Complete the Performance Tests<br />
System Verification and 2-3<br />
Performance Teete
Certificate of Calibration<br />
Hewlett-Packard will issue a Certificate of Calibration for the product upon<br />
successful completion of System VeriEcation or completion of the Performance<br />
Tests. The Certificate of Calibration will include a S@~T?Z Attachment if the<br />
System Verification Procedure is used to confirm the System SpeciEcations.<br />
If the Performance Tests are used to conErm Instrument Specifications, the<br />
CertiEcate of Calibration will not include a System Attachment. The equipment<br />
and measurement standards used for the tests must be certiEed and must be<br />
traceable to recognized standards.<br />
Note If you have a measurement application that does not use all of<br />
the measurement capabilities of the analyzer, you may ask your<br />
local Hewlett-Packard Customer <strong>Service</strong> Center to verify only a<br />
subset of the speciEcations. However, this creates the possibility<br />
of making inaccurate measurements if you then use the analyzer<br />
in an application requiring additional capabilities.<br />
24 System Verification and<br />
Performance Tests
Sections in This Chapter<br />
� System Verification<br />
� Performance lksts<br />
1. Test Port Output F’requency Range and Accuracy<br />
2. External Source Mode kequency Range<br />
3. Test Port Output Power Accuracy<br />
4. Test Port Output Power Range and Linearity<br />
5. Minimum R Channel Level<br />
6. Test Port Input Noise Floor Level<br />
7. Test Port Input Frequency Response<br />
8. Test Port Crosstalk<br />
9. Calibration Coefficients<br />
10. System Trace Noise (only for <strong>Analyzer</strong>s without Option 006)<br />
11. System Trace Noise (only for <strong>Analyzer</strong>s with Option 006)<br />
12. Test Port Input Impedance<br />
13. Test Port Receiver Magnitude Dynamic Accuracy<br />
14. Test Port Receiver Magnitude Compression<br />
15. Test Port Receiver Phase Compression<br />
16. Test Port Output/Input Harmonics (Option 002 <strong>Analyzer</strong>s ������� Option<br />
006 only)<br />
17. Test Port Output/Input Harmonics (Option 002 <strong>Analyzer</strong>s with Option 006<br />
OdY)<br />
18. Test Port Output Harmonics (<strong>Analyzer</strong>s without Option 002)<br />
System Verification and 2-5<br />
Performance Tests
Performance ‘I&t Record<br />
Find and use the appropriate “Performance ‘I&t Record” in the following<br />
subchapters:<br />
� Performance Test Record for 30 kHz to 3 GHz<br />
� Performance Test Record for 30 kHz to 6 GHz<br />
2-6 System Verification and<br />
Performance Tests
System Verification Cycle and Kit Re-certification<br />
Hewlett-Packard recommends that you verify your network analyzer<br />
measurement system every six months. Hewlett-Packard also suggests that<br />
you get your verification kit re-certified annually. Refer to <strong>HP</strong> 85029B r-mm<br />
V’ttin Kit Operating and Seruice Manual for more information.<br />
Note The system veriEcation procedures can also apply to analyzers<br />
with Option 075 (75 ohm analyzers) if minimum loss pads and<br />
type-N (m) to APC-7 adapters are used.<br />
Check to see how the veriEcation kit floppy disk is labeled:<br />
� If your veriEcation disk is labeled <strong>HP</strong> 8753D Verification Data Disk, or<br />
<strong>HP</strong> 8753D& <strong>HP</strong> <strong>8753E</strong>VerificationDataDisk, you may proceed with the<br />
system verification.<br />
� If your veriEcation disk is not labeled as indicated above, you may send<br />
your <strong>HP</strong> 85029B 7-mm veriEcation kit to the nearest service center for<br />
recertiEcation, which includes a data disk that you can use with the<br />
<strong>HP</strong> <strong>8753E</strong>.<br />
System Verification and 2-7<br />
Performance Teete
<strong>HP</strong> <strong>8753E</strong> System Verification<br />
Equipment Required<br />
Calibration Kit, 7-mm ................................................ <strong>HP</strong> 85031B<br />
Verification Kit, 7-mm ............................................... .<strong>HP</strong> 85029B<br />
Test Port Extension Cable Set, 7-mm ................................ <strong>HP</strong> 11857D<br />
Printer ........................................... <strong>HP</strong> ThinkJet/DeskJet/LaserJet<br />
Additional Equipment Required for Option 075 <strong>Analyzer</strong>s<br />
Minimum Loss Pad (2), 50 Q to 75 Q . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 11852B<br />
Adapter (2), APC-7 to Type-N (m) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 11525A<br />
Anulgzer warmup time: 1 hour<br />
This system veriEcation consists of three separate procedures:<br />
1. Initialization<br />
2. Measurement Calibration<br />
3. Device Verification<br />
2-9 System Verification and<br />
Performance Tests
Initialization<br />
1. Clear all internal memory.<br />
Caution This will erase all instrument states that may be stored in<br />
internal memory.<br />
Perform the following steps to save any instrument states that<br />
are stored in internal memory to a floppy disk.<br />
d. If the instrument state file was not saved to disk with the<br />
same name that it had while in internal memory, you may<br />
wish to rename the tie.<br />
Press ~~.~~:~~~~~~~~~~ .~~~~~~~~ enter the de&e-j<br />
./ .:. ..:;... . ..y<br />
name, and press ~##,3@8J.<br />
_........................<br />
e. Repeat steps a through d for each instrument state that you<br />
wish to save.<br />
To<br />
,. _ _ ,. _<br />
clear all iM!rnal memory, press (s) ,~~~~~.~~~~ .._..._.... 3JSlJKJ~j3@<br />
.._ -..-.._- .._ - ._...............<br />
._...__........ :jgj##$: - .._.. -- lJmm@ .._._.... - . .-.......<br />
. . . . . . . _.. LPreset).<br />
System Verification and 2-9<br />
Performance Tests
2.<br />
3.<br />
4.<br />
5.<br />
6.<br />
Connect the equipment as shown in Figure 2-l. Let the analyzer warm up<br />
for one hour<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
Figure 2-1. System Verification ‘l&t Setup<br />
While the equipment is warming up, review the “Connector Care Quick<br />
Reference” information in Chapter 1. Good connections and clean,<br />
undamaged connectors are criticaI for accurate measurement results.<br />
Insert the verification kit disk into the analyzer disk drive.<br />
Note If you switch on the record function, you CAiWOT switch it off<br />
during the verification procedure.<br />
7. Position the paper in the printer so that priuting starts at the top of the<br />
page.<br />
2-10 System Verification and<br />
Performance Tests
8. If you have difficulty with the printer:<br />
� If the interface on your printer is <strong>HP</strong>-IB, verify that the printer address is<br />
set to 1 (or change the setting in the analyzer to match the printer).<br />
� If the interface on your printer is serial or parallel, be sure that you<br />
selected the printer port and the printer type correctly (refer to the<br />
<strong>HP</strong> <strong>8753E</strong>Netuwrk Anulgzer User’s <strong>Guide</strong> for more information on how to<br />
perform these tasks).<br />
10. The analyzer displays Sys Ver Init DONE; the initialization procedure is<br />
complete.<br />
Caution Do NOT press (Preset or recall another instrument state. You<br />
must use the instrument state that you loaded during the<br />
initialization procedure.<br />
Measurement Calibration<br />
14. Connect the “open” end of the open/short combination (supplied in the<br />
calibration kit) to reference test port 1, as shown in Figure 2-2.<br />
System Verifcationand 2-11<br />
PerformanceTests
REFERENCE TEST<br />
PORT 1<br />
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
- REFERENCE TEST<br />
PORT 2<br />
Figure 2-2. Connections for Measurement Calibration Standards<br />
16. When the analyzer finishes measuring the standard, connect the “short” end<br />
of the open/short combination to reference test port 1.<br />
18. When the analyzer hnishes measuring the standard, connect the 50 ohm<br />
termination (supplied in the calibration kit) to reference test port 1.<br />
19. Pres ~~~~~~~~<br />
* .... ...... .<br />
20. When the analyzer 6nishes measuring the standard, connect the “open” end<br />
of the open/short combination to reference test port 2.<br />
21. mess ~~~~~~~~~.<br />
-.._........" ..:.-: ~.~.~.~.~.~.~..-~..~.~..~:.~.~::~<br />
22. When the analyzer hnishes measuring the standard, connect the “short” end<br />
of the open/short combination to reference test port 2.<br />
24. When the analyzer Gnashes measuring the standard, connect the 50 ohm<br />
termination to reference test port 2.<br />
25. press ~~~~~~~~<br />
~.:.:.~.:...~.~:.:.:.~.:.~~.“‘-~ . ::,_ . :.:.~.~:.:.~.~.:.:.:.~~~.~.:.:.:.:.~ -<br />
2-l 2 System Verification and<br />
Performance Tests<br />
sg62e
The analyzer briefly displays COMPUTING CAL COEFFICIENTS.<br />
27. Connect the test port cables as shown Figure 2-3.<br />
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
-PORT 1<br />
H P 11857D<br />
EXTENSION CABLE SET<br />
Figure 2-3. Transmission Calibration Setup<br />
28. Press .~~~~~~~~~~ ~~~~~~~~~~~~:.<br />
.,.<br />
..~......................-..........~~~~~ ii -.:: :....... . . . ... . . . ..~.......... ._....A. .. . . ~.c.~.~.~.. . . . . . . il_.^i...ii ..__G_ ..:. . . ..A u . . . . . . . . / . . . . i...........~...~......~ ..___............<br />
29. mess ~,~~~~~~~~~;,.~~.<br />
_i \. ,.,.,..:::,<br />
.,. ; .,. _<br />
.._...............__._.I.~...~.... :::.L..iL.: /:...<br />
3(-J. Press (-, ~~~~~~~~ ,,, g,:qs= ~~~~-,:,~~~~. ~~;...y:c+y < ..;.., ,,, ; ,; . . . ..:....:..:.:.:.<br />
. . ~~~ ~~~~~~~~, to<br />
e i . . . . . . . . s . . . . . . 2 . . . . . . A....... . . . . . . . . . . . . . . . . . .._.__........_.__......~..........~. . . . . . .<br />
i.vLv..... ..~ . .._.. . . ~L......~.........i .A.. . . . L . . ..A . ~........,...........................-......~.........-..~.i.:::.i<br />
. .<br />
save the calibration into the analyzer internal memory.<br />
,,,.,.,~,~,., :...::.:.y ..:.:.: . . . ..y .) ...<br />
3 1. men the a&rzr mhes saving the instrument state, prt?SS -@%@j@; @gBg<br />
~~~~~~~~~.<br />
,.,., ...i . . . . . . . . . . i .:: i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..__.._...... - .._._....._.....<br />
~........... A.<br />
System Verification and 2-13<br />
Performance Tests
Device Verification<br />
33. At the prompt, connect the 20 dI3 attenuator (supplied in the verification<br />
kit) as shown in Figure 2-4.<br />
,..<br />
If you switched OFF the record function, you have to press ~~~~~<br />
.., ,.... ,...................<br />
after each S-parameter measurement.<br />
If you switched ON the record function, the analyzer measures all<br />
S-parameters (magnitude and phase) without pausing. Also, the analyzer<br />
only displays and prints the PASS/FAIL information for the S-parameter<br />
measurements that are valid for system verification.<br />
<strong>HP</strong> R753F<br />
. . . -. ---<br />
NETWORK ANALYZER<br />
Figure 2-4. Connections for the 20 dB Verification Device<br />
35. When the analyzer fmishes all the measurements, connect the 50 dB<br />
attenuator (supplied in the vetication kit), as shown in F’igure 2-5.<br />
2-14 System Verification and<br />
Performance Tests<br />
/
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
“ERlFlCATlON DEVICE<br />
Figure 2-5. Connections for the 50 dB Verifkation Device<br />
37. When all measurements are complete, replace the verification device with<br />
the verification mismatch, as shown in Figure 2-6. Be sure that you connect<br />
Port A of the verification mismatch to reference test port 1.<br />
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
Figure 2-6. Mismatch Device Verification Setup 1<br />
39. When the analyzer finishes all the measurements, connect the mismatch<br />
verification device, as shown in Figure 2-7. Notice that Port B is now<br />
connected to reference test port 1.<br />
T2<br />
sg65e<br />
sg66e<br />
Syetem Verification and 2-l 5<br />
Performance Tests
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
PORT 1<br />
PORT 2<br />
7<br />
(rORT<br />
VERIFICATION MISMATCH<br />
Figure 2-7. Mismatch Device Verification Setup 2<br />
:.:.:.. ;:
In Case of Difiblty<br />
1. Inspect alI connections.<br />
Caution Do NOT disconnect the cables from the analyzer test ports.<br />
Doing so WILL lNkYLU?B the calibration that you have done<br />
earlier.<br />
2.<br />
3.<br />
4.<br />
5.<br />
Press [EJ ‘Save/Recall, +&g@$$g&K. ~~~~~~~~~ f&@g. using the<br />
_. - i: _... >u i - __,..... ..:.:.: .._ .: ..:. :... i.. . . . . . . . . . . . . ..,...,.... . . . . . . . . . . . . . . . . . . . . . ._... .: .._... .:::: ..,...... A......::::::: .:: -.:<br />
front panel knob, highlight the,,title of the full 2-Port calibration that you<br />
... ..,.; ,.,,.,.,.,: ;:<br />
have done earlier, then press ~~~~~~~~.<br />
Repeat the “Device Verification” procedure.<br />
If the analyzer still fails the test, check the measurement calibration as<br />
follows:<br />
a. Press [preset).<br />
d. Connect the short to reference test port 1.<br />
g. Check that the trace response is 0.00 f 0.05 dB.<br />
h. Disconnect the short and connect it to reference test port 2.<br />
j. Check that the trace response is 0.00 f 0.05 dD.<br />
k. If any of the trace responses are out of the specified limits, repeat the<br />
“Measurement Calibration” and “Device Verification” procedures.<br />
Refer to Chapter 4, “Start Troubleshooting Here,” for more troubleshooting<br />
information.<br />
System Verification and 2-17<br />
PerfonnanEe Tests
1. Test Port Output Frequency Range and Accuracy<br />
Specifications<br />
Required Equipment<br />
Frequency Range Frequency Accuracy1<br />
30 kHz to 3 GHz f10 ppm<br />
1 3GHzto6GHz2 1 &lo ppm I<br />
1 At 25O C f5* C.<br />
2 Only for analyzers with Option 006 - 30 kHz to<br />
6GIIzrange.<br />
kequency Counter (30 kHz to 500 MHz) . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 5350B/51B/52B<br />
F’requency Counter (500 MHz to 6 GHz) . . . . . . . . . . . . . . . . . . . . .<strong>HP</strong> 5350B/51B/52B<br />
Cable, 500 Type-N, 24-inch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<strong>HP</strong> P/N 81204781<br />
Adapter, APC-3.5 (f) to Type-N (f) . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 1250-1745<br />
Adapter, APC-7 to Type-N (f) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 11524A<br />
Adapter, Type-N (f) to BNC (m) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 1250-1477<br />
Additional equipment needed for an <strong>HP</strong> <strong>8753E</strong> with Option 075<br />
Minimum Loss Pad, 5OQ to 75Q . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 11852B<br />
Aruzlgzer warmup time: 30 minutes<br />
Perform this test to verify the frequency accuracy of the <strong>HP</strong> <strong>8753E</strong> over its<br />
entire operating frequency range.<br />
2-l 8 Syetem Veriiication and<br />
Performance Tests
1. Connect the equipment as shown in Figure 2-8.<br />
* DIRECT (:ONNECTlON<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
WITH OPTION 075<br />
PORT1 *<br />
PI<br />
5on 17s<br />
MIMIMUM<br />
LOSS PAD<br />
5Ofl TYPE-N CABLE ASSEMBLY<br />
FREQUENCY COUNTER<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER FREQUENCY COUNTER<br />
ADAPTER<br />
w-3.5 (f)<br />
TO NPE-N(f)<br />
ADAPTER<br />
APC-3.5 (f)<br />
TO TYPE-N(f)<br />
Figure 2-8. lkst Port Output Frequency Range and Accuracy ‘I&t Setup<br />
2. Press (IFKGQ [Menu) t%Xmi$.<br />
3. Press 13oJ Ck/m) and write the frequency counter reading on the “Performance<br />
Test Record. n<br />
4. Repeat step 3 for each instrument frequency listed in the “Performance Test<br />
Record. n<br />
ig68e<br />
System Verification and 2-19<br />
Performance Tests
In Case of Difljiculty<br />
1. If any measured frequency is close to the specification limits, check the time<br />
base accuracy of the counter used.<br />
2. If the analyzer fails by a significant margin at all frequencies (especially if<br />
the deviation increases with frequency), the master time base probably needs<br />
adjustment. In this case, refer to the “Frequency Accuracy Adjustment”<br />
procedure, located in Chapter 3, “Adjustments and Correction Constants. ’<br />
The “Fractional-N Frequency Range Adjustment” also affects frequency<br />
accuracy.<br />
3. Refer to Chapter 7, “Source Troubleshooting,” for related troubleshooting<br />
information.<br />
2-20 System Veriication and<br />
Performance Tests
2. External Source Mode Frequency Range<br />
Specifications<br />
Equipment Required<br />
Frequency Range<br />
300 kHz to 3 GHz<br />
300 kHz to 6 GHzl<br />
1 Only for analyzers with<br />
OptionOO6- 3OkHzt.o<br />
6GHzrange.<br />
External Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 83620A<br />
Cable, APC-7, 24-inch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 8120-4779<br />
Adapter, APC-3.5 (f) to APC-7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 1250-1747<br />
Adapter, APC-3.5 (m) to APC-7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 1250-1746<br />
Aruzlgzer warmup time: 30 minutes<br />
Perform this test to verify that the analyzer’s reference channel, input R, is<br />
capable of phase locking to an external CW signal.<br />
1. On the external source, press [Presets Icw) LloJ (j-J [POWER LEVEL) m<br />
12o)(i~.<br />
2. Connect the equipment as shown in F’igure 2-9.<br />
System Verification and 2.21<br />
Performance Tests
* DRECT CONNECTION<br />
R CHANNEL IN *<br />
r ADAPTER<br />
TO WC-7<br />
P<br />
APC-3.5 (m)<br />
<strong>HP</strong> 83620A<br />
SYNTHESIZER<br />
\ CABLE APCG7 24 INCH J<br />
Figure 2-9. Exterml Source Mode Frequency Range lkst Setup<br />
5. Check to see if the analyzer is phase locking to the external CW signal:<br />
H If the analyzer displays any phase lock error messages, write “unlock” in<br />
the “Performance Test Record” for the set CW signal.<br />
sgE121e<br />
w If the analyzer does not display any phase lock error messages, write “lock”<br />
in the “Performance Test Record” for the set CW signal.<br />
6. On the external source, press m L20) [j].<br />
7. On the analyzer, press I2oJ m.<br />
8. Repeat step 5 through 7 for the other external source CW frequencies listed<br />
in the “Performance Test Record.”<br />
2-22 System Verification and<br />
Periormance Tests
In Case of Difkulty<br />
If the analyzer displayed any phase lock error messages:<br />
1. Be sure the external source power is set within 0 to -25 dBm.<br />
2. Make sure the analyzer’s “Ext Source Auto” feature is selected. In addition,<br />
verify that the analyzer is set to measure its input channel R.<br />
3. Verify that all connections are tight.<br />
System Veriication and 2-23<br />
Performance Tests
1.<br />
2.<br />
Zero and calibrate the power meter. For more information of how to perform<br />
this task, refer to the power meter operating manual.<br />
Connect the equipment as shown in Figure 2-10.<br />
ADAPTER APC-7<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
WITH OPTION 075<br />
POWER SENSOR<br />
<strong>HP</strong> 43BA<br />
Figure 2-10. Source Output Power Accuracy lkst Setup<br />
System Verification and 2-25<br />
Performance Tests
3. Press-.<br />
Note The factory preset test port power is 0 dBm.<br />
..;; . . . . . .<br />
4. Press m &IE;~.‘@@Z~~j (300_) (i$J. Set the calibration factor on the power<br />
meter for this CW frequency.<br />
5. Write the power meter reading on the “Performance Test Record.”<br />
6. Repeat steps 4 and 5 for each CW frequency listed in the “Performance Test<br />
Record.” For analyzers with Option 006, use the <strong>HP</strong> 8481A power sensor for<br />
all frequencies above 3 GHz.<br />
In Case of Difficulty<br />
. . . . . . ..~.~.~... :.::<br />
1. Be sure the source power is switched on. Press IMenu) ..A :$&@$. .vs.. ii i ..A... ::A%..;; Check<br />
the ~~~~~ softkey; “on” should be highlighted. Otherwise, press<br />
; :..,...,
4. Test Port Output Power Range and Linearity<br />
Specifications<br />
Required Equipment<br />
Power Range 1 Power Level Linearity1 1<br />
1 -15 to +5 dBm I f0.2 dB<br />
1+5to +10dBm21 f0.5 dB I<br />
+5 to +8 dBm3 I f0.5 dB<br />
1 Relative to 0 dBm output level.<br />
2 Applies to instruments not using Option 076.<br />
3 For Option 075 only.<br />
Power Meter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 437B/438A<br />
Power Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 8482A<br />
Adapter, APC-7 to Type-N (f) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 11524A<br />
Additional Required Equipment for <strong>Analyzer</strong>s with Option 006<br />
Power Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 8481A<br />
Additional Required Equipment for <strong>Analyzer</strong>s with Option 075<br />
Power Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 8483A Option HO3<br />
Analgzm warmup time: 1 hour<br />
Perform this test to verify the analyzer’s test port output power range and<br />
power level linearity at selected CW frequencies.<br />
System Verification and 2-27<br />
Performance Tests
1. Zero and calibrate the power meter. Refer to the power meter operating<br />
manual for more information on how to do this task.<br />
2. On the network analyzer, press (GJ LG_) ~~.~~~~~~ Isdo_) Lk/m. Set the<br />
power meter calibration factor for this CW frequency.<br />
3. Connect the equipment as shown in Figure 2-11.<br />
* DIRECT CONNECTION<br />
ADAPTER APC-7 to N(F)<br />
<strong>HP</strong> 8481A<br />
POWER SENSOR<br />
3 - 6GHz<br />
<strong>HP</strong> 0753E<br />
NETWORK ANALYZER<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
WITH OPTION 075<br />
PORT 2 P<br />
H P 8482A<br />
POWER SENSOR<br />
30KHz - 3GHz<br />
POWER SENSOR<br />
H P 438A<br />
H P 438A<br />
/<br />
sg61 le<br />
Figure 2-11. ‘l&t Port Output Power Range and Accuracy ‘Ikst Setup<br />
2-28 System Verification and<br />
Performance Tests
4. On the <strong>HP</strong> 438A, press (REL). This sets the current power level for relative<br />
power measurement.<br />
. . . . _ . . . . . .<br />
5. h the network maJyzer, press LMenu_] @@& ~~~~~~~~~~~ 1--15) a).<br />
. . . . . . . . . . . . . . . . . . . . . . . . . . . . ..~...~ ii .: . . . . .. . . . . . . . . . . . . . . . . . . . . . . .::::: /i............i .. . . . . . . . . .%___.__.......<br />
6. Write the power meter reading in the “Results Measured” column on the<br />
U Performance Test Record. ’<br />
7. Calculate the difference between the analyzer test port power (which<br />
appears on the analyzer’s display) and the power meter reading. Write the<br />
result in the “Power Level Linearity” column on the “Performance Test<br />
Record. n<br />
8. Repeat steps 5 through 7 for the other power levels listed in the<br />
“Performance Test Record. n<br />
9. After all required power levels have been measured, press @ Lxl) to reset<br />
power to 0 dRm.<br />
. . . / .<br />
.;... :.. /;.<br />
10. Press ~~~~~~: .._......_.._.__ - _........ @a.<br />
11. Set the power meter calibration factor for this CW frequency and press m<br />
to set the reference at this new frequency.<br />
12. Press m g&$&&Y L-15] Lxl).<br />
_........ .<br />
13. Write the power meter reading in the “Results Measured” column on the<br />
“Performance Test Record. n<br />
14. Calculate the difference between the analyzer test port power and the<br />
power meter reading. Write the result in the “Power Level Linearity”<br />
column of the “Performance Test Record.”<br />
15. Repeat steps 11 through 13 for the other power levels listed in the<br />
“Performance Test Record. n<br />
16. Repeat steps 9 through 13 for 6 GHz using 8481A sensor.<br />
In Case of Dii3culty<br />
1. Ensure that the power meter and power sensor(s) are operating to<br />
specifications. Be sure you set the power meter calibration factor for the CW<br />
frequency that you are testing.<br />
Syctem Verification and 2-29<br />
Performance Tests
2. Verify that there is power coming out of the analyzer’s test port 1. Be sure<br />
you did not accidentally switch off theCCCCmaIyzer’s internal source. If you did<br />
so, press 1Menu) &j#j@ ~~~~~~~.~~ ‘$Ep :.<br />
_....... - - -_..- .._........_....... ..u; .,........._ - -...<br />
3. Repeat this performance test.<br />
2-30 System Verification and<br />
Performance Tests
5. Minimum R Channel Level<br />
Specifications<br />
1 Frequency Range 1 Minimum B Channel Level 1<br />
1300kHzto3GHz 1 c-35 dBm I<br />
13GHzto6GHzl 1 c-30 dBm I<br />
1OnlyforanalyzerswithOption006-3OkHzto6GHz<br />
range.<br />
Required Equipment for 500 <strong>Analyzer</strong>s<br />
Adapter, APC-3.5 (m) to APC-7 . . . . . . . . . . . . . . . . . . . , . . . . . . . . . . <strong>HP</strong> P/N 1250-1746<br />
Cable, APC-7 24-inch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 8120-4779<br />
Required Equipment for 75 ohm <strong>Analyzer</strong>s (Option 075)<br />
Minimum Loss Pad, 5OQ to 75Q . . . . . , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 11852B<br />
Cable, 508 Type-N, 24-inch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<strong>HP</strong> P/N 8120-4781<br />
Adapter, APC-3.5 (m) to Type-N (f) . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 1250-1750<br />
An&m warmup time: 1 hour<br />
Perform this test to determine the minimum R channel input power level at<br />
which phase lock can be accomplished.<br />
1. Connect the equipment as shown in Figure 2-12.<br />
System Verification and 2-31<br />
Performance Tests
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
I Q m , ‘I R CHANNEL<br />
c T<br />
PORT1 PORT2<br />
CABLE APC-7 24 INCH<br />
ADAPTER<br />
5on /7x-l<br />
APC-3.5 (m) MINIMUM<br />
TO APCG7<br />
LOSS PAD<br />
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
* DIRECT CONNECTION<br />
Figure 2-12. Minimum I1 Channel Level ‘I&t Setup<br />
4* mess CSca,e Ref, ~~~~“~~~~~~ 1-701 Ixil.<br />
5. Press Ihnenul ~~~~~~ ~ ~.<br />
-.-...-...._......... L~.:..<br />
. . ..A . .,.,.,. ,... . . . . . ;,.; . . . ,.,.,.. ..::..:....:.<br />
6- Press LMenu) !E&&fg @TJ @.<br />
R (<br />
sg612e<br />
The analyzer displays the message CAUTION : NO IF FOUND : CHECK R INPUT<br />
LEVEL.<br />
7. Press @J to increase the test port power by 1 dBm.<br />
8. If the analyzer displays a phase lock error message, continue increasing the<br />
test port power until phase lock is achieved.<br />
9. Write the test port power, that is displayed on the analyzer, on the<br />
“Performance Test Record. n<br />
10. Repeat steps 5 through 9 for the other CW frequencies listed in the<br />
“Performance Test Record. n<br />
2-32 Syetem Verification and<br />
Performance Teete
In Case of DilEculty<br />
1. Check the flexible RF cable (W8, as shown in Figure 2-13) between the R<br />
sampler assembly (A4) and the All phase lock assembly. Make sure it is<br />
connected between AllJl (PL IF IN) and 1st IF Out.<br />
Caution a0 not push cable W8 down next to the All phase lock<br />
assembly.<br />
System Verification and 233<br />
Performance Tests
2-34 System Verification and<br />
Performance Tests<br />
A10 A8 All A12<br />
Figure 2-13. Flexible RF Cable Location
2. Using an ohmmeter, verify that the RF cable is not open. In addition,<br />
examine both the cable connectors-measure the resistance between the<br />
cable center pin and the cable connector and make sure it is not close to<br />
zero.<br />
3. Check the R sampler by substituting it with the B sampler (A6).<br />
a. Move cable W8 to the B sampler (A6), as shown in Figure 2-14.<br />
Figure 2-14. Connections for Substituting the B !kmpler (A4)<br />
4. Connect the equipment as shown in F’igure 2-15.<br />
All<br />
sg6115-z<br />
System Verification and 2-35<br />
Performance Tests
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
- 24-INCH CABI<br />
Figure 2-15. Setup for Checking the B Sampler (A4)<br />
5. Repeat the test, but select the B sampler (A6) by pressing m<br />
~:~~~~~~~~: ‘B h step 2. Use the following specific&ions:<br />
..__._ . .._ _ _ _i .,.,,__ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . _<br />
300 kHz to 3 GHz c-27 dBm<br />
3 GHz to 6 GHz c-22 dBm<br />
6. If the analyzer fails the test, replace the All assembly.<br />
7. Verify that the high/Iow band adjustments are still within specifications For<br />
more information on how to perform this task, refer to the “High/Low Band<br />
Transition Adjustment” located in Chapter 3, “Adjustments and Correction<br />
Constants n<br />
8. Refer to Chapter 7, “Source Troubleshooting,” for more troubleshooting<br />
information.<br />
2-36 System Verification and<br />
Performance Tests
6. ‘Jkst Port Input Noise Floor Level<br />
Specifkations<br />
Frequency Range ‘l&t Port IF Bandwidth Average<br />
Noise Level<br />
300 kHz to 3.0 GHz Port 1 3kHz -82 dBm<br />
300 kHz to 3.0 GHz Port 1 10 Hz -102 dBm<br />
300 kHz to 3.0 GHz Port 2 3 kHz -82 dBm<br />
300 kHz to 3.0 GHz Port 2 10 Hz -102 dBm<br />
3.0 GHz to 6.0 GHz’ Port 1 3kHz -77 dBm<br />
3.0 GHz to 6.0 GHzl Port 1 10 Hz -97 dBm<br />
3.0 GHz to 6.0 GHzl Port 2 3kHz -77 dBm<br />
3.0 GHz to 6.0 GHz’ Port 2 10 Hz -97 dBm<br />
1 Only for analyzer with Option 006 - 30 kHz to 6 GHz range.<br />
Equipment Required for 508 <strong>Analyzer</strong>s<br />
Calibration Kit, 7-mm . . . . . . . . . . . . . . . . . . . . . . . . . , , . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 85031B<br />
Equipment Required for 75 ohm <strong>Analyzer</strong>s<br />
Calibration Kit, Type-N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 85036B<br />
An&zerwarmuptime:1 hour<br />
Perform this test to determine the <strong>HP</strong> <strong>8753E</strong> port 1 and port 2 noise floor levels<br />
at the input test ports<br />
Syctem Verification and 2-37<br />
Performance Tests
Port 1 Noise Floor Level from 300 kHz to 3 GHz<br />
(lFHw = 3kHz)<br />
1. Connect the equipment as shown in F’igure 2-16.<br />
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
50R TERM,NAmJNS<br />
Figure 2-16. Source Input Noise Floor ‘l&t Setup<br />
5. When the analyzer finishes the sweep, notice the mean value (which<br />
appears on the analyzer display).<br />
sg614e<br />
6. Convert the measured linear magnitude mean value to log magnitude, using<br />
this equation.<br />
Power (dBm) = 20 * [log&near magnitude mecrn value)]<br />
Note Notice that the mean value that is displayed on the analyzer is<br />
in ~Units So, for example, if the displayed value is 62 /rU, the<br />
value that you would put in the equation is (62 x 106).<br />
7. Write this calculated value on the “Performance Test Record.”<br />
2-36 System Verification and<br />
Performance Tests
Port 1 Noise Floor Level from 300 kHz to 3 GHz<br />
(IF BW = 10 Hz)<br />
10. When the analyzer finishes the sweep, notice the mean value.<br />
11. Convert the measured linear magnitude mean value to log magnitude, using<br />
this equation.<br />
Power (dBm) = 20 * [lOgIO(Zinear magnitude mean value)]<br />
12. Write this calculated value on the “Performance Test Record.”<br />
Port 2 Noise Floor Level from 300 kHz to 3 GHz<br />
(IFBW = 1OHz)<br />
15. When the analyzer finishes the sweep, notice the mean value.<br />
16. Convert the measured linear magnitude mean value to log magnitude, using<br />
this equation.<br />
Power (dBm) = 20 * [log,,(Zinear magnitude mean value)]<br />
17. Write this calculated value on the “Performance Test Record.”<br />
System Verification and 2-39<br />
Performance Tests
Port 2 Noise Floor Level from 300 kHz to 3 GHz<br />
(IFm = 3kHz)<br />
i. .;-... .:‘
Port 2 Noise Floor Level from 3 GHz to 6 GHz (IF BW = 10 Hz)<br />
29. Press &) $@@@ .._ (iiJ [xl] to change the IF bandwidth to 10 Hz.<br />
/ ::::::. . . . . . . . i... .:.: .I.... /<br />
30. Press IMenu) .;.; ~~.~~~ ............__........._........... . .A..... . . Li ... . . . . . . . . . . . . . . . . . . %YXgm.<br />
..--..- . . . . . . . . . . . i ...i i<br />
31. When the analyzer hnishes the sweep, notice the mean value.<br />
32. Convert the measured linear magnitude mean value to log magnitude, using<br />
this equation.<br />
Power (dBm) = 20 * [log,o(Zinear magnitude mean value)]<br />
33. Write this calculated value on the “Performance Test Record.”<br />
Port 1 Noise Floor Level for 3 GHz to 6 GHz (IF BW = 10 Hz)<br />
. . . . . . . ./ . . .,..,.,. ,.................. ;.;,.,,. . . . . . . . . . ..,.............,..........,................<br />
. .<br />
.......................I<br />
35. press (Menu) .., ~~~~~~~ ,; ,_,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,. e i_ i...~.~__._.,._.,._. ~~~~~~.<br />
..~<br />
36. When the analyzer finishes the sweep, notice the mean value.<br />
37. Convert the measured linear magnitude mean value to log magnitude, using<br />
this equation.<br />
Power (dBm) = 20 * [logI,,(Zinear magnitude mean value)]<br />
38. Write this calculated value on the “Performance Test Record.”<br />
Port 1 Noise Floor Level from 3 GHz to 6 GHz (IF BW = 3 kHz)<br />
..,... :.s,,,<br />
39. press &) &j$+~~:><br />
- .._ --.<br />
@ m.<br />
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<br />
40. Press LMenu) ~~.~~~~~~~~ .. . . . aw.;;..; . . . . . . . . . . . . . . . . . . . :::::: . . . . . . . :.L . . . . . . . . . . . . . . m . . . . . . . ...::..: ~~~.<br />
. . . . . . . . . . .2 . . . . . . .._ . . . .:.::<br />
. . . . . . . . . . . . . . . .<br />
41. When the analyzer hnishes the sweep, notice the mean value.<br />
42. Convert the measured linear magnitude mean value to log magnitude, using<br />
this equation.<br />
Power (dBm) = 20 * [lo&-,(Zinear magnitude mean value)]<br />
43. Write this calculated value on the “Performance Test Record.”<br />
System Verification and 241<br />
Performance Tests
ln Case of Difficulty<br />
1. Perform the “ADC Linearity Correction Constants (Test 52),’ located in<br />
Chapter 3, “Adjustments and Correction Constants n<br />
2. Repeat the “Test Port Input Noise Floor Level” procedure.<br />
3. Suspect the A10 Digital IF assembly if the analyzer fails both test port input<br />
noise floor tests.<br />
4. Refer to Chapter 8, “Receiver Troubleshooting,” for more troubleshooting<br />
information.<br />
242 System Verification and<br />
Performance Tests
7. Test Port Input Frequency Response<br />
Specifications<br />
Frequency Range lkst Port Input<br />
Frequency Response<br />
300 kHz to 3 GHz Port 1 fl dH<br />
300 kHz to 3 GHz Port 2 fl dB<br />
3 GHz to 6 GHzl Port 1 52 dE3<br />
1 3GHz to 6 GHzl 1 Port2 1<br />
1 Only for analyzers with Option 006 - 30 kHz to 6 GHz range.<br />
Equipment Required for 5OQ <strong>Analyzer</strong>s<br />
Power Meter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 436AI437W438A<br />
Power Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 8482A<br />
Cable, APC-7 24inch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 81204779<br />
Adapter, APC-7 to Type-N (f) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<strong>HP</strong> 11524A<br />
Additional Equipment Required for <strong>Analyzer</strong>s with Option 006<br />
Power Sensor . . . . . . . . . . , . . . . . . . . . . . . . , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 8481A<br />
Equipment Required for 75Q <strong>Analyzer</strong>s<br />
Power Meter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 436AJ437Bl438A<br />
Power Sensor ..*................................... . . . . . . . <strong>HP</strong>8483AOptionH03<br />
Cable, Type-N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 8120-2408<br />
Anulgger warmup time: 1 hour<br />
Perform this test to examine the vector sum of all test setup error vectors in<br />
both magnitude and phase change as a function of frequency.<br />
System Verification and 243<br />
Performance Tests
Power Meter Calibration for Test Port 1 from 300 KHz to 3 GHz<br />
1. Zero and calibrate the power meter.<br />
2. Connect the equipment as shown in Figure 2-17.<br />
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
WITH OPTION 075<br />
/’<br />
Figure 2-17. Setup for Power Meter Calibration on ‘I&t Port 1<br />
3. Press m m 1300_) Lk/m.<br />
4. Only for <strong>Analyzer</strong>s with Option 006: Press [Stop_] (T’J &J.<br />
5. Press (-..@ ~.~~~~~~~~~~~.<br />
_ .,.,.,.,.,.,.,.,.,.,.,.,.,.,i __~_.,._ .,_ _ .,.,.,. _.,._.,._._.,._ _ i .,.,.,.,.,. ~.~._.__<br />
6. Press ~~,,,~~~~~~~ . . . . . . . . . _ . . . . . . and ~~~~~~ Mtil the malyzer shows the correct<br />
power meter model.<br />
24 System Verification and<br />
Performance Tests
. . . . . . . “......,,,,,,,,,.,, ;.::...;. ‘...... ,,,.. ;; /....<br />
7. Press ~~~~~~:,~:-g #T&j%!&. The default power meter <strong>HP</strong>-IB address<br />
.,<br />
is 13. Make sure it is the same as your power meter <strong>HP</strong>-IB address.<br />
Otherwise, use the analyzer front panel keypad to enter the correct <strong>HP</strong>-IB<br />
address for your power meter.<br />
8. Press ~ I~~.:~~~~~~~~~.l . . . . . . . . . . . . ,..;.,.,;, . . . . . .: L51) Ixl).<br />
. ../_ii~~..........-//-.......~ ii .: ..:::::.::... :..:............i<br />
“‘:y:: ..~.y”,. .d.d;;, ;x; g .:f ‘.;“. ::::::i<br />
9. Press @@j% ‘~~~~~~,~~~~ to turn the auto power range off.<br />
Note The analyzer displays the PRm annotation, indicating that the<br />
analyzer power range is set to MANUAL.<br />
“. :,... ‘.; ‘.;;;;.;~~, f ,, ,“; E<br />
10. Press ?#$@I@ SW&I4 to uncouple the test port output power.<br />
Note<br />
their corresponding frequencies.<br />
The analyzer’s calibration factor sensor table can hold a<br />
muximum of 12 calibration factor data points<br />
The following softkeys are included in the sensor calibration factor entries<br />
menu:<br />
_.. _ __; _ _.,.,....,.. __; ; _; _ _.:. ;.... .;.<br />
gggi#ggi:<br />
_; _) _ ~.-.:...:.:.:.:...~.:.~~:~~~~;<br />
press to select a point where you can use the front<br />
panel knob or entry keys to enter a value.<br />
..,............................... _ . . . . . . _<br />
#g+Jg<br />
.A, ....i i . . . .w;.>.~..~.~.~.~.~.~ . .<br />
press to edit or change a previously entered value.<br />
press to delete a point from the sensor calibration<br />
factor table.<br />
~~~ select this key to add a point into the sensor<br />
calibration factor table.<br />
. . . . . . .. . . . . . . . . . .. . . . . .. . . . . ... “~.:.:.::;.::::::: ‘:~.;~~~~~~,~ :.:::::::.:.:.:~::::::::,.:;::::~:...:;:~..<br />
~~~~~~~ select this key to erase the entire sensor calibration<br />
factor table.<br />
select this key when done entering points to the sensor<br />
calibration factor table.<br />
System Verification and 245<br />
Performance Tests
Power Meter Calibration on Port 2 from 300 kHz to 3 GHz<br />
22. Connect the equipment as shown Figure 2-19.<br />
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
WITH OPTION 075<br />
H P 8482A<br />
POWER SENSOR<br />
H P 8483A<br />
Figure 2-19. Setup for Power Meter Calibration on Test Port 2<br />
23. Press (seas) ~~~~~~~~ ~~~~~~.~~:~~.~.<br />
. .._..::, . ..~...,...~..~...~...~..,.~~.~ . . . . .a.G :... i~.~..,.....,.............~ : ..A.. ..::::: ._.,... . . . . . . . . . ..~.................. _... .......:::..u~.L<br />
. . . . . . . . . . _ . . . . . . . . . .<br />
. . . . _ _ _,, _.; /,. . . . . . . . _.; /, . . . . . . /_ _ ,.,.,.,.,.,.,.,.,.,...,...,_.,....i _ i _ i ._.,.._i _*<br />
24. fiess (g ~~~ ~~~~~~~ ~~~~~~~ to start the power meter<br />
..-.... -..-.--_. .--_.- _......._._.__........ -... .~~.~.~~..~.~.~.~.~.~.~...----~ -......-..--..-..-._ -<br />
calibration for test port 2.<br />
25. When the analyzer displays the message POWEFl METER CALIBRATION SWEEP<br />
DONE, connect the equipment as shown as in Figure 2-20.<br />
248 Syetem Verification and<br />
Performance Tests
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
-PORT 1<br />
Figure Z-20. lkst Port 1 Input Frequency Response lkst Setup<br />
Test Port 1 Input Frequency Response from 300 kHz to 3 GHz<br />
.::.. .::>. ,, .. :::
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
<strong>HP</strong> 8753F<br />
NETWORK ANALYZER<br />
WITH OPTION 075<br />
H P 8481A<br />
POWER SENSOR<br />
<strong>HP</strong> 438A<br />
Test Port 2<br />
sg617e<br />
35. Press ~~~~~~~~~~~~~~ ~~~-:~~~~~~~~~~~~~~~: Repeat step 12 to build<br />
a calibration factor sensor table for the <strong>HP</strong> 8481A power sensor.<br />
36. Press ~%~#k .>......;.; .- . ..__.. i. . . . . . . . .;...; -.. . . . . to . exit the sensor calibration factor entries menu.<br />
. . . . . . . . . . . . .._ . . . . ::,:::<br />
37. m s&a the <strong>HP</strong> 8&lA power sensor, press ~~~~~~~~~~~.<br />
_ ._...<br />
38. Press ~~ ~~~ *ym;f<br />
: ..- -_..- ;..;I: .._._ -c<br />
i ,.=i_ . ~~~~~~~~~~~ . . . _ . _ _ to start the power meter calibration.<br />
2-60 System Verification and<br />
Performance Tests
Test Port 1 Input Frequency Response from 3 GHz to 6 GHz<br />
39. When the analyzer Gnashes the calibration sweep, connect the equipment as<br />
shown in Figure 2-22.<br />
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
PORT 1<br />
U<br />
I I<br />
PORT 2<br />
CABLE<br />
24 INCH<br />
Figure 2-22. Setup for lkst Port 1 Input Frequency Response<br />
. . . . . . . .<br />
_ . . . . . . . ..: . . . / / . .<br />
Press I-1 ~~~~~~~ c-1 ~~~~ ~~~~~~~~.. to put<br />
/i_.......-......~r~i_i_<br />
~~i..................~~~;;;~;~.i ._ i......./......l .: . . . . . . . . . ..L......... _...._.... . -::<br />
41.<br />
marker 1 at the minimum magnitude location of the trace.<br />
:..... :.. .+:.:~ / . ..>> ~~~~~ . . . . ./ . . . . . . . . . . . . . . . . . . . . . . . 2.2L../:: . . . . . 2 . . . . . . . . . . . ... .. . . . . . . . . .. . . . . . . .:::::. ~~~~~ . . . . . . ~;..................._......~..........._............-~... ::.....i.i.::: to position<br />
marker 2 at the maximum magnitude location of the trace.<br />
43. Write the marker 1 or marker 2 reading, whichever has the largest absolute<br />
magnitude, in the “Performance Test Record. n<br />
System Verification and 241<br />
Performance Tests
Test Port 2 Input Frequency Response from 3 GHz to 6 GHz<br />
47. When the analyzer displays the message POWER METER CALIBRATION SWEEP<br />
DONE, connect the equipment as shown as in Figure 2-24.<br />
H P -.-~~ <strong>8753E</strong><br />
NETWORK ANALYZER<br />
PORT 1UPORT<br />
2<br />
CABLE<br />
24 INCH<br />
Figure 2-24. ‘Ikst Port 2 Input Frequency Response ‘lkst Setup<br />
51. Write the marker 1 or marker 2 reading, whichever has the largest<br />
magnitude, in the “Performance Test Record.”<br />
In Case of Difaculty<br />
1. Be sure you have used the correct power sensor for the frequency range.<br />
2. Verify that the calibration factors that you have entered for the power<br />
sensors are correct.<br />
3. Repeat this test with a “known good” through cable.<br />
System Verification and 2-53<br />
Performance Teete
8. lkst Port Crosstalk<br />
Specifhtions<br />
( Frequency Euuge 1 Crosstalk1 1<br />
1 300 kHz to 3 GHz 1 100 dB 1<br />
) 3GHzto6GHz2 1 9OdB 1<br />
1 At 25O C 3~5“ C.<br />
2 Only for analyzers with Option 006 -<br />
30kHzto6GHzrange.<br />
Required Equipment for 50 ohm <strong>Analyzer</strong>s<br />
Calibration Kit, 7-mm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 85031B<br />
Cable, APC-7 24-inch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 8120-4779<br />
Required Equipment for 7513 <strong>Analyzer</strong>s<br />
Calibration Kit, 75 ohm, Type-N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<strong>HP</strong> 85036B<br />
<strong>Analyzer</strong> warmup time: 1 hour<br />
Perform this test to verify the signal leakage between the analyzer’s test ports.<br />
1. Connect the equipment as shown in Figure 2-25.<br />
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
PORT 11<br />
CABLE APC-7<br />
24 INCH<br />
I<br />
PORT 2<br />
OPEN END<br />
- I I<br />
PORT 1 * * PORT 2<br />
SHORT (m)<br />
(75fl)<br />
-<br />
ADAPTER<br />
TYPE-N(m to<br />
*<br />
TYPE-N(m i<br />
SHORT ( f )<br />
x (75fl)<br />
(75n)<br />
* DIRECT CONNECTION sg620e<br />
2-54 System Verification and<br />
Performance Tests<br />
Figure 2-25. ‘I&t Port Crosstalk l&t Setup
,.,.. . . . . .,. .,. / . . . .<br />
2. Press (jj) [iZG) P#%B ; . . . .._...... . ;;., :. @J (XJ<br />
3. Press m ~~~~ @J (xl).<br />
Crosstalk to Test Port 2 from 300 kHz to 3 GHz<br />
4. Press~(3iZJ(i$J&Tj@LG/n).<br />
.(:.~,~,~,.:.~,~,~. :.::. .:;.. ..: . . . . . ..z.. . .<br />
5. Press m :~~~~~~:~,,~~~,^~~~~~~~~~.,.<br />
. ..
18. Write the marker value (which appears on the analyzer display) in the<br />
“Performance Test Record. n<br />
Crosstalk to Test Port 2 from 3 GHz to 6 GHz<br />
.._ .,......_ i ..,.,.,.,.,.,...,.,.,.,..,, :i ,,, . . .... . . . . . . ..:. : . . . . . . .._. . ..~_ _ ._ ._ _ _ _i<br />
. . . .<br />
l- Press (Meas) _..i. ~~~~~;,~,~~~~~~~~~~~~~~~~~~~<br />
_../..i awA>>..> .i...A..L../......~.i- ...... . . . . .....................___._-<br />
.<br />
2. Press Ihnenu_) ~~~~~~~~ ~~~~~<br />
i.~.~.~.~_..>...~ ii z.sw;..i.ii . . . . . . . . . . . . ..ii^................._ . . . . .<br />
./:....:..:.... ..: . . . . . . . . . . . . . . . ..:::.;x . . . . . . . . A . . . ..:..s.......: -<br />
3.<br />
. . . . . . . . . . . . . . . . . . /,: :.,. ,;.,.;,.,.;........ * :; .: / ,, ,.,.,.,.<br />
Press (-Fan_) ,,~~~~~~~~ ~~~~~’<br />
- . - . AS ._.<br />
4. Write the marker value (which appears on the analyzer display) in the<br />
“Performance Test Record. n<br />
In Case of DifBculty<br />
1. Remove the instrument top cover. Using an 8 lb-inch torque wrench, verify<br />
that all semirigid cables connected to the sampler/mixer assemblies are<br />
tight. In addition, tighten any loose screws on the sampler/mixer assemblies<br />
(A4/5/6) and the pulse generator assembly (A7).<br />
2. Remove the instrument bottom cover. Refer to F’igure 2-26. Verify that<br />
cables Wl, W31 and W32 are tight.<br />
3. Repeat this test.<br />
2-56 System Verification and<br />
Performance Tests
W32,<br />
Figure 2-26. <strong>HP</strong> <strong>8753E</strong> Bottom View<br />
sg6102e<br />
System Verification and 2-57<br />
Performance Tests
9. Calibration Coefficients<br />
Specifications<br />
Uncorrected1 Frequency Range<br />
Error ‘kms<br />
300 kBz to 1.3 GHz 1.3 GElz to 3 GHz 3 GHz to 6 GHz2<br />
Directivity 35 dl3 30 dB 25 dB<br />
Source Match 16 dB 16 dB 14 dB<br />
Load Match 18 dB 16 dB 14 dB<br />
Transmission Tracking f1.5 dB f1.5 dB f2.5 dB<br />
Reflection Tracking f1.5 dB f1.5 dB f2.5 dB<br />
1 At 25’ f5O C, with less than lo C deviation from the measurement calibration temperature.<br />
2 Only for analyzers with Option 006 - 30 kHz to 6 GHz range.<br />
Equipment Required for 5011 <strong>Analyzer</strong>s<br />
Calibration Kit, 7-mm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . , . . . . . . . . . <strong>HP</strong> 85031B<br />
Cable, APC-7, 24-inch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 81204779<br />
Equipment Required for 75Q <strong>Analyzer</strong>s<br />
Calibration Kit, Type-N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 85036B<br />
Cable, Type-N, 24-inch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 8120-4781<br />
Analger warmup time: 30 minutes<br />
Perform this procedure to verify the analyzer uncorrected test port<br />
characteristics.<br />
Note The crosstalk calibration coefficients are omitted in this<br />
procedure. They are covered in the “Test Port Crosstalk”<br />
performance test.<br />
2-58 Syetem Verification and<br />
Performance Tests
First Full 2-Port Calibration<br />
1. Connect the equipment as shown in Figure 2-27.<br />
TEST PORT 1<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
Figure 2-27. First Full 2-Port Calibration ‘I&t Setup<br />
2. PressLPreset)Lstart)@&EJ<br />
5. Connect the “open” end of the open/short combination (supplied in the<br />
calibration kit) to analyzer test port 1.<br />
6. ~~~ ~~~~~~~ ~~~~~~~~.<br />
-_...-...L i .._.. ~:~:....:..-- .:..:
,. ..,. ... ,... ..:: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<br />
12. press ~~~~.~~~~.<br />
..__..............._ -_.: ..~........... :..::...<br />
13. Connect the “short” end of the open/short combination to the reference test<br />
port 2.<br />
15. Connect the 50 ohm termination to the reference test port 2.<br />
17. Whentheanalyzer “‘.’ _____.. ... . . . . .. . . . . . . . . . . . . . . displays PRESS 'DONE' IF FINISHED WITH STD(s), press<br />
~~~~,l;~~~~<br />
.._....._...._..._............--..................... 111.... I. ./ ..I..1 . . . ..A. * * i. . . . . . . . . . . ;;;;./;C~ . . . . . . . - i .::::: .::::. - -<br />
Waitforthemessage COMPUTINGCAL COEFFICIENTS to disappearfromthe<br />
analyzer display before proceeding to the next step.<br />
18. Connect the equipment as shown in Figure 2-28.<br />
2-60 Syetem Verification and<br />
Performance Tests<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
PORT 1 I I PORT 2<br />
Figure 2-28. Transmission Calibration lkst Setup
Directivity (Forward) Calibration Coefficient<br />
..::: ::.::.. ~.:~.~:~:~:~:.. .y::.:.:.:.:.:.:.:.::.:: .I -3, .+ y:~.:.:::: .f+ . . . . . . . . . . . . . . . . ,,....,,... .a., .J..<br />
21- Press [j] ~3~~~~:~~~ ii.... . ......... . . . . . .. . . ._A.A. . . . . z.v,c._ . . .<br />
. . . . . ..::::: . . . . . . . ..L . :XifF!# . . . ..A/ . .A.. ii ..A. T . . . .... . i.: (32) @J .~~.~~~<br />
22. When the analyzer finishes the test, press B.<br />
23. Using the front panel knob, locate the maximum value of the data trace for<br />
the 300 kHz to 1.3 GHz frequency range.<br />
24. Write the maximum value in the “Performance Test Record.”<br />
25. Repeat the previous two steps for the other frequency range(s) listed on the<br />
“Performance Test Record. n<br />
Source Match (Forward) Calibration Coefficient<br />
27. When the analyzer finishes the test, repeat steps 22 through 25.<br />
Transmission Tracking (Forward) Calibration Coefficient<br />
28. Press m ~~~~~~~ ~~~ ~37) (xl) ~~~~.<br />
. . . . _i_ i _ ___ _ _i .,.,.,.,.......,........... ii . . . . . . . _ .:::: _ i . . . . . . . ~;..~~ ..== _<br />
29. When the analyzer finishes the test, repeat steps 22 through 25.<br />
Reflection Tracking (Forward) Calibration Coefficient<br />
31. When the analyzer finishes the test, repeat steps 22 through 25.<br />
Load lMatch (Reverse) Calibration Coemcient<br />
33. When the analyzer finishes the test, repeat steps 22 through 25.<br />
System Verification and 2-61<br />
Performance Tests
44. Replace the open/short combination with the 50 ohm termination (supplied<br />
in the calibration kit).<br />
46. Connect the “open” end of the open/short combination to the analyzer test<br />
port 2.<br />
48. Connect the “short” end of the open/short combination to the analyzer test<br />
port 2.<br />
49. press ~~~~~~~~~.<br />
.,.. . . ~;.......,.......................~.~- . . . . . .<br />
. . . . . . . ..-..........~~~.~~...~...~~. . . . . .<br />
50. Connect the 50 ohm termination to the analyzer test port 2.<br />
52. When the analyzer displays PRESS ‘DONE’ IF FINISHED WITH STD(s) , press<br />
~:~~~~~~~~~:.<br />
*, i_i _ i _ __ .. _1 ,.,.,.,.,.,.,.,.,.,.,. _<br />
Wait for the message COMPUTING CAL COEFFICIENTS to disappear from the<br />
analyzer display before proceeding to the next step.<br />
53. Connect the equipment as shown in F’igure 2-30.<br />
<strong>HP</strong> 0753E<br />
NETWORK ANALYZER<br />
I I CABLE<br />
24 INCH<br />
Figure 2-30. Transmission Calibration ‘I&t Setup<br />
sg618.2<br />
System Verification and 2-63<br />
Performance Tests
10. System Trace Noise (Only for <strong>Analyzer</strong>s without<br />
Option 006)<br />
Frequency Range Ratio System Trace Noise System Trace Noise<br />
(Magnitude1 ) (Ph-3<br />
30kHzto3GHz A/R
. . . . . . . . . . .,.............<br />
j_., ./_<br />
4. Press CMarker F~“, ‘~~~~~~~~: ~~~~~~~~: to activate the<br />
__........~.~............-........~~.~.~.~.~.~.~.~;.~ . . . . . . . I.._ .:::.._....../.: . i~~L~.~.~.~.~zz&..~.~ c//.~.~._.~.~.~~~~~.~.~ . . . . i . . . . . . . . -..-.. i..<br />
instrument’s statistic feature.<br />
System Trace Noise for A/R Magnitude<br />
7. When the analyzer displays the “Hld” annotation, press c-j<br />
~~~‘:~~~~~~:<br />
. . . . . . . . . . . . . . . . . -<br />
8. Write the sdev (standard deviation) value, which appears on the analyzer<br />
display, on the “Performance Test Record. n<br />
System Trace Noise for A/R Phase<br />
9. press (format) ~~~~.<br />
11. When the analyzer finishes the number of sweeps, press @8@<br />
~~~~~~~;.<br />
12. Write the sdev value on the “Performance Test Record.”<br />
System Trace Noise for B/R Magnitude<br />
15. When the analyzer l?nishes the number of sweeps, press c-1<br />
16. Write the sdev value on the “Performance Test Record.”<br />
2.66 System Verification and<br />
Performance Tests
System Trace Noise for B/R Phase<br />
17. Press B &j&j$.<br />
.._................. - -...<br />
18. Press LMenu) ~~~~~~~~ ~~~‘~~~:..<br />
” .,.. :.:.i.:;..<br />
.p&J&<br />
,,.~::.:,:.y ,, :
11. System Trace Noise (Only for <strong>Analyzer</strong>s with<br />
Option 006)<br />
Specifications<br />
Frequency Range Ratio System Trace Noise System Trace Noise<br />
(Bfagnitudel) OPh-3<br />
30 kHz to 3 GHz A/R
. . . .<br />
3. ~~~~ (m)~~~~~~~.~~, ~~~~~~,.;~~. to a&iv& the<br />
instrument’s statistic feature.<br />
. . . . . . . i . ..:.......... _ . . . . . . . ..._/. . . . . _ ,..........<br />
System Trace Noise for A/R Magnitude from 30 kHz to 3 GHz<br />
7. Write the sdev (standard deviation) value shown, which appears on the<br />
analyzer display, on the “Performance Test Record.”<br />
System Trace Noise for A/R Phase from 3 GHz to 6 GHz<br />
l l- Press (Format) $fJB#$%. - ..__..._ --<br />
~,,,‘- ..‘.’ .“::~:~~ . . . .T . . :.. :.:..::. :,, ..:~~.~~~~~N,,:x~..- - ..-...---...... f$gfj@@i - ..-.....-.-.......^ 0 (xl.<br />
13.<br />
.<br />
When<br />
..- _.,,.,.,.,.....,...,.,.,...,._<br />
.,,...;;.;‘....~.~. ~~:~.‘:~.~.~,..~,~,~,~.~.~.,,.,:.:.:<br />
the analyzer<br />
.:... ,.,...,..... _<br />
hnishes the number of sweeps, press (j-1<br />
.:~~~~~.S~~~<br />
;>;:.::
System Trace Noise for A/R Phase from 30 kHz to 3 GHz<br />
16. When the analyzer finishes the number of sweeps, press (Scale)<br />
~~~~~~.<br />
17. Write the s.dev value, which appears on the analyzer display, on the<br />
“Performance Test Record. ’<br />
System Trace Noise for B/R lbgnitude from 30 kHz to 3 GHz<br />
z..;.>:. E.B.’ :>>>>>......<br />
@ @).<br />
~~:.:.~~:.:.:.:.:.~:.~.:.;.:.:.:.~.~:.~.:.:.:.;.:.:.:.:.:.~..~ ..((................................. . . _ . . . . . . .<br />
19. When the analyzer finishes the number of sweeps, press &iii?@<br />
. . . . . . ..A ‘.:.:.:.:.:.:.~;:..:::~.‘.~:.~,.:.::.:.:.:<br />
~~~~~,.<br />
20. Write the s.dev value, which appears on the analyzer display, on the<br />
“Performance Test Record. ’<br />
System Trace Noise for B/R Magnitude from 3 GHz to 6 GHz<br />
22. When the analyzer Gnishes the number of sweeps, press (w)<br />
~~~~~~~~,<br />
23. Write the sdev value, which appears on the analyzer display, on the<br />
“Performance Test Record. n<br />
System Trace Noise for B/R Phase from 3 GHz to 6 GHz<br />
25. When the analyzer Gnashes the number of sweeps, press cm)<br />
~~~~~~~~.<br />
.=,.::.,y>,.u _ __i .~_,,,,,,,,<br />
26. Write the s.dev value, which appears on the analyzer display, on the<br />
“Performance Test Record. n<br />
2.70 System Verification and<br />
Performance Tests
System Trace Noise for B/R Phase from 30 kHz to 3 GHz<br />
28. When the analyzer finishes the number of sweeps, press [-Ref)<br />
~~~~,~~~~~~~.<br />
29. Write the sdev value, which appears on the analyzer display, on the<br />
“Performance Test Record. n<br />
In Case of Diffhilty<br />
1. Perform the “ADC Offset Correction Constants” procedure, located in Chapter<br />
3, “Adjustments and Correction Constants.”<br />
2. Repeat this performance test.<br />
3. Suspect the A10 Digital IF board assembly if the analyzer still fails the test.<br />
System Verification and 2-71<br />
Performance Tests
12. Test Port Input Impedance<br />
Specifications<br />
1 Frequency Range 1 ‘Ilest Port Input 1 Return Loss 1<br />
LkHzto 1.3GHzI Port 1 I IlSdB I<br />
m3Grr Port2 1 116dB 1<br />
r 3 GHz to 6 GHz l Port 2 I 114m I<br />
Required Equipment for 50 ohm <strong>Analyzer</strong>s<br />
Cable, APC-7, 24-inch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 8120-4779<br />
Calibration Kit, 7-mm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 85031B<br />
Required Equipment for 75 ohm <strong>Analyzer</strong>s<br />
Cable, 750, Type-N, 24-inch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 8120-2408<br />
Calibration Kit, 753, Type-N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 85036B<br />
Anulgm- warmup time: 1 hour<br />
Perform this test to measure the return loss of each input test port.<br />
2.72 System Verification and<br />
Performance Tests
1. Connect the equipment as shown in Figure 2-33.<br />
REFERENCE TEST --)<br />
PORT I<br />
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
Figure 2-33. Sll l-Port Chl lkst Setup<br />
_ . . . . . _ _ / . ..~ . . . . ,,,,,,............. ., ..:?A<br />
2. Press w LAVG) ~~~~~ L3ooo) Lxl] IMenu) ~~~~~:~~~~~~s,, m (xl].<br />
,.~._i _ _ _ _<br />
3. Press m (3iZJ Lk/ml.<br />
. . . . . . ; _ ,,,; ./, .‘.:,,:,:,:,:,:) . . . . . . . . . .<br />
4. ~~~ Ical] ~~~~~~ ~~~~:,~~~~~~ ad xle& the appropriate calibration<br />
,.,. ii_ ,.,. _ ,.,......... i ..: _.:: _.. . . . . _ ..-.... ~.~....~.~.....i-... .__..._.....................~..<br />
kit:<br />
_<br />
, lf your analyzer is 5oQ, press ~~~~,;~~~~~~~*<br />
/..,/............,. _i _ _i_ _<br />
.,..........., ,,...........; _; _i ,.,.,.,.........................<br />
, lf your mdyzr is 75Q, press ~~~~~~~~~~~.<br />
5. Press ~~ .“~~~,~“i ~~~~~~~~ . . ., _ .,.,.,...,.,.,...i . . . . ~~~~~~~~~~.<br />
. . . . . . . . .. . . . . . . . . . . . .. . . . . . . . . . ..-‘..........<br />
*.---;: ~~~ _i..~........_~.~.~;~~ E . . . . . i_.: . . . .:. / z..> . . .::::::::::.. . . i>..> . . . . .. . . . . .._ -... :: ~~~~:~~~~;;~;;:~:;~.:~;;~;:.:.. -<br />
6. Connect an open to reference test port 1, as shown in Figure 2-33.<br />
.,.,.,.,.,.,.,.,.,.,.,.,.,.......................,......... ..,,.. _<br />
7. press :~~~~~~~~~~~.<br />
,. _<br />
-<br />
8. When the analyzer displays the prompt CONNECT STD THEN PRESS KEY TO<br />
NEASUFE, connect a short to reference test port 1.<br />
g. Press ~~~~~~~~~~~~~ -<br />
.,......; ,.,.,.,..../.................. .._ __ .,.,<br />
10. At the prompt, connect a load to reference test port 1.<br />
sg623e<br />
System Verification and 2-73<br />
Performance Tests
12. When ::.. the analyzer displays 'DONE' IF FINISHED WITH CAL, press<br />
&$& ‘:~~~~~~~~~<br />
L-<br />
13. Press CSa”e,Reca,,, ~~~~~~~,:, *<br />
14. Connect the equipment as shown in Figure 2-34.<br />
PORT 1<br />
U-.<br />
PORT 2<br />
-<br />
Z-INCH CABLE<br />
Fiure 2-34. ‘Jkst Port 2 Input Impedance ‘Jkst Setup<br />
15. Press e to turn the analyzer’s marker 1 on. Use the front panel knob<br />
to locate the maximum value of the data trace for each of the frequency<br />
ranges listed in the “Performance Test Record.”<br />
16. Write these maximum values on the “Performance Test Record.”<br />
17. Connect the equipment as shown in Figure 2-35.<br />
2-74 System Verification and<br />
Performance Tests<br />
g613e
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
- PORT 1<br />
REFERENCE TEST --c<br />
PORT 2<br />
I<br />
PORT 2<br />
CABLE 24 INCH<br />
I-<br />
Figure 2-35. $22 l-Port Cd ‘l&t Setup<br />
,.; .,.,.,.,.,.,.,.,.,.,.,.,.,. . . . . . ,. ,. .,.<br />
18. -ess ~cal] ..~~~~~~ &#f@ ~~~~~~~~~~~~,.<br />
._... .._.._.............~......... -..-- -2 . . . . . . . . . i....z . ii. .A.. .A.... ii zz. _...<br />
19. At the prompt, connect an open to reference test port 2, as shown in<br />
Figure 2-35.<br />
21. When the analyzer displays the prompt CONNECT STD THEN PRESS KEY TO<br />
MEASURE, connect a short to reference test port 2.<br />
23. At the prompt, connect a load to reference test port 2.<br />
~ .;.. ..,/,.<br />
24. press i~~:~~~~.<br />
25. When the analyzer displays ‘DONE’ IF FINISHED WITH CAL, press<br />
~~~~~~~~~~~~~~~~.<br />
.._......__......_.~.... . . ..a -:.......~:;..::.8:~~..~ i” _...........-....<br />
26. press LB) ~~~~.~~~~~:~ _../.................._. 2: . . . . . . . i.~...............~............~......~i<br />
. . . . . . to save the l-Port calibration.<br />
27. Connect the equipment as shown in Figure 2-36.<br />
sg624e<br />
System Verification and 2-75<br />
Performanoe Tests
PORT 1<br />
LJ<br />
PORT 2<br />
CABLE<br />
24 INCH<br />
Figure 2-36. lkst Port 1 Input Impedance ‘I&t Setup<br />
28. Press m to activate the analyzer’s marker 1. Use the front panel knob<br />
to locate the maximum value of the data trace for each of the frequency<br />
ranges listed in the “Performance Test Record. n<br />
29. Write the maximum values on the “Performance Test Record.”<br />
In Case of Difkulty<br />
1. Suspect the A10 digital IF board assembly if the analyzer fails both test port<br />
tests.<br />
2. Refer to Chapter 8, “Receiver Troubleshooting,” for more troubleshooting<br />
information.<br />
2-76 System Verification and<br />
Petformanca Tests
13. ‘Ikst Port Receiver Magnitude Dynamic Accuracy<br />
Spectications<br />
<strong>HP</strong><strong>8753E</strong> Magnitude Dynamic Accuracy 0.3 to 3000 MHz<br />
10 0 -10 -20 -30 -40 -SO -60 -70 -80 -90 -100<br />
Test Port Power (dBm)<br />
Required Equipment<br />
<strong>HP</strong><strong>8753E</strong> Magnitude Dynamic Accuracy 3-6 GHz<br />
10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100<br />
Test Port Power (dBm)<br />
Power Meter ............................................... <strong>HP</strong> 436Af437Bl438A<br />
Power Sensor .......................................................... <strong>HP</strong> 8482A<br />
Step Attenuator, 110 dB ............................ <strong>HP</strong> 8496A Option 001, H18<br />
(See notes on the following page.)<br />
Adapter (2), APC-7 to Type-N (f) ....................................<strong>HP</strong> 11524A<br />
Adapter, Type-N (f) to Type-N (f) ............................<strong>HP</strong> P/N 1250-0777<br />
Cable (3), 509, Type-N, 24-inch ....................................... 8120-4781<br />
Cable, <strong>HP</strong>-IB.......................................................... <strong>HP</strong> 10833A<br />
Diskette, 3.5 inch ............................................................<br />
Calibration Kit, Type-N, 50 Q......................................... <strong>HP</strong> 85Og:<br />
Additional Required Equipment for 75 ohm <strong>Analyzer</strong>s<br />
MinimumLossPad(2), 500 to 75Q ................................... <strong>HP</strong> 11852B<br />
Analgger warmup time: 1 hour<br />
System Verification and 2-77<br />
Performance Tests
Note The <strong>HP</strong> 8496A step attenuator (Option 001, H18) comes with a<br />
special calibration that supports the measurement uncertainties<br />
expressed in the test record for this performance test.<br />
The special calibration consists of two measurements The hrst<br />
is a measurement of the attenuation at each step. The data<br />
reported for this measurement have the following uncertainties:<br />
� f0.006 dB from 0 to 40 dB<br />
w f0.015 dB from >40 to 80 dB<br />
� f0.025 dB from >80 to 90 dB<br />
� f0.05 dB >90 dB<br />
The second calibration measurement characterizes match<br />
stability between attenuator settings for each attenuator port.<br />
The vector difference of S11 or ($2) between the reference<br />
attenuation step and all the other steps is measured. The<br />
magnitude of this difference is certified to be ~0.0316 (>30 dB).<br />
Note The <strong>HP</strong> 8496A used for this test wiU have known attenuator<br />
errors for attenuations up to 100 dB using a test frequency of<br />
30 MHz. The attenuation used as a reference is 0 dB. If the<br />
available calibration data is not expressed as attenuation errors,<br />
it can be converted to such a form by the following equation:<br />
2-76 System Veriiication and<br />
Performance Tests<br />
(actual attenuation) - (expected attenuation) = attenuator error<br />
Actual attenuation values that are greater than the expected<br />
attenuation values wiII result in positive errors Actual<br />
attenuation values that are less than the expected attenuation<br />
values wiII resuh in negative errors.
Initial Calculations<br />
1. Fill in the attenuator error values (referenced to 0 dB attenuation)<br />
in Table 2-l by referring to the calibration data for the <strong>HP</strong> 8496A<br />
step-attenuator. Refer to the note on the previous page.<br />
a. Find the column in the <strong>HP</strong> 8496A attenuation error table that pertains to<br />
the attenuation errors for 30 MHz.<br />
b. Starting with the “10 dB” step in this column, write down the value in<br />
the corresponding space in ‘Ikble 2-l for column “B.” This value should<br />
be placed in the row for the 10 dB <strong>HP</strong> 8496A setting.<br />
c. Continue transferring the remaining values of the <strong>HP</strong> 8496A attenuation<br />
errors to column “B” in lhble 2-l.<br />
2. In ‘lhble 2-1, transfer the 10 dB error value located within the parenthesis in<br />
column “B” to each space in column “C.”<br />
‘Bible 2-l. Magnitude Dynamic Accuracy Calculations<br />
A B c<br />
8496A Attn. Error 10 dB Error Attn. Brror<br />
AttZl. (ref 0 dB) Vixlne (ref 10 dB)<br />
0 OdB<br />
10 ( 1 OdB<br />
20<br />
30<br />
40<br />
50<br />
60<br />
70<br />
so<br />
90<br />
E<br />
10<br />
0<br />
- 10<br />
- 20<br />
-30<br />
-40<br />
- 50<br />
-60<br />
- 70<br />
- 80<br />
Expected<br />
M-ement<br />
(corrected)<br />
@w<br />
3. The values in column “D” result from changing the reference attenuation of<br />
the calibration data of the <strong>HP</strong> 8496A to 10 dl3.<br />
System Verification and 2-79<br />
Performance Tests
Calculate the attenuation error values for this column by subtracting the<br />
values in column “C” from the values in column “B” (B - C = D).<br />
4. The values in column “F” result from correcting the expected measurement<br />
value by the amount of attenuator error.<br />
Calculate the values in this column by subtracting the values in column “D”<br />
from the values in column “E” (E - D = F).<br />
5. Transfer the values from column “F” in ‘Iable 2-l to column “F” in the<br />
“Performance Test Record” for both test ports.<br />
Power Meter Calibration<br />
6. Zero and calibrate the power meter. (Refer to the power meter manual for<br />
details on this procedure.)<br />
7. Connect the equipment as shown in Figure 2-37.<br />
2-60 System Verification and<br />
Performance Tests
110 dB<br />
STEP<br />
ATTENUATOR<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
WITH OPTION 075<br />
<strong>HP</strong> 5753E<br />
POWER SENSOR<br />
POWER METER<br />
Figure 2-37. Power Meter Calibration for Magnitude Dynamic Accuracy<br />
System Verification and 2-61<br />
Performance Tests
8. Set the <strong>HP</strong> 8496A to 10 dB.<br />
9. Set the following analyzer parameters:<br />
10. Set up the <strong>HP</strong> <strong>8753E</strong> for power meter calibration:<br />
a. Select the <strong>HP</strong> <strong>8753E</strong> as the system controller:<br />
(Local.. _ .__.;;;;;;;;~.;;.; ::::,.;;;;;;:;;;,.;:_ i :z
Adapter Removal Calibration<br />
13. Connect the equipment as shown in the Figure 2-38:<br />
*DIRECT<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
PORT I I [PORT 2<br />
Cm) TO Cm) ADAPTER<br />
TYPE-N ( f )<br />
TO TYPE-N (f)<br />
24 INCH<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
Cm) TO (m) ADAPTER<br />
TYPE-N (f)<br />
TO TYPE-N ( f)<br />
t.lNlMm.4 LOSS PAD<br />
TYPE-N<br />
24 INCH<br />
Cm) TO (4<br />
24 INCH<br />
(ml TO Cm)<br />
Figure 2-38. Full 2-Port Calibration with Adapter Removal<br />
sg6118e<br />
System Verification and 2-83<br />
Performance Teete
14. Perform a full 2-port error correction with isolation.<br />
Note When you are performing error-correction for a system that has<br />
type-N test port connectors, the softkey menus label the sex of<br />
the test port connector-not t$ @bration standard connector.<br />
For example, the l&e1 ~tx#~~~~~~~~.~~ refers to the short that d<br />
be connected to the female test port.<br />
15. Save the results to disk. Name the lile “PORTl.”<br />
16. Move the adapter to reference test port 1 and perform another full 2-port<br />
error correction.<br />
17. Save the results to disk. Name the file “PORT2.”<br />
18. fiess Lcal) &$g ~~~~~~~~ ~~~~~~~~~~~~~.<br />
.; ..,..:.,,./...... I .,........ . . . . ..../........~........... . . . . . . . . . M . . . . . . . . . . . . . . . .;-, .,_, /;:..:..: ...... . . . . L..,. . . . . . . . . . . ..~.-...........~...............~.....~~.~~~.~.~.~.~~~..~~~.~.~.~.~~~~... . . . . . . . . . .<br />
i.<br />
19. kom .. _ ...... ::; :::: the ~~,..: disk . . . . :.::. directory, choose the We “PORTl”and press<br />
~~~~~~~~::;~~~~~~.<br />
~:.:.=,:.:.:.:.~,.:.:.:.:.:.:.:~~~~.~~,..~ ..__. ;....;&;. j _,__.,....i in__ _<br />
20. When this is complete, choose the fle “PORT2” and press<br />
,.,.,.,............ _; .,./ ;..; i..,...,............i<br />
~~~~~~~~~~~~~~~~.<br />
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<br />
21. When complete, press J$EJE#W.<br />
..~:::: i .._i..._<br />
22. m enter the adapter delay, press ;~~~~~~~ L.llo] m (default for<br />
i .: ::.. ....__... . . . . . . . As?=:: . . . . . . . . . . . . i_>~>.~..s.x~.. . . . . . :... .A.....
Measure Test Port 2 Magnitude Dynamic Accuracy<br />
25. Remove the type-N (f) to (f) adapter and connect the equipment as shown in<br />
Figure 2-39. Con&m that the step attenuator is set to 10 dB.<br />
<strong>HP</strong> B753E<br />
NETWORK ANALYZER<br />
WITH OPTION 075<br />
PORT 11 1 PORT 2<br />
110 dB<br />
STEP ATTENUATOR<br />
* ADAPTER<br />
<strong>HP</strong> B753E<br />
NETWORK ANALYZER<br />
a-<br />
PORT 11 I PORT 2<br />
* APC-7 TO<br />
TYPE-N (t)<br />
ADAPTER<br />
APC-7 TO<br />
TYPE-N (f) CABLE 500<br />
TYPE-N<br />
CABLE 50R<br />
24 INCH<br />
24<br />
TYPE-N<br />
INCH<br />
110 dB<br />
STEP ATTENUATOR<br />
*DIRECT CONNECTION<br />
Figure Z-39. Magnitude Dynamic Accuracy Measurement<br />
,g661e<br />
System Verification and 2-85<br />
Performance Tests
26. To set up the dynamic accuracy measurement, press the following:<br />
27- Wait for the sweep to finish, then press @i&i@ ~~~~~.~~~.~.~~ .._......_...__................~ - i .._. . . . . ,$k&#K&.<br />
..i. i.. :....... i . . . . . . . . . . . /<br />
28. Set the step attenuator to 0 dB.<br />
30. Write the mean value (which appears on the analyzer’s display) in the “Test<br />
Port Measurement” cohunn of the “Performance Test Record.” This column<br />
is also labeled “G.”<br />
31. Repeat steps 28 through 30 for each setting of the step attenuator.<br />
32. Calculate dynamic accuracy for each step by using the formula IG - FI.<br />
Place these values in the appropriate column of the “Performance Test<br />
Record. n<br />
2-85 System Verification and<br />
Performance Tests
Measure Test Port 1 Magnitude Dynamic Accuracy<br />
33. Set the step attenuator to 10 dB.<br />
34. To set up the dynamic accuracy measurement, press the following:<br />
35. W& for the sweep to finish, then press (m) f&$3 ,;& w,. &&$g&,&&<br />
......... . . .... . . /i... ~.~.ii~~...~.~.~ ..__i..::::..~~: . . . . . . . . . .... . . . . ..../...........<br />
. . . . . . /.~.zu~ i.... LSS.. *<br />
36. Set the step attenuator to 0 dB.<br />
38. Write the mean value (which appears on the analyzer’s display) in the “Test<br />
Port Measurement” colrmm of the “Performance Test Record.” This column<br />
is also labeled “G.”<br />
39. Repeat steps 36 through 38 for each setting of the step attenuator.<br />
40. Calculate dynamic accuracy for each step by using the formula IG - FI.<br />
Place these values in the appropriate column of the “Performance Test<br />
Record. n<br />
In Case of Difkulty<br />
1. If the analyzer fails the test at ALL power levels, be sure you followed the<br />
recommended attenuator settings as listed in the “Performance Test Record.”<br />
Repeat this performance test.<br />
2. If both test port measured values are out of specifications:<br />
a. Recalibrate the power meter.<br />
b. Repeat this performance test.<br />
System Verification and 2-87<br />
Performance Teete
3. If the analyzer fails either test port 2 or test port 1 dynamic accuracy at<br />
lower power levels:<br />
a. Perform the “IF Amplifier Correction Constants” and “ADC Offset<br />
Correction Constants” procedures (located in Chapter 3, “Adjustments and<br />
Correction Constants”).<br />
b. Repeat this performance test.<br />
c. If it stiII fails, replace the A10 Digital IF assembly.<br />
d. Repeat the two adjustment procedures mentioned in this step and then<br />
repeat this performance test.<br />
2-88 System Verification and<br />
Performance Tests
14. T&t Port Receiver Magnitude Compression<br />
Specifications<br />
Frequency Range ‘Jkst Port Magnitude1<br />
300 kHz to 3 GHz Port 1 so.45 dB<br />
3 GHz to 6 GHz* Port 1 10.80 dH<br />
300 kHz to 3 GHz Port 2 LO.45 dB<br />
3 GHz to 6 GHz* Port 2 ~0.80 dB<br />
1 With a 10 Hz IF bandwidth.<br />
2 OnIy for maIyzers with Option 006 - 30 IcHz to<br />
6 GHz range.<br />
Required Equipment for 5On <strong>Analyzer</strong>s<br />
Cable, APC-7, 24-inch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 8120-4779<br />
Required Equipment for 75 ohm <strong>Analyzer</strong>s<br />
Cable, 750, Type-N, 24-inch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 8120-2408<br />
Anul~zerwarmuptime:1hour<br />
Perform this test to verify the compression/expansion magnitude levels of the<br />
analyzer’s test port receiver samplers.<br />
System Verification and 2-88<br />
Performance Tests
l4- At the end of the sweep, press [mf) ,~~~~~~~.<br />
,.::::.:: . . . . . . .<br />
. . . . . ..~.....~ . . .. . ..A . ..>.a>: . . . . . . . . . . . . . .A.. . . . . s . . . ..i. . >>>>.<br />
17. Write the absolute value of marker 2 in the “Performance Test Record. n<br />
18. Repeat steps 12 through 17 for the other frequencies listed for Port 2 on the<br />
“Performance Test Record. n<br />
Test Port 1 Magnitude Compression<br />
. . . . . . . . . . . . . . . . . . . . . . ..~~.................,:::::: .:::::: :::.::<br />
19. Press (Meas) ~~~~~~~~~~~ :;~,~~~~.~~~~~~~.<br />
20- Press B i&ii+. 3!J#.iJQ~~ [sol (TiJiJ<br />
.._.._.... - -<br />
25. Write the absolute value of the marker 2 reading in the “Measured Value”<br />
column of the “Performance Test Record. n<br />
26. Repeat steps 20 through 25 for the other CW frequencies listed for Port 1 in<br />
the “Performance Test Record.”<br />
In Case of DifIkulty<br />
1. If the analyzer fails “Test Port 2 Magnitude Compression”:<br />
a. Repeat this test.<br />
b. Replace the A6 B sampler assembly if the analyzer stiII fails the test.<br />
2. If the analyzer fails “Test Port 1 Magnitude Compression”:<br />
a. Repeat this test.<br />
b. Replace the A5 A sampler assembly if the analyzer stiII fails the test.<br />
System Verification and 2-81<br />
Performance Tests
15. Test Port Receiver Phase Compression<br />
Specifications<br />
CW Frequency lkst Port Phase1<br />
300 kHz to 3 GHz Port 1 16”<br />
3 GHz to 6 GHz2 Port 1 57.5”<br />
300 kHz to 3 GHz Port 2 16”<br />
3 GHz to 6 GHz2 Port 2
Test Port 2 Phase Compression<br />
1. Connect the equipment as shown in Figure 2-41.<br />
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
Figure 2-41. ‘Ikst Port Phase Compression ‘&St SetUP<br />
11. Write the absolute value of the marker 2 reading in the “Measured Value”<br />
coh,unn of the “Performance Test Record.”<br />
12. Repeat steps 5 to 11 for the other CW frequencies listed for Port 2 in the<br />
“Performance Test Record. *<br />
System Verification and 2-83<br />
Performance Tests
lkst Port 1 Phase Compression<br />
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . _ . ...:... :.: .:,, ~” ,.,;...<br />
15. Press LMenu) ~~~~~~ t&gggy.<br />
:~=~.::.i::..-.::~~...::::~:~~ . . :::::;::;;;s:.i .;::..L.i..i . i sm>../<br />
16. At the end of the sweep, press LScaleJ -~~~~~.<br />
17. Press (j-f-&q ;m.<br />
:cl’x< ‘-.;..<br />
.@&$;i,F;,;$~i<br />
. ..=.;.., ” ..a;::<br />
(jj, ~~~~~ ~~~~~~~.<br />
..X....~...~ .. . . . . . . . . . . . . I_.......... . . . . . . 2s . . . . . . . i.......i.. .<br />
. . . . . . . . . . . w~.u_I..: . . . .<br />
A...:..-.:::.. . . . . . . . . . . . . s.,.. . . .<br />
. . . . . X. . . . . ...//_. i...........,.......~.~~~ .._................ ..__.........._,...........<br />
,.....<br />
18. Press ~ ;~~~ CMarker Fct”, ~~~~ ~~,:,,~:,~~~~~.<br />
19. Write the absolute value of the marker 2 reading in the “Measured Value”<br />
column of the “Performance Test Record.”<br />
20. Repeat steps 14 to 19 for the other CW frequencies listed for Port 1 in the<br />
“Performance Test Record. ’<br />
ln Case of DifEculty<br />
1. If the analyzer fails the “Test Port 2 Phase Compression” test:<br />
a. Repeat this test.<br />
b. Replace the A6 B sampler assembly if analyzer still fails the test.<br />
2. If the analyzer fails the “Test Port 1 Phase Compression” test:<br />
a. Repeat this test.<br />
b. Replace the A5 A sampler assembly if analyzer still fails the test.<br />
2.94 System Verification and<br />
Performance Tests
16. Test Port Output/Input Harmonics (Option 002<br />
<strong>Analyzer</strong>s without Option 006 Only)<br />
Specilkations<br />
lkst Port Harmonic Limit<br />
output 2nd c-25 dBc @I + 10 dBm<br />
Output 3rd c-25 dBc @I + 10 dBm<br />
Input Port 1 2nd c-15 dBc @ +8 dBm<br />
InDut Port 1 3rd c-30 dBc @ +8 dBm<br />
1 Inout Port 2 1 2nd 1
Test Port Output Worst Case 2nd Harmonic<br />
1.<br />
2.<br />
3.<br />
4.<br />
5.<br />
6.<br />
7.<br />
8.<br />
9.<br />
Press IstartJ (iZJ (E&J IstopJ 11.51 Cc/n] to set the frequency range.<br />
Press m ~~~~~~ [lol @ to set the IF bandwidth to 10 Hz.<br />
Connect the equipment as shown in Figure 2-42.<br />
20 dE FIXED<br />
ATTENUATORS<br />
H P i3753E<br />
PORT 11 I PORT 2<br />
CABLE APC-7<br />
2V INCH<br />
MINIMUM LOSS PAD<br />
20 dB FIXED<br />
ATTENUATORS<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
WITH OPTION 075<br />
ip<br />
MINIMUM LOSS F‘AD<br />
CABLE TYPE-N<br />
Figure 2-42. ‘l&t Port Output Harmonics ‘Ikst Setup<br />
._........_..........................; . .. . . . . . . . . . . . ,.,., ;...<br />
~~~~~ one sweep, press [m, ~~~~~~~ to get a better viewing of the<br />
trace.<br />
2-96 System Verification and<br />
Performance Tests
10. Write the marker 1 value (which appears on the analyzer display) on the<br />
“Performance Test Record. n This is the worst case test port output 2nd<br />
harmonic<br />
Test Port Output Worst Case 3rd Harmonic<br />
11. Press @ 0 @JJ to change the stop frequency to 1 GHz.<br />
_ ., _ . . . . . . . . . . . . . . . . . . . . . .,., .,.:<br />
12. Press @iiG) lfi&JfQggQ i#Ei& lQk!B!~~~E lI&!j@~.<br />
,... .,.., ,. i<br />
13. After one sweep, press @j@ ‘~~~~~~~~~. &&&&f@f to nom&e the<br />
.._... ..__.................~...... /i<br />
trace.<br />
.*.....<br />
14. Press Is-= ~~~~~ )i ~~~~~~ @ (xl) to get a better viewing of<br />
the trace.<br />
i . . . . . . . ..I . . . ..;;:. . :.:.<br />
15. Press @ZE) ~~~~~~~~~ ~~~~~~.~~~.<br />
16. After one sweep, press &XT@ ~~~~~~~~.<br />
17. press (m) ~~~~ ‘~~:~~~~.<br />
.._ _~...............................i i . . . . . . . . . . . . . . . . . ..~. . ii . . . . . . . _ ..:..<br />
18. Write the marker 1 value on the “Performance Test Record.”<br />
Port 1 Input Worst Case 2nd Harmonic<br />
19. Connect the equipment as shown in Figure 2-43.<br />
System Verification and 247<br />
Performance Tests
Port 1 Input Worst Case 3rd Harmonic<br />
29. Press m @ m to change the stop frequency for measuring the receiver<br />
3rd harmonic<br />
35.<br />
..; . . . . . . . . . . . .<br />
Press @jij) ~~~,~~~~~ ~~~~~~.<br />
:.:.:: . . . . . . . . .._~.-.............~~~...~ .<br />
.A.. x::.....i.::~~ . . . . . . ..~.~ . . :::. . ..A...? .i i.>ASS ii ~.~.~.~.~.~.~.~.~.~.~~_/.~.~.~.~..~.~..<br />
36. Write the marker 1 value on the “Performance Test Record.”<br />
..;. ,. . ,...........................<br />
. . . . . . . . ..:.:.:.:.....:.....:.:...:.... . . . . . . . . . . ..p (,Z... :.:,: .:.::.: ._ _ . . . . . . . . . . . .,..,.,.,; . . . . . . . _... . . . ../ ;; _ . . . . . ::.....: i ..:.zE:: . . . . . .A.....<br />
. i..........~.............. . . . . .::::.:... . . a.2 ~~~~~~~~~~~~.<br />
. . .._ . . ~....i.i_.......i .._.............<br />
Port 2 Input Worst Case 2nd Harmonic<br />
38. Press Istoe) (XJ @J to set the stop frequency for measuring the 2nd<br />
harmonic<br />
d ,. *;... ..,:~..::::.:.:.::.::.:.::.<br />
.. ,,,.,, __, ,,,,..... .: ::. :: .) 7Li . . . >A. . . . i........~..-. ..._......... --~.r.&-~: . . . . . . . ..A . . . . . . .<br />
::.:::::::.. ‘?. T ..mr ::Gs.m.; :s,.
Port 2 Input Worst Case 3rd Harmonic<br />
45. Press Lstoe) (iJ LG/n to change the stop frequency for measuring the receiver<br />
3rd harmonic<br />
46, mess csystem, ~~~~~~~, . . . . . . . . :... . . . . . . .. . . . . . ._ ~~~~~~~~~~.<br />
..~.,<br />
..,... ..._ _ .. . . . .._....~ . .<br />
~.,.,.,.,.,.,..... _ . . . . . . . .._ ___ . ..=<br />
_ _ . . . . . _ . . . . . . . . . . . . . . . .<br />
47. Mter one sweep, press w ~~~~~~~~~ ~gg$~~mI to nomm the<br />
../ ..:...,-... . . ..u;..: . . . . . . . i.........-~.....~~.~.~.~~.....~...... . . . . . . .<br />
ii.. . ..A............. . i.::...:..<br />
trace.<br />
w:........... ‘yg ~Eg
17. ‘I&t Port Output/Input Harmonics (Option 002<br />
<strong>Analyzer</strong>s with Option 006 Only)<br />
Specifications<br />
Equipment Required<br />
T&t Port Harmonic Limit<br />
<DUt 2nd c-25 dBc @I + 10 dBm<br />
I output I 3rd I
Test Port Output Worst Case 2nd Harmonic<br />
l- Press (jjj (jj) .$$w .::.i 2: . . . ..i. . . _..... .:::., Ilo) Ixl) to set the test port power to + 10 dBm.<br />
2. Press m (16) a @ @ Cc/n to set the frequency range.<br />
3. Press &iJ ~&$&& @ Lxl] to set the IF bandwidth to 10 Hz.<br />
4. Connect the equipment as shown in Figure 2-44.<br />
20 CIB FIXED<br />
ATTENUATORS<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
PORT 1 1 PORT 2<br />
CABLE APC-7<br />
24 INCH<br />
Figure Z-44. ‘l&t Port Output Harmonics ‘lkst Setup<br />
s g629e<br />
6. After one sweep, press ~~~ ~~~~~~~~~~~ ~~~~~~~; to normalize the<br />
i” i:::: ._.. c: _... i.i . .._............. ii SW... - .._....._... - ..__....<br />
trace.<br />
....
Test Port Output Worst Case 3rd Harmonic<br />
11. Press @ 0 m to change the stop frequency to 2 GHz.<br />
s ; ; ;.. .. . . .+. :-. .~. :,:., $<br />
,,.,.,.,.,.,.,.,...,.......... . . . . . _ . . . . ; .A.. ~......~.~.~.~._i ..: L.. . . . . . . . ... . . . . . >..T . . ..::: ..: -.L ./._../ .. . i . . .._ .:: ....: -<br />
16. After one sweep, press CSca,e Rep ~~~~~~~~;.<br />
..., ,.... .,. ,..., / .,,.., /, . . .<br />
17-<br />
_ ‘.i..: .,,, :I,, ... .;;.::. . . . . . ;.:.:.:<br />
Press ljiiZXGFctn_) ~~~~~~ ~~~~~.~~.<br />
18. Write the marker 1 value on the “Performance Test Record.”<br />
System Verification and 2-l 03<br />
Performance Tests
Port 1 Input Worst Case 2nd Harmonic<br />
19. Connect the equipment as shown in Figure 2-45.<br />
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
- I I<br />
-<br />
PORT 1 PORT 2<br />
I I CABLE APC-7<br />
Fiiure Z-45. Eeceiver Harmonics lkst Setup<br />
22. Press m (16) m m @ Lc/n to set the frequency range.<br />
. . . . . . . . . . . ., . . ..~...:.:.:.:.~.:.:. ‘:.:.:.:...:.:.:...:,:~:::.:~.,:.:..::~,,:,,<br />
24. After one sweep, press m ~~~~~~~~~~~ ~~~~~~~ to nom&e the<br />
-..... _ .~..................... ____..i . . . . . . .i_ .. . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -SW . . . . . . 2:: . . . . . . 3: . ...=... i....~...............<br />
trace.<br />
26. After one sweep, press Cm. ~~~~~~~~~~ to get a better tiewing of the<br />
trace.<br />
A . . . . . . . . . . . . . . . . . . .. ,..,.. . ..: ,,..A/ . . . . . ...i.l.z:>;><br />
28. Write the marker 1 value (which appears on the analyzer display) on the<br />
‘Performance Test Record.” This is the worst case port 1 input (receiver<br />
channel A) 2nd harmonic<br />
2-l 04 Systam Verification and<br />
Performanw Tests<br />
sg630e
Port 1 Input Worst Case 3rd Harmonic<br />
35.<br />
., ..:....:.:.:.:.:.:.:.:.:. .~.~.~.~.~.~.~.~.~.~_.~~,~~~,~,~_.~~.~.,_., .. . . . . . . . . ,,;..::; ,...:::.., ..:.:.:.:.:.:.:<br />
press [j) ~~~~~ ~~~~~.<br />
36. Write the marker 1 value on the “Performance Test Record.”<br />
: 7:. _ :.:.:.:.~:...:.:.:.:.:.:...~::<br />
37. press (T-1 ~~~~~,~~~~~ -i~~~~~~~~~~~.<br />
Port 2 Input Worst Case 2nd Harmonic<br />
43* Press cm, ;~~~~ ~~~~~.<br />
i /..........//~..... ~.~..~~~.~.~........................~~.~ . . . . . . ~.~.~...~......................~.~ .._ -_..- _... -<br />
44. Write the marker 1 value (which appears on the analyzer display) on the<br />
“Performance Test Record.” This is the worst case port 2 input (receiver<br />
channel B) 2nd harmonic<br />
System Verification and 2-l 05<br />
Performance Tests
Port 2 Input Worst Case 3rd Harmonic<br />
. . . . . . . . . . . . . . . . . . . . . . .<br />
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<br />
. . .<br />
45. Press &TJ (FJ (ZJZJ to change the stop frequency for measuring the receiver<br />
3rd harmonic<br />
. . . J
18. ‘Ikst Port Output Harmonics<br />
(<strong>Analyzer</strong>s without Option 002)<br />
Speciikations<br />
1 For <strong>HP</strong> 87633 Option 075: + 8 dF%m source output;<br />
limits valid for frequencies below 2 GHz<br />
Equipment Required for 50 ohm <strong>Analyzer</strong>s<br />
Spectrum analyzer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 85953<br />
Cable, 509, type-N (m) to type-N (m), 24-inch . . . . . . . . . . . . . . . <strong>HP</strong> P/N 81204781<br />
Adapter, APC-7 to type-N (f) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 11524A<br />
Adapter, type-N (m) to BNC (f) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<strong>HP</strong> P/N 1250-1476<br />
Cable, 503, BNC (m) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 8120-1840<br />
Additional Equipment Required for 75 ohm <strong>Analyzer</strong>s<br />
Minhmmvloss pad . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 11852B<br />
z.$r warmup time: 30 minutes (network analyzer and spectrum<br />
Perform this test to determine the spectral purity of the network analyzer<br />
RF source. Use this procedure with <strong>HP</strong> <strong>8753E</strong> network analyzers without<br />
Option 002 (harmonic measurement capability).<br />
System Verification and 2-l 07<br />
Performance Tests
Procedure<br />
1. Calibrate the spectru?n analg~:<br />
a. Connect the BNC cable between the spectrum analyzer CAL OUT<br />
connector and the 508 input. Use the type-N (m) to BNC (f) adapter at the<br />
5OQ input.<br />
b. FVess m).<br />
f. Remove the BNC cable and adapter.<br />
2. Connect the equipment as shown in F’igure 2-46.<br />
2-l 08 System Verification and<br />
Performance Tests
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
PORT 1<br />
*DIRECT CONNECTION<br />
ADAPTER<br />
APT: TO TYPF-N if)<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
WITH OPTIONS 075<br />
SPECTRUM ANALYZER<br />
.<br />
4’<br />
CABLE<br />
50R TYPE-N 24 INCH<br />
Cm) TO Cm)<br />
Figure Z-46. ‘lkst Port Output Harmonics Ttkst Setup<br />
3. Set the netuwrk analgm source power to + 10 deem:<br />
a. Press @iERJ.<br />
b. Press @i’GZ).<br />
f ,..‘) .~: .y<<br />
d. Press Llo] [x. (For 750 analyzers, press (ZJ @‘J)<br />
e. press:~:<br />
- ::. .._....... ::::. - ,, . -<br />
Syotem Verification and 2-l 09<br />
Pwformance Tests
4. Set up the spectrum anulgzer display:<br />
5.<br />
a. Press m.<br />
b. Press L2o)m.<br />
c. Press (E&J<br />
d. Press (3ooJ m.<br />
.““” . . . . ,. . .,... . . . . ~ . . . . . ~::::::, ::::::::. :::..::..:::::<br />
e. press ~~#~~~~~~~~:.<br />
f. Press @ @%Q.<br />
g. Press QiiKiFS].<br />
.,.. ,...; .:::.: : . . . .,.w.,.,.,. . . .. . . . . . . . ;,.a . . . . . . . . . . .: . . .<br />
h. Press .~~~~~~~.<br />
- .._ - .._.. -...<br />
i. Press (iZJ @KY).<br />
Set the network anulgzer and spectrum analyzer to the harmonic frequency.<br />
Use the appropriate test record to choose the proper harmonic frequency.<br />
Refer to the test record in Section 2a for 3 GHz network analyzers, or the<br />
test record in Section 2b for 6 GHz network analyzers.<br />
� <strong>Network</strong> Anulyzer<br />
a.<br />
b.<br />
c.<br />
d.<br />
e.<br />
f.<br />
g.<br />
h.<br />
i.<br />
2-l 10<br />
Press ~~:~~~~<br />
,. . ...::./ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . *<br />
_._- . - ._.._. --.<br />
Enter the harmonic frequency from the test record. For example, press<br />
(iZJ m to set the network analyzer to the second harmonic of the first<br />
ftmdamental frequency in the 3 GHz test record.<br />
� Spectrum Analgger<br />
Press(jm).<br />
Enter the harmonic frequency from the test record. For example, press<br />
(iCJ @ to set the spectnmt analyzer to the second harmonic of the first<br />
fundamental frequency in the 3 GHz or 6 GHz test record.<br />
Pressfjj).<br />
Press ~~~~~~~.<br />
Press @EDiiF).<br />
Press LMKR).<br />
_ ; ,... :.:.,.:.:.:.:.:.;..‘.:::.:.:.<br />
Press ;~~~.<br />
System Verification and<br />
Performance Tests
6. Set up the network unuZ@zr to output the fundamental frequency:<br />
/ .: ...:....;. ... .<br />
.,.<br />
a. Press ~$Bj$gi$.<br />
b. Enter the fundamental frequency. For example, press lso) m to enter<br />
the hrst fundamental frequency in the 3 GHz test record.<br />
7. Measure and record the power in the second or third harmonic by taking a<br />
single sweep with the spectrum aruzlgzer:<br />
a. Press @iTZVKQ.<br />
b. Read the MARKER A measurement, and record it in the appropriate row<br />
of the test record under Measurement Value (dBc).<br />
8. Reset the spectrum un&z@r marker:<br />
9. Repeat steps 5 through 8 for the remaining second and third harmonic<br />
frequencies, and the fundamental frequencies listed in the test record.<br />
System Verification and 2-111<br />
Performance Tests
Performance Xkst Record<br />
For <strong>Analyzer</strong>s with a Frequency Range of<br />
30 liEIz to 3 GHz<br />
2a<br />
Note See the next “Performance Test Record” section if your analyzer<br />
frequency range is from 30 kHz to 6 GHz (Option 006).<br />
Performance Test Record 2a-1
<strong>HP</strong> <strong>8753E</strong> Performance Test Record (1 of 13)<br />
Calibration Lab Address: Report Number<br />
Model <strong>HP</strong> <strong>8753E</strong><br />
Serial No.<br />
F’irmware Revision<br />
Ambient Temperature<br />
‘Ikst Equipment Used:<br />
Description Model Number<br />
Frequency Counter<br />
Power Meter<br />
Power Sensor<br />
Calibration Kit<br />
Verification Kit<br />
Notes/Comments:<br />
2a-2 Performance Test Record<br />
Date<br />
Last Calibration Date<br />
Customer’s Name<br />
Performed by<br />
Option(s)<br />
’ C Relative Humidity %<br />
Trace Number CM Due Date
<strong>HP</strong> <strong>8753E</strong> Performance ‘l&t Record (2 of 13)<br />
For 30 kEIz-3 GHz <strong>Analyzer</strong>s<br />
Hewlett-lbkard Company<br />
vlodel <strong>HP</strong> <strong>8753E</strong> Report Number<br />
3erialNnmber Date<br />
b) 1. Test Port Ontpnt Frequency Range and Accuracy<br />
CW Preqnencies Results Measured<br />
(MW t=i WW El<br />
Mensnrement<br />
Uncertainty<br />
WW<br />
0.03 0.029999 7 0.030 000 3 fO.OOO 000 050<br />
0.3 0.299 997 0.300003 f0.000000520<br />
5.0 4.999 950 5.000 050 f 0.000 009<br />
16.0 15.999 840 16.000 160 l 0.000 028<br />
31.0 30.999 690 31.000310 f 0.000 054<br />
60.999999 60.999 390 61.000 610 f 0.000 106<br />
121.0 120.998 790 121.001210 f 0.000 207<br />
180.0 179.QQ8200 180.001800 f 0.000 307<br />
310.0 309.995 900 310.003106 f 0.000528<br />
700.0 699.930 000 700.007000 f0.001192<br />
1300.0 1299.987 1300.013 f 0.002 212<br />
2 ooo.0 1 999.980 2000.020 f 0.003 403<br />
3 ooo.0 2 999.970 3 000.030 f 0.005 104<br />
)) 2. External Source Mode Preqnency Range<br />
!kst Preqnencies (GHz) lh3Illts<br />
0.010<br />
0.020<br />
0.100<br />
1.000<br />
2.000<br />
3.000<br />
Performance Test Record 2a-3
EIP <strong>8753E</strong> Performance ‘Jkst Record (3 of 13)<br />
For 30 kHz-3 GHz <strong>Analyzer</strong>s<br />
Eewlett-Packard Company<br />
Model <strong>HP</strong> 87683 l&port Number<br />
Serial Number DlLt4?<br />
bb 3. Test Port Output Power Accuracy<br />
!lkst Frequencies n?st Port Speciilcation Measured Measurement<br />
output w9 Value Uncertainty<br />
Power 0-w WV<br />
(aBm)<br />
Center Frequency<br />
3oolcHz 0 fl f0.465<br />
20 MHz 0 fl f0.10<br />
5OMHZ 0 fl f0.10<br />
1OOMHZ 0 fl f0.10<br />
200 MHZ 0 fl f0.10<br />
500 MHz 0 � 1 f0.10<br />
1GHz 0 fl f0.13<br />
2GHz 0 fl f0.13<br />
3GHz 0 fl f0.27<br />
bb 4. ‘Jkst Port Output Power Range and Linearity<br />
T&t settings Eeslllts Power Level Specillcation Measnr ement<br />
Measured Linearity WI Uncertainty<br />
VW WI VW<br />
TW Frequency = 300 kHz<br />
- 15 f0.2 f0.03<br />
- 13 f0.2 f0.03<br />
- 11 f0.2 �0.03<br />
- 9 f0.2 f0.02<br />
-7 f0.2 f0.02<br />
-6 f0.2 f0.02<br />
-3 f0.2 � ����<br />
-1 f0.2 f0.02<br />
+l f0.2 f0.03<br />
+3 f0.2 f0.03<br />
+6 f0.5 f0.03<br />
2a4 Parfonnance Test Record
<strong>HP</strong> <strong>8753E</strong> Performance ‘I&t Record (4 of 13)<br />
For 30 kHz-3 GHZ <strong>Analyzer</strong>s<br />
Hewlett-Packard Company<br />
lode1 <strong>HP</strong> 8763E Report Number<br />
krial Number Date<br />
)) 4. !Cest Port Output Power Ra.nge and Linear5ty (continued)<br />
Test settings EesIllts Power Level Specification Measnrement<br />
Measured Linearity WV Uncertainty<br />
ow (W WI<br />
+7 f0.5 f0.03<br />
+8 f0.5 f0.03<br />
+Q f0.5 f0.03<br />
+ 10<br />
CW Frequency = 3 GHz<br />
f0.5 f0.03<br />
- 15 f0.2 �0.03<br />
- 13 f0.2 f0.03<br />
- 11 f0.2 f0.03<br />
- 9 f0.2 f0.02<br />
- 7 f0.2 f0.02<br />
-6 f0.2 f0.02<br />
- 3 f0.2 f0.02<br />
-1 f0.2 f0.02<br />
+l f0.2 f0.03<br />
+3 f0.2 f0.03<br />
+5 f0.6 f0.03<br />
+7 f0.5 f0.03<br />
+8 f0.5 f0.03<br />
+Q f0.6 f0.03<br />
+ 10 f0.5 f0.03<br />
Performance Test Record 2a-5
<strong>HP</strong> <strong>8753E</strong> Performance ‘l&t Record (5 of 13)<br />
For 30 kHz-3 GEz <strong>Analyzer</strong>s<br />
Hewlett-Ikckard Company<br />
Model <strong>HP</strong> 876QE Beport Number<br />
%xialNnmber Date<br />
bb6. MinimnmBChaunelLevel<br />
CW Prequency Speciilcation lkst Port Power<br />
WV<br />
Measurement<br />
Uncertainty<br />
m<br />
300 kH2 < -35 f 1.0<br />
3.29 MHz < -35 f 1.0<br />
3.31 MHZ < -35 f1.0<br />
15.90 MHz < -35 f1.0<br />
16.10 MHz < -35 f1.0<br />
30.90 MHz < -35 f 1.0<br />
31.10 MHz < -35 f1.0<br />
1.6069 GHz < -35 f1.0<br />
1.6071 GHz < -35 f1.0<br />
3.000 GHz < -35 f1.0<br />
bb 6. Test Port Input Noise Ploor Level<br />
Frequency Bange Test Port IP Specification Calculated Yeast-ement<br />
Bandwidth (-1 Value Uncertainty<br />
3OOkHz-3GHz Port 1 3lcHz - 82 N/A<br />
3OOkHz-3GHz Port 1 10 Hz - 102 N/A<br />
3OOkHz-3GHz Port 2 10 Hz - 102 N/A<br />
3OOkHz-3GHz Port 2 3kHz -82 N/A<br />
2a-6 Performance Test Record
<strong>HP</strong> <strong>8753E</strong> Performance Test Record (6 of 13)<br />
For 30 kEiz-3 GHz <strong>Analyzer</strong>s<br />
Hewlett-Packard Company<br />
Model <strong>HP</strong> 8763E Beport Number<br />
SerialNumber Date<br />
bb 7. Test Port Input Frequency Response<br />
Preqnency Bange Test Port Speci&ation Measured Value<br />
w9 WI<br />
300 kHz-3 GHz<br />
300 kHz-3 GHz<br />
Test settings<br />
CrosstdktoTfestPort2<br />
300 kHz-3 GHz<br />
Cro&aUc t.0 l&t Port 1<br />
300 kHz-3 GHz<br />
Port 2 fl<br />
Port 1 fl<br />
b) 8. Test Port Crosstalk<br />
SpeciHcation<br />
WI<br />
< -100<br />
< -100<br />
MeasuredValue<br />
WV<br />
Measurement<br />
Uncertainty<br />
uJ.9<br />
0.47<br />
0.47<br />
Measnrement<br />
Uncertainty<br />
N/A<br />
N/A<br />
Performance Test Record 2a-7
Hewlett-Packard Compnny<br />
Model <strong>HP</strong> 8768E<br />
<strong>HP</strong> <strong>8753E</strong> Performance TLkst Record (7 of 13)<br />
For 30 kHz-3 GEIz <strong>Analyzer</strong>s<br />
Serial Number D&4.?<br />
Forward Direction<br />
Directivity<br />
Directivity<br />
Forward Direction<br />
Source Match<br />
Source Match<br />
Forward Dim&ion<br />
Trans. Tracking<br />
l-rarls. Trackiug<br />
Forward Direction<br />
Rd. Tracking<br />
Refl. Tracking<br />
F&verse Direction<br />
Load Match<br />
Load Match<br />
Beport Number<br />
bb 9. Calibration CoeiHcients<br />
‘l&t Description Frequency Hange Spee.<br />
VW<br />
2a-8 Performance Test Record<br />
300 kHz -1.3 GHz<br />
1.3GHz-3GHz<br />
2 35 f 0.9<br />
230 f 0.8<br />
300 kHz -1.3 GHz > 16 f 0.2<br />
1.3GHz-3GHz 1 16 f 0.2<br />
300 kHz -1.3 GHz<br />
1.3GHz-3GHz<br />
3OOkHz- 1.3GHz<br />
1.3GHz-3GHz<br />
f1.5<br />
f 1.5<br />
� 1.5<br />
f1.5<br />
Measured Value Yeasnrement<br />
(W<br />
Uncertainty<br />
f 0.006<br />
f 0.009<br />
f 0.001<br />
f 0.005<br />
300 kHz -1.3 GHz 1 18 f 0.1<br />
1.3GHz-3GHz 2 16 f 0.2
<strong>HP</strong> <strong>8753E</strong> Performance ‘Ilest Record (8 of 13)<br />
For 30 kHz-3 GEL <strong>Analyzer</strong>s<br />
Hewlett-Packard Company<br />
Model <strong>HP</strong> 8766E I&port Number<br />
SerialNumber Dllh?<br />
bb 9. Calibration Coefficients (continued)<br />
Test Description Freqnency Bange SW. Measured Value Measurement<br />
(-1 WI Uncertainty<br />
WI<br />
Reverse Direction<br />
Trans. Tracking 300 kHz - 1.3 GHz f 1.5 f 0.006<br />
Trans. Tracking 1.3GHz-3GHz f 1.5 f 0.009<br />
Forward Direction<br />
Load Match 3OOkHz-1.3GHz 1 18 f 0.1<br />
Load Match 1.3GHz-3GHz 1 16 f 0.2<br />
Reverse Direction<br />
Directivity 300 kHz - 1.3 GHz > 35 f 0.9<br />
Dire&vi@ 1.3GHz-3GHz 130 f 0.8<br />
Reverse Direction<br />
Source Match 300 kHz - 1.3 GHz 2 16 f 0.2<br />
Source Match 1.3GHz-3GHz 1 16 f 0.2<br />
Reverse Direction<br />
Ben. Tracking 3OOkHz-1.3GHz f 1.5 f 0.001<br />
Beil. Traclciug 1.3GHz-3GHz f 1.5 f 0.005<br />
Performance Test Record 2a-9
<strong>HP</strong> <strong>8753E</strong> Performance ‘I&t Record (9 of 13)<br />
For 30 kHz-3 GEJz <strong>Analyzer</strong>s<br />
Hewlett-l%ckard Company<br />
Model <strong>HP</strong> 8762E Beport Number<br />
Serial Number Date<br />
CW Frequency<br />
WW<br />
3<br />
3<br />
3<br />
3<br />
bb 10. System Trace Noise<br />
Bati Specj&ation<br />
An3 18 f1.5<br />
1.3 GHz-3 GHz Port 1 1 16 f1.5<br />
2a-10 Performance Test Record
<strong>HP</strong> <strong>8753E</strong> Performance Test Record (10 of 13)<br />
For 30 kHz-3 GHz <strong>Analyzer</strong>s<br />
Iewlett-Packard Company<br />
lode1 JJP 8763E Report Number<br />
lerial Number Date<br />
bb 13. Test Port Receiver Magnitude Dynamic Accuracy<br />
G F IG - FI<br />
Test Port 8496A l&t Port Expected Dynamic SF. Meas.<br />
Input Power Attn. Measurement Meamrement A-==Y PI Uncer.<br />
VW 0-w WI (corrected) (C&alated) 0-w<br />
PI<br />
l&t Port 2<br />
- 10 0 5 0.033 f 0.008<br />
-2o(Ref) 10 0.000
<strong>HP</strong> <strong>8753E</strong> Performance lkst Record (11 of 13)<br />
For 30 kHz-3 GHz <strong>Analyzer</strong>s<br />
EewletMa&ard Company<br />
Model <strong>HP</strong> 8766E Beport Number<br />
h-id Number Date<br />
)b 14. Test Port Receiver Magnitnde Compression<br />
CW Frequency Test Port MeamredVhlue Specification Measur ement<br />
(aB) WV Uncertainty<br />
50 MHZ Port 2 5 0.45 NIA<br />
1GHz Port 2 5 0.45 N/A<br />
2GHz Port 2 5 0.45 N/A<br />
3GHz Port 2 5 0.45 N/A<br />
5OMHZ Port 1 5 0.45 NIA<br />
1GI-h Port 1 5 0.45 NIA<br />
2GHz Port 1 5 0.45 N/A<br />
3GI-h Port 1 5 0.45 NIA<br />
bb 16. lbt Port Receiver Phase Compression<br />
CW Frequency lbst Port MeasnredValne Specification Measurement<br />
okP=) @%-=9 Uncertainty<br />
5OMHZ Port 2 5 6” NIA<br />
1GHz Port 2 5 6O N/A<br />
2GI-h Port 2 5 6O NIA<br />
3GH.z Port 2 5 6“ N/A<br />
50 MHz Port 1 5 6O NIA<br />
1GHz Port 1 5 6O N/A<br />
2GHz Port 1 5 6O N/A<br />
3GHz Port 1 5 6O NIA<br />
2a-12 Performance Test Record
<strong>HP</strong> <strong>8753E</strong> Performance lkst Record (12 of 13)<br />
For 30 kHz-3 GHz <strong>Analyzer</strong>s<br />
Eewlett-Packard Company<br />
Model <strong>HP</strong> <strong>8753E</strong> Beport Number<br />
BerielNumber Date<br />
)) 16. Test Port OutpW/lnput Harmonics (Option 002 without Option 006)<br />
‘l&t Description Speciikntion Meamrement Value Measurement<br />
w-3 (-3 Uncertainty<br />
WV<br />
l&t Port output<br />
HZ3llUOtiCS<br />
2nd
<strong>HP</strong> <strong>8753E</strong> Option 011 Performance lkst Record (13 of 13)<br />
For 30 kHz-3 GHz <strong>Analyzer</strong>s<br />
3ewlettPackard Company<br />
Bode1 <strong>HP</strong> 8762E Beport Number<br />
krial Number Date<br />
W 18. lbst Port Output Jhrmonics (Ansly7,ers without Option 002)<br />
Second Harmonic FbndamenW SpeciIkation Measurement blue Measurement<br />
Frequency Fhqnenc y ww Pw Uncertainty<br />
W)<br />
1OOMHZ<br />
1.0 GHz<br />
2.4 GHz<br />
3.0 GHz<br />
Third Harmonic<br />
Frequency<br />
300 MHz<br />
1.2 GHz<br />
2.7 GHz<br />
3.0 GHz<br />
2a-14 Performance Test Record<br />
50 MHz 525 f1.6<br />
500 MHz 525 f1.6<br />
1.2 GHz 525 f 1.6<br />
1.5 GHz 525 f1.6<br />
100 MHz 5 25 f1.6<br />
4OOMHZ 525 f1.6<br />
900 MHz 5 25 f1.6<br />
1GHz 525 f1.6
Performance Xkst Record<br />
For <strong>Analyzer</strong>s with a Frequency Range of<br />
30 kHz to 6 GHz<br />
Note See the previous “Performance Test Record” section if your<br />
analyzer frequency range is from 30 kHz to 3 GHz.<br />
2b<br />
Performance Test Record 2b-1
<strong>HP</strong> <strong>8753E</strong> Performance ‘I&t Record (1 of 15)<br />
Calibration Lab Address: Report Number<br />
Model <strong>HP</strong> 87533 Option 006<br />
Serial No.<br />
Firmware Revision<br />
Ambient Temperature<br />
‘I&t Equipment Used:<br />
Description Model Number<br />
kequency Counter<br />
Power Meter<br />
Power Sensor<br />
Calibration Kit<br />
Verification Kit<br />
Notes/Comments:<br />
Date<br />
Last Calibration Date<br />
Customer’s Name<br />
Performed by<br />
Option(s)<br />
o C Relative Humidity %<br />
Trace Number Cal Due Date<br />
I I<br />
I I<br />
2b-2 Performance Test Record
<strong>HP</strong> <strong>8753E</strong> Performance Test Record (2 of 15)<br />
For 30 kHz-6 GEz <strong>Analyzer</strong>s<br />
tIewletGPackard Company<br />
Model <strong>HP</strong> 87683 Option 006 Beport Number<br />
3erialNumber Date<br />
lb3t Frequencies<br />
(MW<br />
bb 1. Test Port Output Frequency Range and Accuracy<br />
&z)<br />
Results Measured<br />
(MW El<br />
Measurement<br />
Uncertainty<br />
WJW<br />
0.03 0.029999 7 0.0300003 f0.000000050<br />
0.3 0.299 997 0.300 003 f0.000 000 520<br />
5.0 4.9QQ 950 5.000 050 f 0.000 009<br />
16.0 15.999 840 16.000160 f 0.000 028<br />
31.0 30.999 690 31.000 310 f 0.000 054<br />
80.999 999 6O.QQQ3QO 61.000610 f 0.000 105<br />
121.0 120.998 790 121.001210 f0.000207<br />
180.0 179.QQ8200 180.001800 f 0.000307<br />
310.0 309.995 900 310.003100 f 0.000 528<br />
700.0 699.930 000 700.007000 f 0.001 192<br />
1300.0 1299.987 1300.013 f 0.002 212<br />
2 000.0 1999.980 2000.020 f 0.003 403<br />
3 000.0 2 999.970 3000.030 f 0.005 104<br />
4.0 3.QQQQ60 4.000 040 f 0.008 805<br />
5.0 4.QQQQ50 5.000050 f 0.008 506<br />
6.0 5.QQQ940 6.000 060 f 0.010207<br />
Perfomance Test Record 2b3
<strong>HP</strong> <strong>8753E</strong> Performance ‘l&t I&cord (3 of 15)<br />
For 30 kHz-6 GHz <strong>Analyzer</strong>s<br />
Elewlett-Packard Company<br />
Model <strong>HP</strong> 8763E Option 006 Report N&r<br />
Serial Number Date<br />
bb 2. Extemsl Source Mode F’reqnency Range<br />
Test Frequencies (GHz) Result<br />
0.010<br />
0.020<br />
0.100<br />
1.000<br />
2.000<br />
3.000<br />
4.000<br />
5.000<br />
6.ooo<br />
!lbt Frequency<br />
bb 3. Test Port Output Power Accmaey<br />
Test Port specification Measured Value<br />
ontpnt<br />
Power<br />
(aBm)<br />
PI (~1<br />
Measurement<br />
Uncertainty<br />
PI<br />
300 lcl-lz 0 i l i0.47<br />
20 MHz 0 i l i0.25<br />
50 MHz 0 i l i0.12<br />
100 MHz 0 i l i0.12<br />
200 MHz 0 i l i0.12<br />
500 MHz 0 fl i0.12<br />
1GHz 0 i l i0.12<br />
2GHz 0 i l i0.15<br />
3GHz 0 i l i0.15<br />
4GHz 0 i l i0.17<br />
5GI-h 0 i l i0.17<br />
6GI-h 0 i l i0.17<br />
2b4 Performance Test Record
<strong>HP</strong> <strong>8753E</strong> Performance ‘Ikst Record (4 of 15)<br />
For 30 kHz-6 GHz <strong>Analyzer</strong>s<br />
tIewlett-lkckard Company<br />
Ldodel <strong>HP</strong> 876SaE Option 006 Report Nnmber<br />
3erialNnmber Date<br />
bb 4. ‘lbst Port Output Power Range and Linearity<br />
Test settings lknllts Measured Power Level specmcation Mess.<br />
WV linearity (aB) Uncert.<br />
WI (W<br />
CW Frequency = 300 kHz<br />
- 15 i0.2 i0.03<br />
- 13 i 0.2 i0.03<br />
- 11 i 0.2 i0.03<br />
- 9 i 0.2 i0.02<br />
- 7 i0.2 i0.02<br />
- 5 i0.2 i0.02<br />
- 3 i0.2 i0.02<br />
-1 i 0.2 i0.02<br />
+l i 0.2 i0.03<br />
+3 i0.2 i0.03<br />
+6 i0.5 f0.03<br />
+7 i0.5 i0.03<br />
+8 i0.5 i0.03<br />
+Q i0.5 i0.03<br />
+ 10 i0.5 i0.03<br />
CW F'requency -3 GHz<br />
- 15 i 0.2 i0.03<br />
- 13 i0.2 i0.03<br />
- 11 i0.2 i0.03<br />
- 9 i0.2 i0.02<br />
- 7 i 0.2 i0.02<br />
- 5 i0.2 i0.02<br />
- 3 i0.2 i0.02<br />
-1 i0.2 i0.02<br />
+l f0.2 i0.03<br />
+3 i0.2 i0.03<br />
+5 i0.5 i0.03<br />
Performance Test Record 2b-5
<strong>HP</strong> <strong>8753E</strong> Performance ‘l&t Record (5 of 15)<br />
For 30 kHz-6 GEIz <strong>Analyzer</strong>s<br />
Hewlett-Packard Company<br />
Node1 <strong>HP</strong> 8763E Option 006 Report Number<br />
3erial Nnmber Date<br />
bb 4. Test Port Chzlxmt Power Ra<br />
Results Measured<br />
WV<br />
Test settings<br />
+7<br />
+8<br />
+Q<br />
+ 10<br />
CW Frequency = 6 GHz<br />
- 15<br />
- 13<br />
- 11<br />
- 9<br />
-7<br />
-5<br />
-3<br />
-1<br />
+l<br />
+3<br />
+5<br />
+7<br />
+8<br />
+Q<br />
+ 10<br />
2b-6 Performance Test Record<br />
ge and Linearity (<br />
Power Level<br />
Li=a-Y WI<br />
mtinned)<br />
Speciilclrtioll<br />
em<br />
i0.5<br />
i0.5<br />
i0.5<br />
i0.5<br />
i0.2<br />
i0.2<br />
i0.2<br />
i0.2<br />
i0.2<br />
i0.2<br />
i0.2<br />
i0.2<br />
i0.2<br />
f0.2<br />
i0.5<br />
i0.5<br />
i0.5<br />
i0.5<br />
i0.5<br />
MeIl.8.<br />
Uncert.<br />
(W<br />
i0.03<br />
i0.03<br />
i0.03<br />
i0.03<br />
f0.03<br />
i0.03<br />
i0.03<br />
i0.03<br />
i0.02<br />
i0.02<br />
f0.02<br />
i0.02<br />
i0.02<br />
i0.03<br />
i0.03<br />
i0.03<br />
i0.03<br />
i0.03<br />
i0.03
1Eewlett-Packard<br />
Company<br />
.1 Model <strong>HP</strong> 875QE Option 006 I&port Number<br />
c<br />
RP <strong>8753E</strong> Performance lkst Record (6 of 15)<br />
For 30 kHz-6 GElz <strong>Analyzer</strong>s<br />
SerialNumber Date<br />
lb 6. Minimum It Channel Level<br />
CW Frequency Specification Test Port Power<br />
PI<br />
Meaanrement<br />
Uncertainty<br />
(9<br />
300 kHz < -35 i 1.0<br />
3.29 MHz < -35 i 1.0<br />
3.31 MHz < -35 i 1.0<br />
15.90 MHz < -35 i 1.0<br />
16.10 MHz
I<br />
I<br />
J3P <strong>8753E</strong> Performance ‘Best Record (7 of 15)<br />
For 30 kHz-6 GHZ <strong>Analyzer</strong>s<br />
Hewlett-Packard Company<br />
Model <strong>HP</strong> <strong>8753E</strong> Option 006 Report Number<br />
Serial Number Date<br />
bb 7. Test Port Input Frequency Response<br />
Frequency Range lk?st Port Specilkation Meaared Value Meawrement<br />
(aB) om Uncertainty<br />
WV<br />
300kHz-3GHz Port2<br />
3OOkHz-3GHz Port1<br />
3GHz-6GHz Port1<br />
3GHz--6GHz Port2<br />
Test settings<br />
crosstallrto~stPort2<br />
3OOkHz-3GHz<br />
C~tQ%stPortl<br />
300kHz-3GHz<br />
C~toTestPortl<br />
3GHz-6GHz<br />
C~to'IlestPort2<br />
3GHz-6GHz<br />
2b-6 Performance Test Record<br />
il<br />
il<br />
i2<br />
i2<br />
1) 8. lkst Port crosstalk<br />
< -100<br />
< -100<br />
<strong>HP</strong> <strong>8753E</strong> Performance Test Record (8 of 15)<br />
For 30 kHz-6 GHz <strong>Analyzer</strong>s<br />
EewletWackard Company<br />
Model <strong>HP</strong> 87683 Option 066 Report Number<br />
SerialNumber Date<br />
W 9. Calibration Coeillcients<br />
Test Description Frequency Range Spx. Measured Valne Measuremen<br />
cm WV Uncertainty<br />
ow<br />
Forward Direction<br />
Directivity 300 kHz-1.3 GHz 2 36 i 0.9<br />
Directivity 1.3 GHz-3 GHz 130 i 0.8<br />
Directivity 3 GHz-6 GHz 2 25 i 0.8<br />
Forward Direction<br />
Source Match 300 kHz-1.3 GHz > 16 i 0.2<br />
Source Match 1.3 GHz-3 GHz 1 16 i 0.2<br />
Source Match 3 GHz-6 GHz > 14 i 0.3<br />
Forward Direction<br />
Trans. Tracking 300 kHz-1.3 GJ.-Iz i 1.5 i 0.006<br />
Trans. Tracking 1.3 GHz-3 GHz i 1.5 i 0.009<br />
Trans. Tracking 3 GHz-6 GHz i 2.5 i 0.021<br />
Forward Direction<br />
Refl. Tracking 300 kHz-1.3 GHz i 1.5 i 0.001<br />
Refl. Tradchg 1.3 GHz-3 GHz i 1.5 i 0.005<br />
Refl. Tracking 3 GHz-6 GHz i 2.5 i 0.020<br />
Reverse Direction<br />
bad Match 300 kHz-1.3 GHz 2 18 i 0.1<br />
Load Match 1.3 GHz-3 GHz 2 16 i 0.2<br />
bad Match 3 GHz-6 GHz 1 14 i 0.2<br />
Perfomance Test Record 2b-9
<strong>HP</strong> <strong>8753E</strong> Performance ‘Ikst Record (9 of 15)<br />
For 30 kHz-6 GHz <strong>Analyzer</strong>s<br />
Hewlett-Packard Company<br />
Model <strong>HP</strong> 8766E Option 666 Report Number<br />
Serial Number Date<br />
‘l&t Description<br />
Reverse Direction<br />
Trans. Tracking<br />
Trans. Tracking<br />
Trans. Tracking<br />
Forward Direction<br />
Load Match<br />
LoadMatch<br />
Load Match<br />
F&verse Direction<br />
Directivity<br />
Directivity<br />
Directivity<br />
Reverse Direction<br />
Source Match<br />
Source Match<br />
Source Match<br />
Reverse Direction<br />
Refl. Tracking<br />
Fkfl. Trsckjng<br />
R&l. Tracking<br />
2b-10 Performance Test Record<br />
bb 9. Calibration CoeiEcients (conthned)<br />
Measured Value<br />
(aB)<br />
300 kHz-1.3 GHz<br />
1.3 GHz-3 GHz<br />
3 GHz-6 GHz<br />
300 kHz-1.3 GHz<br />
1.3 GHz-3 GHz<br />
3 GHz-6 GHz<br />
300 kHz-1.3 GHz<br />
1.3 GHz-3 GHz<br />
3 GHz-6 GHz<br />
300 kHz - 1.3 GHz<br />
1.3GHz-3GHz<br />
3GHz-6GI-h<br />
300 kHz - 1.3 GHz<br />
1.3GHz-3GHz<br />
3GHz.-6GI-h<br />
i 1.5<br />
i 1.5<br />
f2.5<br />
2 18<br />
2 16<br />
> 14<br />
1%<br />
>30<br />
225<br />
1 16<br />
>_ 16<br />
2 14<br />
i 1.5<br />
i 1.5<br />
i2.5<br />
Measurement<br />
Uncertainty<br />
IdH)<br />
i 0.006<br />
i 0.009<br />
i 0.021<br />
i 0.1<br />
i 0.2<br />
i 0.2<br />
i 0.9<br />
i 0.8<br />
i 0.8<br />
i 0.2<br />
i 0.2<br />
i 0.3<br />
i 0.001<br />
i 0.005<br />
i 0.020
<strong>HP</strong> <strong>8753E</strong> Performance ‘l&t Record (10 of 15)<br />
For 30 kHz-6 GHz <strong>Analyzer</strong>s<br />
Iewlett-Packard Company<br />
llodel <strong>HP</strong> 8763E Option 006 Report Number<br />
kid Number Date<br />
b) 11. System Trace Noise<br />
Frequency Bati0 Measnred Specification Mtasurement<br />
WW V&he Uncertainty<br />
3 A/R (Magnitude) ~0.006dBlTUS i 0.001 dB<br />
6 A/R (Magnitude) 5 0.010 dB mls i 0.001 m<br />
6 AIR (P-1 5 0.0700 mw i 0.01 0<br />
3 AIR (P-1 5 0.03v mls i 0.01 o<br />
3 B/R (Magnitude) ~0.006dBrmS i 0.001 dB<br />
6 B/R (Magnitude) 5 0.010 dB rms i 0.001 dB<br />
6 B/R (P-1 5 o.070° rms i 0.01 o<br />
3 B/R (P-1 5 o.03s” ml8 i 0.01 o<br />
bb 12. lkst Port Input Impedance<br />
‘lbst Description matPort Return Loss Speciilcation Measurement<br />
(aB) m Uncertainty<br />
(aB)<br />
300 kHz-1.3 GHz Port 2 2 18 i 1.5<br />
1.3 GHz-3 GHz Port 2 1 16 i 1.5<br />
3 GHz-6 GBz Port 2 1 14 i 1.0<br />
300 kHz-1.3 GHz Port 1 > 18 i 1.6<br />
1.3 GHz-3 GHz Port 1 1 16 i 1.5<br />
3 GHz-6 GBz Port 1 >_ 14 i 1.0<br />
PerformanceTest Record 2b-11
<strong>HP</strong> <strong>8753E</strong> Performance lkst Record (11 of 15)<br />
For 30 kHz-6 GHz <strong>Analyzer</strong>s<br />
Eewlett-Packard Company<br />
Model <strong>HP</strong> 8766E Option 696 Report Number<br />
SerialNumber Date<br />
bb 18. ‘l&t Port Receiver Magnitude Dynamic Accuracy<br />
G F IG - 4<br />
lb& Port 8496A lkst Port Expected Dynamic spec. Mea&<br />
Input Power Attn. Measurement Measnrement &c-y (aB) Uncer.<br />
(aBm) WI WV (correctea) (celculated) WI<br />
(aB)<br />
lbtPort2<br />
- 10 0 5 0.033 i0.008<br />
-2o(Refl 10 0.000
<strong>HP</strong> <strong>8753E</strong> Performance ‘l&t Record (12 of 15)<br />
For 30 kHz-6 GEIz <strong>Analyzer</strong>s<br />
Hewlett-Packard Company<br />
lode1 <strong>HP</strong> 8751E Option 006 Report Number<br />
IerialNnmber Date<br />
)) 14. Test Port Receiver Magnitude Compression<br />
CW Frequency lkst Port MeasuredValue Specification Measar ement<br />
WV VW Uncertainty<br />
50 MHz Port 2 50.45 N/A<br />
1GHz Port 2 50.45 N/A<br />
2GHz Port 2 50.45 NIA<br />
3GHz Port 2 5 0.45 NIA<br />
4GHz Port 2 50.80 NIA<br />
SGBZ Port 2 50.80 N/A<br />
6GHz Port 2 50.80 NIA<br />
5OMHZ Port 1 50.45 NIA<br />
1GHz Port 1 50.45 NIA<br />
2GHz Port 1 50.45 N/A<br />
3GHz Port 1 50.45 NIA<br />
4GHz Port 1 50.80 NIA<br />
5GHz Port 1 50.80 NIA<br />
GGHZ Port 1 50.80 NIA<br />
Performance Test Record 2b-13
<strong>HP</strong> <strong>8753E</strong> Performance ‘l&t Record (13 of 15)<br />
For 30 kHz-6 GHz <strong>Analyzer</strong>s<br />
BewletGPackard Company<br />
Model <strong>HP</strong> 8755E Option 006 Report Number<br />
Serial Number Date<br />
bb 15. lbst Port Receiver Phase Compression<br />
cw Frequency Test Port Measured Vshe Specification Measurement<br />
Wi?m=) vw=-) Uncertainty<br />
50 MHz Port 2 5 6O NIA<br />
1GHz Port 2 5 6O NIA<br />
2GI-h Port 2 5 6O N/A<br />
3GHz Port 2 5 6O N/A<br />
4GHz Port 2 5 7.50 N/A<br />
5GHz Port 2 5 7.50 N/A<br />
6GI-h Port 2 5 7.50 N/A<br />
6OMHZ Port 1 5 6O NIA<br />
1GHz Port 1 5 6O NIA<br />
2GHz Port 1 5 6O N/A<br />
3GHz Port 1 5 6’ NIA<br />
4GHz Port 1 5 7.60 NIA<br />
5GHz Port 1 5 7.50 N/A<br />
GGHZ Port 1 5 7.60 NIA<br />
2b-14 Performance Test Record
<strong>HP</strong> <strong>8753E</strong> Performance lkst Record (14 of 15)<br />
For 30 kHz-6 GHz <strong>Analyzer</strong>s<br />
Hewlett-Packard Company<br />
Model <strong>HP</strong> 8755E Option 666 Report Number<br />
SerialNumber Date<br />
)) 17. OntpntIInpnt Test Port Jhrmonics (Option 662 only)<br />
Test Description Specilkation Measurement Value Meawrement<br />
VW ww Uncertainty<br />
(aB)<br />
l&t Port output<br />
IWlllOIliCS<br />
2nd 5 25 i 1.5<br />
3rd 5 25 i 1.5<br />
Port 1 Input Harmonics<br />
2nd 5 15 i 1.5<br />
3rd 5 30 i 1.5<br />
Port 2 Input Harmonics<br />
2nd 5 15 i 1.5<br />
3rd 5 30 i 1.5<br />
Performance Test Record 2b-15
<strong>HP</strong> <strong>8753E</strong> Performance ‘l&t Record (15 of 15)<br />
For 30 kHz-6 GHz <strong>Analyzer</strong>s<br />
Elewlett-lkckard Company<br />
Model J3P 8755E Option 666 Report Number<br />
Serial Number Date<br />
bb 18. ‘l&t Port Output Harmonics (<strong>Analyzer</strong>s without Option 062)<br />
Second Harmonic Fnnd8menta.l Specification Measurement Value Measurement<br />
Frequency Frequency Gw ww UllCerh.illty<br />
ow<br />
100 MHz<br />
1.0 GHz<br />
2.4 GI-lz<br />
3.2 GI-Iz<br />
4.0 GBz<br />
5.0 GI-Iz<br />
6.0 GBz<br />
Third Harmonic<br />
PreqnencY<br />
300 MB2<br />
1.2 GBz<br />
2.7 GHz<br />
3.3 GHz<br />
4.8 GI-lz<br />
6.0 GBz<br />
2b-16 PorfonnanceTest Record<br />
50 MHz 525 i 1.6<br />
500 MHz 5 25 i 1.6<br />
1.2 GHz 525 i 1.6<br />
1.6 GI-lz 525 i 1.6<br />
2.0 GBz 5 25 i 1.6<br />
2.5 G&a 5 25 i 1.6<br />
3.0 GBz 525 i 1.6<br />
100 MHz 525 i 1.6<br />
400 MHz 5 25 i 1.6<br />
900 MHz 5 25 i 1.6<br />
1.1 GHz 525 i 1.6<br />
1.6 GHz 525 i 1.6<br />
2.0 GHz 525 i 1.6
Adjustments and Correction Constants<br />
This chapter has the following adjustment procedures:<br />
� A9 Switch Positions<br />
� Source Default Correction Constants (Test 44)<br />
� Source Prettme Default Correction Constants (Test 45)<br />
� Analog Bus Correction Constants (Test 46)<br />
0 Source Pretune Correction Constants (lest 48)<br />
� RF Output Power Correction Constants (Test 47)<br />
� IF Amplifier Correction Constants (Test 51)<br />
� ADC Offset Correction Constants (Test 52)<br />
Sampler Magnitude and Phase Correction Constants (Test 53)<br />
0 Cavity Oscillator Frequency Correction Constants (Test 54)<br />
� Serial Number Correction Constants (Test 55)<br />
� Option Numbers Correction Constants (Test 56)<br />
� Initialize EEPROMs (Test 58)<br />
� EEPROM Backup Disk Procedure<br />
� Correction Constants Retrieval Procedure<br />
0 Loading Firmware<br />
� Fractional-N Frequency Range Adjustment<br />
� Frequency Accuracy Adjustment<br />
� High/Low Band Transition Adjustment<br />
� Fractional-N Spur Avoidance and FM Sideband Adjustment<br />
� Source Spur Avoidance Tracking Adjustment<br />
� Unprotected Hardware Option Numbers Correction Constants<br />
3<br />
Adjustments and Correstion Constants 3-l
Post-Repair Procedures for <strong>HP</strong> <strong>8753E</strong><br />
lhble 3-l lists the additional service procedures which you must perform to<br />
ensure that the instrument is working correctly, following the replacement of an<br />
assembly. These procedures can be located in either Chapter 2 or Chapter 3.<br />
mform the procedures in the order that they are listed in the table.<br />
Replaced<br />
Assembly<br />
Al Front Panel<br />
Keyboard<br />
A2 Front Panel<br />
[nterface<br />
‘able 3-l. Related <strong>Service</strong> Procedures<br />
A@stments/ VerUlcation<br />
Correction Constants (Ch. 3) (a. 2)<br />
None ServiCl?flestO<br />
<strong>Service</strong> Test 23<br />
None <strong>Service</strong> lbt 0<br />
<strong>Service</strong> l&t 23<br />
service Test 12<br />
‘Rst.s 66 - 80<br />
k3 Source A9 Switch Positions lbt Port Output Frequency Range<br />
Source Def CC (!&St 44) and Accuracy<br />
Pretune Default CC (!&St 45) Test Port Output Power Accuracy<br />
AnalogBusCC(Test46) ‘l&t Port Output Power Range and<br />
Source Pretune CC (Test 48) Linearity<br />
RF Output Power CC (‘l&t 47) Tl?st Port output/Input Hamlonics<br />
Sampler Maguitude and Phase CC (‘l&t 53) (Option 002 only)<br />
Cavity OscUator Frequency CC (T&t 54)<br />
Source Spur Avoidance Tracking<br />
EEPROM Backup Disk<br />
WAS/A6 Samplers A9 Switch Positions MInimmu R Channel Level<br />
Sampler Maguitude and Phase CC (l&t 53) (if R sampler replaced)<br />
IF Amplifier CC (‘l&t 51) %stPortCroWalk<br />
EEPROM Backup Disk Test Port Input Frequency Response<br />
A7 Pulse Generator A9 Switch Positions Test Port Input Frequency Response<br />
Sampler Magnitude and Phase CC (Test 53) Test Port Frequency Range and<br />
EEPROM lb&up Disk A-<br />
A8 Post Regulator A9 Switch Positions <strong>Service</strong> l&t 0<br />
Cavity Oscillabr Frequency CC (l&t 54) Check A8 test point voltages<br />
Source Spur Avoidance Tracking<br />
EEPROM Backup Disk<br />
3-2 Adjustments and Correction Constants
Replaeed<br />
Assembly<br />
A9 CPU<br />
FEPROM Backup<br />
Disk Available)<br />
‘able 3-l. Related <strong>Service</strong> Procedures (2 of 3)<br />
Adjnstmentsl<br />
Correction constallts (ch. 3)<br />
A9 Switch Positions<br />
Load Firmware<br />
CC Retrieval<br />
Serial Number CC (‘I&t 65)<br />
Option Number CC (Test 56)<br />
Operator’s Check<br />
<strong>Service</strong> l&t 21<br />
<strong>Service</strong> l&t 22<br />
Verification<br />
w. 2)<br />
A9 CPU A9 Switch Positions Test Port Output Frequency Range<br />
FEPROM Backup Lead Firmware andAccuracy<br />
Disk Not Available) Serial Number CC (l&t 56) ‘I&t Port Output Power Accuracy<br />
Option Number CC (‘Pzst 66) lkst Port Output Power Range and<br />
Source Def CC (lkst 44) Linearity<br />
Pretune Default CC (‘l&t 45) Test Port Receiver Dynamic Accuracy<br />
Am&gBusCC(%st46) l&t Port Input Frequency Response<br />
Cal Kit Default (‘kst 67)<br />
Source Pretune CC (T&t 48)<br />
RF Output Power CC (‘I& 47)<br />
Sampler Magnitude and Phase CC (lkst 63)<br />
ADC Linearity CC (‘&St 62)<br />
IF Amplitler CC (lbst 51)<br />
Cavity OsciIlator Frequency CC (Test 54)<br />
EEPROM Backup Disk<br />
A10 Digital IF A9 Switch Positions ‘I&t Port Input Noise FIoor Level<br />
Analog Bus CC (‘I&t 46) l&t Port CrossbE<br />
Sampler Magnitude and Phase CC (lbst 53) System Trace Noise<br />
ADC Linearity CC (‘l&t 52)<br />
IF Amplifler CC (lkst 61)<br />
EEPROM Backup Disk<br />
All Phase Lock A9 Switch Positions<br />
AnalogBusCC(‘Ibst46)<br />
Pretune Default CC (lbst 45)<br />
Source Pretune CC @St 4s)<br />
EEPROM Backup Disk<br />
Al2 Reference A9 Switch Positions<br />
II&h/Low Band Transition<br />
Frequency Accuracy<br />
EEPROM Backup Disk<br />
Minimum R Channel Level<br />
l&t Port Output Prequency Range<br />
andAccuracy<br />
l&t Port Output Frequency Range<br />
and Accuracy<br />
Adjustments and Correction Constants 3-3
l&placed<br />
Al9fU?mbly<br />
Al3 Fractional-N<br />
(dog)<br />
Al4 Fractional-N<br />
UWW<br />
Al5 Preregulator<br />
Al6 Rear Panel<br />
Interface<br />
Al7 Motherboard<br />
‘lhble 3-1. Related <strong>Service</strong> Procedures (3 of 3)<br />
Awtments/<br />
Correction chlstants (ch. 3)<br />
A9 switch Positions<br />
Fractional-N Spur and<br />
FM Sideband<br />
EEPROM Hackup Disk<br />
A9 Switch Positions<br />
Fractional-N Frequency Range<br />
Fractional-N Spur Avoidance<br />
and FM sideband<br />
EEPROM Hackup Disk<br />
None<br />
None<br />
None<br />
Verification<br />
(a. 2)<br />
lbst Port Output Frequency Range<br />
and Accuracy<br />
lbst Port Output Frequency Range<br />
and Accuracy<br />
Self-l&t.<br />
Iutemal l&t 13,<br />
Rear Panel<br />
Observation of Display<br />
lksts60-80<br />
Al8 Display None Observation of Display<br />
‘lksta 06 - 80<br />
A19 Graphics System None Observation of Display<br />
Processor R&3 59 - 80<br />
A20 Disk Drive none none<br />
A21 lbst Port Coupler RF Output Power CC (Ibst 47) l&t Port cnxstalk<br />
Sampler Magnitude and Phase CC (Test 53) Test Port Frequency Response<br />
A22 lbst Port Coupler Sampler Magnitude and Phase CC (Test 53) ‘lbst Port Cromtalk<br />
� lbst Port Frequency Response<br />
A23RdAssyLED none Self-Test (Chapter 4)<br />
A24 Transfer Switch none Rst Port cromialk<br />
A26 7ht Set Interface none Self-l&t (Chapter 4)<br />
A26 H&h Stability Frequency Accuracy Adjustment !lbst Port Frequency Range<br />
Frequency Reference (Option lD5) ~AccuTacy<br />
* Hewlett-Packard verSes source output performance on port 1 only. Port 2 source output<br />
performance is typical.<br />
34 Adjustments and Correction Constants
A9 Switch Positions<br />
1. Remove the power line cord from the analyzer.<br />
2. Set the analyzer on its side.<br />
3. Remove the two lower-rear comer bumpers from the bottom of the<br />
instrument with the T-10 TORX screwdriver.<br />
4. Loosen the captive screw on the bottom cover’s back edge, using a T-15<br />
TORX screwdriver.<br />
5. Slide the cover toward the rear of the instrument.<br />
6. Move the switch as shown in Figure 3-l:<br />
w Move the A9 switch to the Alter position before you run any of the<br />
correction constant adjustment routines. This is the position for altering<br />
the analyzer’s correction constants.<br />
w Move the A9 switch to the Normal position, after you have run correction<br />
constant adjustment routines. This is the position for normal operating<br />
conditions.<br />
7. Reins&R the bottom cover, but not the rear bumpers<br />
Adjustments and Correstion Constants 3-5
sga me<br />
A9 CPU Assembly<br />
Normal Mode Alter Mode Rocker Slide<br />
Figure 3-1. A9 Correction Constants Switch<br />
8. Reconnect the power line cord and switch on the instrument.<br />
3-6 Adjustments and Correction Constants
Source Default Correction Constants (‘kst 44)<br />
Analggm- warmup time: 30 minutes.<br />
This internal adjustment routine writes default correction constants for the<br />
source power accuracy.<br />
.;...:............. / ........... z.:................: .y ........................<br />
................... .....................<br />
1. press CpzJ (22) ;$@$$~~:,~j@@ ~~~~: L44) Lxl] j&@$.<br />
2. ................... ..cw................._- _;;- ..........- T ......... ...............................<br />
....<br />
........_ ......... .._..._ ...... _i....... _.... Li.. ..............::::. .._ .....-. ....._ ... :.::.i./..i i........<br />
2. Observe the analyzer for the results of the adjustment routine:<br />
H If the analyzer displays *Source Def DONE, you have completed this<br />
procedure.<br />
w If the analyzer displays *Source Def FAIL, refer to Chapter 7, “Source<br />
Troubleshooting. n<br />
Adjustments and Correction Constants 3-7
Source Pretune Default Correction Constants (X&t 45)<br />
Anulgzm warmup time: 30 minutes.<br />
This adjustment writes default correction constants for rudimentary phase lock<br />
pretuning accuracy.<br />
..................:. ... .:.:.:::: ,,:::::.::.:~~~~~~~~;~~::~~~~~~~~:<br />
1. press (=I L-1<br />
.....................<br />
:../ .........................A.. ......................................_ ...................... .._. .........<br />
.........................<br />
@ Ixl) im. ‘;$J$x. :*i.<br />
; A.s.zu>>>.L.L ..............2.. .....A ......<br />
2. Observe the analyzer for the results of this adjustment routine:<br />
� If the analyzer displays Pretune Def DONE, you have completed this<br />
procedure.<br />
� If the analyzer displays FAIL, refer to Chapter 7, “Source<br />
Troubleshooting. ’<br />
3-8 Adjustments and Correction Constants
Analog Bus Correction Constants (‘I&t 46)<br />
Aruzlgmr warmup time: 30 minutes.<br />
This procedure calibrates the analog bus by using three reference voltages<br />
(ground, + 0.37 and +2.5 volts), then stores the calibration data as correction<br />
constants in EEPROMs.<br />
2. Observe the analyzer for the results of the adjustment routine:<br />
� If the analyzer displays ABUS Cor DONE, you have completed this<br />
procedure.<br />
� If the analyzer displays ABUS Cor FAIL, refer to Chapter 6, “Digital Control<br />
Troubleshooting. n<br />
Adjustments and Correction Constants 3-8
Source Pretune Correction Constants (Tkst 48)<br />
An.u&er warmup time: 30 minutes.<br />
This procedure generates pretune values for correct phase-locked loop<br />
operation.<br />
2. Observe the analyzer for the results of this adjustment routine:<br />
w If the analyzer displays Pretune Cor DONE, you have completed this<br />
procedure.<br />
� If the analyzer displays FAIL, refer to Chapter 7, “Source<br />
Troubleshooting. n<br />
3-l 0 Adjustments and Correction Constants
RF Output Power Correction Constants (T&t 47)<br />
Required Equipment and lbols<br />
Power Meter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<strong>HP</strong> 437B or <strong>HP</strong> 438A<br />
<strong>HP</strong>-IB Cable . . . . . . , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 10833A<br />
Antistatic Wrist Strap . . . . . . . . . . . . . . . . . . . , . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 9300-1367<br />
Antistatic Wrist Strap Cord . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 9300-0980<br />
Static-control ‘Ihble Mat and Earth Ground Wire . . . . . . . . . . . . <strong>HP</strong> P/N 9300-0797<br />
Additional Required Equipment for 5Oll <strong>Analyzer</strong>s<br />
Power Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 8482A<br />
Power Sensor (for Option 006 analyzers) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 8481A<br />
Adapter APC-7 to Type-N (f) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 11524A<br />
Additional Eequired Equipment for 750 <strong>Analyzer</strong>s<br />
Power Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 8483A Option HO3<br />
Analgger warmup Time: 30 minutes.<br />
This procedure adjusts several correction constants that can improve the output<br />
power level accuracy of the internal source. They are related to the power<br />
level, power slope, power slope offset, and the ALC roll-off factors among<br />
others.<br />
1. If you just completed “Sampler Magnitude and Phase Correction Constants<br />
(Test 53),” continue this procedure with step 8.<br />
............. ::::-::x :::: ::: .::“:.:.:.:.:.:.:.:~~::::::::::::.:.:..~;~,,.~. . . ~.;; . . . . . . . . . . . . . . ...._G..<br />
. .<br />
meter address is 13. Refer to the power meter manual as required to<br />
observe or change its <strong>HP</strong>-B3 address<br />
4. Press ~~~~~~~~~~~~ . . . . . . . . . . . . . to . . . . . toggle between *e 438A/437 and 436A<br />
c ,,,<br />
power meters. Choose the appropriate model number.<br />
Note If you are using the <strong>HP</strong> 438A power meter, connect the<br />
<strong>HP</strong> 8482A power sensor to channel A, and the <strong>HP</strong> 8481A power<br />
sensor to channel B.<br />
Adjustments and Correction Constants 3-11
Power Sensor Calibration Factor Entry<br />
.f ‘_’ .$ ” ,/ .“? .~..~.,, . ..., ; .,...__. . ...<br />
5. Press @--+q ~~~~~~~~ ~~~~~~~~~~ ~~~~~~~~~~..;~~~~3..<br />
:::: ..::.z ~~.:.:;.:~:.:.:.~.;..:.:::.:~:::.:::.... I ..:.. :::.: .:.:.:..“- i “,.......... ,::.: ::; ,&~. ..,,.. ~......,O y . . . . .. ..~..~~~‘~~~~~~~~~~~~~~~~~.,,~,~~.~~ . . . . . . . . ..L .u;;:,..
. . . . *.<br />
8. For Option 006 Instruments Only: Press ~~~l~,~~~~~~~~~~,~ri,.j ::. .: . . . . . . . . . . s . . . . ..A2 . . . . .::../ . . . ..A .>.I .A.. SW;;.>>: .i .T to create<br />
a power sensor calibration table for power sensor B (<strong>HP</strong> 8481A), using the<br />
softkeys mentioned above.<br />
9. Connect the equipment as shown in Figure 3-2.<br />
Adjustments and Correction Constants 3-13
<strong>HP</strong> 4388<br />
POWER METER<br />
<strong>HP</strong> 438A<br />
POWER METER<br />
<strong>HP</strong> 8481A<br />
POWER<br />
SENSOR<br />
3 - 6GHz<br />
<strong>HP</strong>-B h<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
WITH OPTION 006<br />
PORT 2<br />
<strong>HP</strong> 8482A<br />
POWER<br />
SENSOR<br />
300KHz - 3GHz<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
/’<br />
\*<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
WITH OPTION 075<br />
PORT 2<br />
sg631e<br />
Figure 3-2. RF Output Correction Constants ‘kst Setup for the <strong>HP</strong> <strong>8753E</strong><br />
3-14 Adjustments and Correction Constants
11. Press .~~, ~~~ and ~ at the prompt to alter *e correction<br />
.:..+ L.~..:...:...:..:. L . ;..:. .._.......................<br />
constants.<br />
12. Follow the ~s~&ions at the prompts and press ~~~~~~ *<br />
13. When the analyzer completes the test, observe the display for the results:<br />
� If you see DONE, press m and you have completed this procedure.<br />
� If you see FAIL, re-run this routine in the following order:<br />
a. Press-(Preset).<br />
b. Repeat the “Source Default Correction Constants (Test 44)” procedure.<br />
c. Repeat the “RF’ Output Power Correction Constants (Test 47)”<br />
procedure.<br />
Adjustments and Correction Constants 3-15
IF Amplifier Correction Constants (‘I&t 61)<br />
Required Equipment and ‘lbols<br />
Antistatic Wrist Strap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 9300-1367<br />
Antistatic Wrist Strap Cord . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 9300-0980<br />
Static-control Table Mat and Earth Ground Wire . . . . . . . . . . . . <strong>HP</strong> P/N 9300-0797<br />
Additional Required Equipment for 50 ohm <strong>Analyzer</strong>s<br />
RF Cable - (5OQ) 24-inch, APC-7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 8120-4779<br />
Additional Required Equipment for 75Q <strong>Analyzer</strong>s<br />
RF Cable - (750) 24-inch, Type-N . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 8120-2408<br />
Anulgz~warrnupTime: 30 minutes.<br />
These correction constants compensate for possible discontinuities of signal<br />
greater than -30 dBm.<br />
1. Connect the RF cable from Port 1 to Port 2 of the analyzer.<br />
3. Observe the analyzer for the results of the adjustment routine:<br />
z If DONE is displayed, you have completed this procedure.<br />
w If FAIL is displayed, check that the RF cable is COMeCted from Port 1 to<br />
Port 2. Then repeat this adjustment routine.<br />
w If the analyzer continues to fail the adjustment routine, refer to the<br />
“Digital Control Troubleshooting” chapter.<br />
3-l 6 Adjustments and Correction Constants
ADC Offset Correction Constants (‘I&t 52)<br />
<strong>Analyzer</strong> warmup tim.e: 30 minutes.<br />
These correction constants improve the dynamic accuracy by shifting small<br />
signals to the most linear part of the ADC quantizing curve.<br />
Note This routine takes about three minutes.<br />
2. Observe the analyzer for the results of the adjustment routine:<br />
w If the analyzer displays ADC Of 8 Cor DONE, you have completed this<br />
procedure.<br />
w If the analyzer displays ADC Of 8 Cor FAIL, refer to the “Digital Control<br />
Troubleshooting” chapter.<br />
Adjustments and Correction Constants 3-17
Sampler Magnitude and Phase Correction Constants<br />
(%?st 53)<br />
Required Equipment and Tools<br />
Power Meter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..<strong>HP</strong> 437B or <strong>HP</strong> 438A<br />
<strong>HP</strong>-IB Cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 10833A<br />
Antistatic Wrist Strap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 9300-1367<br />
Antistatic Wrist Strap Cord . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 9300-0980<br />
Static-control Mat and Earth Ground Wire . , . . . . . . . . . . . . . . . . .<strong>HP</strong> P/N 9300-0797<br />
Additional Required Equipment for 500 <strong>Analyzer</strong>s<br />
Power Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 8482A<br />
Power Sensor (for Option 006 analyzers) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 8481A<br />
Cable, (509) 24-inch, APC-7 (2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<strong>HP</strong> P/N 81204779<br />
Adapter APC-7 to Type-N(f) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 11524A<br />
Additional Required Equipment for 75Q <strong>Analyzer</strong>s<br />
Power Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 8483A Option HO3<br />
Cable, (75ohm) 24-inch, Type-N (2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 8120-2408<br />
Armlgzer wamup time: 30 minutes.<br />
This adjustment procedure corrects the overall flatness of the microwave<br />
components that make up the analyzer receiver and test separation sections.<br />
This is necessary for the <strong>HP</strong> <strong>8753E</strong> to meet the published test port flatness.<br />
1. If you just completed “Source Correction Constants (Test 47),” continue this<br />
procedure with step 8.<br />
............. ... . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..<br />
3. ~~~~ m ~~~~~~~~~.~ ,~~~~~~~~~~~~~~~~~~. me default power<br />
_ .:._:. _.i . . __j . . :::: i...~ .:..::::: ~.M..... x.> .._/,..... L..& -_- ..__...... -~::::~~:~~ .A.. T .A.. T .A.. ii . . ..~.~.~.~.~..~.~.~.~.~~.~.~.~~ . . . . . . . .<br />
meter address is 13. Refer to the power meter manual as required to<br />
observe or change its <strong>HP</strong>-IB address.<br />
4. Press ~~~~~~~~~~~~., to toggle between the 438A/437 md 436A<br />
..; ._....................,..._...._........_. ..~~~~~~;~~.~~~~~~~~~~~~.._ i:::. . . . . . ..t......... - .._.. ,, .::rF: .-....-.-..........-........ ....<br />
power meters. Choose the appropriate model number.<br />
Note If you are using the <strong>HP</strong> 438A power meter, connect the<br />
<strong>HP</strong> 8482A power sensor to channel A, and the <strong>HP</strong> 8481A power<br />
sensor to channel B.<br />
3-l 8 Adjustments and Correction Constants
Power Sensor Calibration Factor Entry<br />
/..;..- _/i . . . . . :. ....:..<br />
5. press w $j@~. ,@f# ~~~~~~X~~~. ~~~~~~~~~~,~sT~~~~<br />
..... .” ~;~~~~~;~-~ :“-...c:: .._............ . . . ..__..........._.............. ., ,................ .._. .:.: .._ .:<br />
Yi..l........ Li . . . . . . . . . . . .w>:> . . . . . .L_.> .:..:.:: . . . ..A . . . . . . . . ..A .: :....... ;;;>2.. i..z~..i<br />
.: ..;. ..:z::I $ .T:.:::.::. ..,. :::.:;:;U;..::...:~. allows you to complete the points entry of the sensor<br />
cal factor table.<br />
Adjustments and Correction Constants 3-l 9
7. For Option 006 Instruments Only: Zero and calibrate the power meter<br />
ad <strong>HP</strong> 8481A power sensor. ‘J’&n press ~~~.~~~~~~:~~~~~~.~::~~;- to meate<br />
. . . . . . i . . . . . . 2x.. . ii ~....~.~.~.~.~.~.~~ . . . .z . ii .~................................ .._. ~.~.~::; ._............. . . _ _...: i<br />
a power sensor calibration table for power sensor B (<strong>HP</strong> 8481A), using the<br />
softkeys mentioned above.<br />
Determine the Insertion Loss of the Cable at 1 GHz<br />
9. PressLcenter_)(TJ@FJ(3&J(%GJIM_U.<br />
10. Press Ical] ~~~~~<br />
::::;:;::. . . ;..+:>>;;>;.;,;,, .;:<br />
~~~~.~~:~~~ ~~~, ~~~~~~~~ ~~~~~~~.<br />
.._;..;..>;.>A . . . .: . i . . . ..s . .. . . . ..-.......~...........~..........~_~~<br />
. . . .<br />
.A.. . . ..A . . . . . A...>.~~ . ii..... _....... - .._ -...- _.._...._ ~~~~-.:::..w.Le~.2 . . . . . . . . . . . . .>.;..A . . . . . ..i . i . . ..A . .:::..-.:::: i_..~.G.~~~.i . . . . . . . ii . :::. in....... .._......<br />
11. Connect the 24 inch cable from Port 1 to Port 2, as shown in Figure 3-3.<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
Figure 3-3. First Connections for Insertion Loss Measurement<br />
_ ,. .,. ,. _<br />
12. press i$&$&.. and then :~~~~~~~~~~~~~~ when the analyzer is done<br />
measuring the through.<br />
13. fiess [W) ~~~~~~~~<br />
_ . . . . . . . . . . . . . . . . . . .<br />
to Save *e calibration aat you just<br />
made.<br />
14. Make the connections as shown in Figure 3-4.<br />
3-20 Adjustments and Correction Constants
<strong>HP</strong> 4388<br />
POWER METER<br />
<strong>HP</strong>-B<br />
<strong>HP</strong> 8481A<br />
POWER<br />
SENSOR<br />
3 - CGHz<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
WITH OPTION 006<br />
PORT 2<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
<strong>HP</strong> 8482A<br />
POWER<br />
SENSOR<br />
<strong>HP</strong> 8482A<br />
POWER<br />
SENSOR<br />
300KHz - 3GHz <strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
WITH OPTION 075<br />
PORT 1 I<br />
Figure 3-5. Connections for Sampler Correction Routine<br />
3-22 Adjustments and Correction Constants<br />
PORT 2
. . _ . . . _ . . _ .., _<br />
13. Press .~&+$&@#‘$ to start the test. This part of the test will take about seven<br />
minutes.<br />
� If the analyzer displays Sampler Cor - FAIL, check the following:<br />
a. The <strong>HP</strong>-IB address of your power meter is set at 13. Then rerun this<br />
routine (“Sampler Correction Constants Routine”).<br />
b. The <strong>HP</strong> 8482A power sensor is connected to Port 1. Rerun this routine<br />
(‘Sampler Correction Constants Routine “).<br />
19. For Option 006 Instruments Only: When the analyzer displays CONNECT<br />
6 GHz SENSOR B TO PORT 1, make the connections as shown in Figure 3-6.<br />
Then press @WJ~. This part of the test will take about 20 seconds.<br />
.._ .._..................-..-..<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
WITH OPTION 006<br />
POWER SENSOR<br />
Figure 3-6. Connections for Sampler Correction at 6 GHz<br />
20. When the analyzer displays CONNECT
<strong>HP</strong> 4388<br />
POWER METER<br />
<strong>HP</strong> 8481A<br />
POWER<br />
SENSOR<br />
3 - 6GHr<br />
<strong>HP</strong> 8482A<br />
POWER<br />
SENSOR<br />
300KHr 3GHr<br />
<strong>HP</strong> 0403A<br />
POWER<br />
SENSOR<br />
(OPTION H03)<br />
<strong>HP</strong> I3753E<br />
\ J<br />
NETWORK ANALYZER<br />
POWER<br />
SENSOR<br />
k J sg636e<br />
Figure 3-7. Connections for Sampler Correction at Port 2<br />
3-24 Adjustments and Correction Constants
21.<br />
22.<br />
23.<br />
24.<br />
. . ; ::.... :: . . . . . . . . . . . . . .,<br />
press ~~cla~#B$.,- This Pa of the test a t&e about 10 hues.<br />
For Option 606 Instruments Only: When the analyzer displays CONNECT 6<br />
GHz SENSOR TO PORT 2, make the connections as shown in Figure 3-8. Then<br />
press ~~~~~. This part of the test m t*e about $3) seconds.<br />
. .._... .._...............<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
WITH OPTION 006<br />
POWER SENSOR<br />
sg637e<br />
Figure 3-8. Connections for Sampler Correction at Port 2 for 6 GHz<br />
When the analyzer displays CONNECT PORT 1 TO PORT 2, make the<br />
connections of the second through cable (of which you have determined its<br />
insertion loss) as shown in F’igure 3-9.<br />
<strong>HP</strong> 6753E<br />
NETWORK ANALYZER<br />
PORT 1 PORT 2<br />
UCSECOND THRU CABLE<br />
Figure 3-9. Connections for the Second Through Cable<br />
sg638e<br />
Adjustments and Correction Constants 3-25
25. Enter the insertion loss of the through cable (determined in step 15) and<br />
press ...... :~~~~~~. . . ....i . . ..:::. ~.....~........~...~i...~;;......~.. For example, if the insertion loss of the through cable at<br />
1 GHz is found to be 0.25 dB, then press 1.25) @.<br />
26. When the analyzer completes the test, observe the display for the results:<br />
� If you see Sampler Cor - DONE, you have completed this procedure.<br />
� Ifyousee Sampler Cor - FAIL, it is necessary to adjust the sampler gain<br />
offset values, which are stored in EEPROM.<br />
b. Enter the new value at the accessed address by pressing $jpKK: (46) a).<br />
. . . . . . . . . . . . . .y:. . . . . . . . . . . . . . . _ . .<br />
.,., ‘..~..~.~.~,~,.,. . . . . . . . . ....:::::..<br />
C- Access the second address by pressing ~~~~~~~-:~~~~ c-1<br />
Ixl).<br />
d. Enter the new value at the accessed address by pressing $&%I,@ @<br />
@.<br />
e. Press (FEZ] for the analyzer to use the new values.<br />
f. Repeat the “Sampler Correction Constants Routine” starting at step 16.<br />
� If the analyzer continues to fail this adjustment routine, refer to Chapter<br />
7, “Source Troubleshooting. n<br />
d. Enter the new value at the accessed address by pressing @$&I$: (248_)<br />
jxl.<br />
e. Press B for the analyzer to use the new values<br />
3-26 Adjustments and Correction Constants
f. Repeat the “Sampler Correction Constants Routine” starting at step 16.<br />
� If the analyzer continues to fail this adjustment routine, refer to Chapter<br />
7, “Source Troubleshooting. n<br />
B Channel Sampler<br />
b- Enter the new value at the accessed address by pressing :@I& (66) (xl.<br />
. . . . . . . .<br />
C- Access the second address by pressing ;~~~~~~:~~~~~~:,~ ... . . . . . . . ;a :..; . . .. . i..............................~........~............~.........~....~.........--.~~ -...... .._ s. (jj)<br />
(QiJ<br />
_ ..,:,.,.<br />
de Enter the new value at the accessed address by pressing @$l$R 1128J<br />
(XJ<br />
e. Press w for the analyzer to use the new values.<br />
f. Repeat the “Sampler Correction Constants Routine” starting at step 16.<br />
w If the analyzer continues to fail this adjustment routine, refer to Chapter<br />
7, “Source Troubleshooting. n<br />
Adjustments and Correction Constants 3-27
Cavity Oscillator Frequency Correction Constants<br />
(Ykst 54)<br />
Required Equipment and ‘lbols<br />
Low-pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 91350198<br />
Antistatic Wrist Strap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 9300-1367<br />
Antistatic Wrist Strap Cord . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 9300-0980<br />
Static-control Table Mat and Earth Ground Wire . . . . . . . . . . . . <strong>HP</strong> PM 9300-0797<br />
Additional Required Equipment for 50 ohm <strong>Analyzer</strong>s<br />
Adapter APC-7 to 3.5 mm (m) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<strong>HP</strong> P/N 1250-1746<br />
Adapter APC-7 to 3.5 mm (f) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<strong>HP</strong> P/N 1250-1747<br />
RF Cable Set APC-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<strong>HP</strong> 118571)<br />
Additional Required Equipment for 758 <strong>Analyzer</strong>s<br />
Adapter APC-3.5 (f) to Type-N (f) . . . . . . . . . . . . . . . . . . . . . . . . . . . .<strong>HP</strong> P/N 1250-1745<br />
Adapter APC-3.5 (m) to Type-N (f) . . . . . . . . . . . . . . . . . . . . . . . . . . .<strong>HP</strong> P/N 1250-1750<br />
RF Cable Set 503, Type-N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 11851B<br />
Minimum Loss Pad 50ohm 75Q to (2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<strong>HP</strong> 11852B<br />
<strong>Analyzer</strong> warmup Time: 30 minutes.<br />
The nominal frequency of the cavity oscillator is 2.982 GHz, but it varies with<br />
temperature. This procedure determines the precise frequency of the cavity<br />
oscillator at a particular temperature by identifying a known spur<br />
Note You should perform this procedure with the recommended<br />
filter, or a filter with at least 50 dB of rejection at 2.9 GHz,<br />
and a passband which includes 800 MHz. The filter makes spur<br />
identification substantially faster and more reliable.<br />
With the filter, you need to distinguish between only two spurs, each of which<br />
should be 10 dB to 20 dB (3 to 4 divisions) above the trace noise.<br />
Without the filter, you need to distinguish the target spur between four or five<br />
spurs, each of which may be 0.002 to 0.010 dB (invisible to 2 divisions) above or<br />
below the trace noise.<br />
3-26 Adjustments and Correction Constants
Perform the first five steps of the procedure at least once for familiarization<br />
before trying to select the target spur (especially if you are not using a filter).<br />
1. Connect the equipment shown in Figure 3-10.<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
WITH OPTION 075<br />
LOW PASS F ILTER LOW PASS FILTER<br />
ADAPTER ADAPTER ADAPTER ADAPTER<br />
Figure 3-10.<br />
Setup for Cavity Oscillator Frequency Correction Constant Routine<br />
During this adjustment routine, you will see several softkeys:<br />
sweeps the current frequency span; you may<br />
press it repeatedly for additional sweeps of the<br />
current frequency span.<br />
sweeps the next frequency span (2 MHz higher).<br />
enters the value of the marker (which you have<br />
placed on the spur) and exits the routine.<br />
exits the routine.<br />
sg639e<br />
Adjustments and Correction Constants 3-29
3. Press .~~~~~~,: to sweep the first frequenw span three times. Each new<br />
2 /. .:~...=.:..:..:..~.=;~~..... .-:.;.: . . . . . . . > . . . . . . ..
7. Observe the analyzer for the results of this adjustment routine:<br />
H If the analyzer displays Cav Osc Cor DONE, you have completed this<br />
procedure.<br />
H If the analyzer does not display DONE, repeat this procedure.<br />
w If the analyzer continues not to display DONE, refer to Chapter 7, “Source<br />
Troubleshooting. n<br />
Spurs Search Procedure without a Filter<br />
On occasion the largest spur appears as one of a group of five evenly spaced<br />
spurs as shown in F’igure 3-13. The target spur is again the fourth from the left<br />
(not the fifth, right-most spur).<br />
Figure 3-13. ‘Ihrget Spur Is Fourth in Display of Five spurs<br />
Figure 3-14 shows another variation of the basic four spur pattern: some up,<br />
some down, and the target spur itself almost indistinguishable.<br />
3-32 Adjustments and Correction Constants
CENTER 2 983.000 000 MHz SPAN 5.000 000 mr<br />
Figure 3-14. ‘Ihrget Spur Is Almost Invisible<br />
10. Rotate the front panel knob to position the marker on the target spur. Then<br />
.) /,.;; ,.,.,.,.,.,.,.,.,.,.<br />
press &@&&E@ and observe the analyzer for the results of the adjustment<br />
routine:<br />
w If the analyzer displays Cav Osc Cor DONE, you have completed this<br />
procedure.<br />
w If the analyzer displays FAIL, refer to Chapter 7, “Source<br />
Troubleshooting. n<br />
Adjustments and Correction Constants 3.33
Serial Number Correction Constants (Test 55)<br />
<strong>Analyzer</strong> warmup time: 5 minutes.<br />
This procedure stores the analyzer serial number in the A9 CPU assembly<br />
EEPROMs.<br />
Caution Perform this procedure ON= if the A9 CPU assembly has been<br />
replaced.<br />
1.<br />
2.<br />
3.<br />
4.<br />
Record the ten character serial number that is on the <strong>HP</strong> <strong>8753E</strong> rear panel<br />
identification label.<br />
Enter the serial number with an external keyboard or by rotating the front<br />
panel knob to position the arrow below each character of the instrument<br />
.,:,.,,,,,:,<br />
s&d nu&er, ad then pressing ~~~:~~~ to enter ea& letter. Enter<br />
a total of ten characters: four digits, one letter, and five 9nal digits.<br />
press ~~~~~~~ if you<br />
* i .:.....<br />
made a m&&e.<br />
. - .._ - - -<br />
press &id when you have mshed entering the title.<br />
:..---::...<br />
Caution You CMOT correct mistakes after you perform step 5, unless<br />
you contact the factory for a clear serial number keyword.<br />
Then you must perform the “Options Correction Constants”<br />
procedure and repeat this procedure.<br />
334 Adjustments and Correction Constants
6. Observe the analyzer for the results of the routine:<br />
� If the analyzer displays the message Serial Cor DONE, you have<br />
completed this procedure.<br />
� If the analyzer does not display DONE, then either the serial number that<br />
you entered in steps 3 and 4 did not match the required format or a serial<br />
number was already stored. Check the serial number recognized by the<br />
analyzer:<br />
b. Look for the serial number displayed on the analyzer screen.<br />
c. Rerun this adjustment test.<br />
� If the analyzer continues to fail this adjustment routine, contact your<br />
nearest <strong>HP</strong> sales or service office.<br />
Adjustments and Correction Constants 3-35
Option Numbers Correction Constants (Test 56)<br />
This procedure stores instrument option(s) information in A9 CPU assembly<br />
EEPROMs. You can also use this procedure to remove a serial number, with the<br />
unique keyword, as referred to in “Serial Number Correction Constant.”<br />
1. Remove the instrument top cover and record the keyword label(s) that are on<br />
the display assembly. Note that eachkeyword is for each option installed in<br />
the instrument.<br />
w If the instrument does not have a label, then contact your nearest<br />
Hewlett-Packard sales or service office. Be sure to include the full serial<br />
number of the instrument.<br />
2. press Is) (Displad<br />
--.-.-.-.__<br />
&&&,,<br />
..__..<br />
$j$&J$<br />
.:.-.:..;.. -.-<br />
;~~~~~~~.<br />
.._. - .._.... -_- .._ -._<br />
3. Enter the keyword with an external keyboard or by rotating the front panel<br />
knob to position the arrow below each character of the keyword, and then<br />
pressing ‘~~~~~:~:, to enter each letter.<br />
,./,. . . . . . . . . . ._ .,.,...,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,.,....,... i _.<br />
Press ..,.,., ._._........_...........---.... ~3~~~~~~. i:, .~ ..:.; ,.,. ,,, ./_ .._; - _.,.,.,i .._ -.,.,<br />
if you made a mistake.<br />
4. Press ,,#bs:; when you<br />
/. ./. ii /i<br />
.._.....................<br />
have &-&hed entering the title.<br />
Caution Do not confuse “I” with “1” or “0” with “0” (zero).<br />
6. Observe the analyzer for the results of the adjustment routine:<br />
� If the analyzer displays Option Cor DONE, you have completed this<br />
procedure.<br />
w If the analyzer has more than one option, repeat steps 2 through 5 to<br />
install the remaining options.<br />
� If the analyzer displays Option Cor FAIL, check the keyword used in step<br />
3 and make sure it is correct. Pay special attention to the letters “I” or “O”,<br />
the numbers “1” or “0” (zero). Repeat this entire adjustment test.<br />
� If the analyzer continues to fail the adjustment routine, contact your<br />
nearest <strong>HP</strong> sales or service office.<br />
3-36 Adjustments and Correction Constants
Initialize EEPROMs (T&t 58)<br />
This service internal test performs the following functions:<br />
� Destroys ail correction constants and all unprotected options<br />
� Initializes certain EEPROM address locations to zeroes.<br />
Note This routine till not alter the serial number or Options 002, 006<br />
and 010 correction constants.<br />
1.<br />
2.<br />
3.<br />
Make sure the A9 switch is in the alter position.<br />
Restore the analyzer correction constants in the EEPROMs:<br />
� If you have the correction constants backed up on a disk, perform these<br />
steps:<br />
b. Use the front panel knob to highhght the filename that represents your<br />
serial number.<br />
� If you don’t have the correction constants backed up on a disk, run all the<br />
internal service routines in the following order:<br />
13 Source Default Correction Constants (Test 44)<br />
0 Source Pretune Correction Constants (Test 45)<br />
� Analog Bus Correction Constants (Test 46)<br />
0 Source Pretune Correction Constants (Test 48)<br />
� Calibration Kit Default Correction Constants (Test 57)<br />
II ADC Offset Correction Constants (Test 52)<br />
� RF Output Power Correction Constants (Test 47)<br />
� Sampler Magnitude and Phase Correction Constants (Test 53)<br />
0 IF Amplifier Correction Constants (Test 51)<br />
0 Cavity Oscillator Frequency Correction Constants (Test 54)<br />
Adjustments and Correction Constants 3-37
EEPROM Backup Disk Procedure<br />
Required Equipment and ‘Idols<br />
3.5~inch Floppy Disk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<strong>HP</strong> 92192A (box of 10)<br />
Antistatic Wrist Strap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 9300-1367<br />
Antistatic Wrist Strap Cord . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 9300-0980<br />
Static-control Table Mat and Earth Ground Wire . . . . . . . . . . . . <strong>HP</strong> P/N 9300-0797<br />
The correction constants, that are unique to your instrument, are stored in<br />
EEPROM on the A9 controller assembly. By creating an EEPROM backup disk,<br />
you will have a copy of all the correction constant data should you need to<br />
replace or repair the A9 assembly.<br />
1. Insert a 3.5~inch disk into the analyzer disk drive.<br />
2. If the disk is not formatted, follow these steps:<br />
a* fiess I-, ~.~~~~~~~~~ ~~~~~~~~~~~~. _ . . . . .,. ,. .., .;;.... _<br />
.._. /-..A.: . . -.-.-.-~-.-.-.-.-.-.-~-.-.-.-.~~.~.~.~.~~~.~.~.~.~.~.~.~.~.~.~.~..~.~..~..~.~.~;;~~ . .<br />
. .
5. Write the following information on the disk label:<br />
� analyzer serial number<br />
� today’s date<br />
� “EEPROM Backup Disk”<br />
Adjustments and Correction Constants 3-38
Correction Constants Retrieval Procedure<br />
Required Equipment and Tools<br />
EEPROM Backup Disk<br />
Antistatic Wrist Strap . . . . . , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 9300-1367<br />
Antistatic Wrist Strap Cord . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 9300-0980<br />
Static-control ‘Ihble Mat and Earth Ground Wire . . . . . . . . . . . . <strong>HP</strong> P/N 9300-0797<br />
By using the current EEPROM backup disk, you can download the correction<br />
constants data into the instrument EEPROMs.<br />
1. Insert the “EEPROM Backup Disk” into the <strong>HP</strong> <strong>8753E</strong> disk drive.<br />
2. Make sure the A9 switch is in the Alter position.<br />
* p f!g;-~ :>+?$?q&:. pL+y .::: .:: ) :.:::y ,,,,,,<br />
3. Press t-1 ‘~~~~~~ ~~~~~~~~~~. Use the front panel knob<br />
to highhght the IiIe “N12345” where N12345 represents the file name of the<br />
EEPROM data for the analyzer. On the factory shipped EEPROM backup<br />
disk, the filename is PILEl.<br />
i........... :..:..v..... . . . . . . . . . . . . . . . . . . . . . . . . . i. . . . .,.. . . .““’ . . . . . . .:.:: :... :;:::;:j :.~,,.,,,,,~~~~~.~: :.::::::.:::.:::.:....:::::::::::::~.::::::::::<br />
4. press Tm ~~~~~~~~~~ to download the come&ion constants data into<br />
the instrument EEPROMs.<br />
5. Perform “Option Numbers Correction Constant (Test 56). n<br />
6. Press preset] and verify that good data was transferred to EEPROM by<br />
performing a simple measurement.<br />
7. Move the A9 switch back to its Normal position when you are done working<br />
with the instrument.<br />
340 Adjustments and Correction Constants
Loading Firmware<br />
Required Equipment and ‘lbols<br />
� Firmware disk for the <strong>HP</strong> <strong>8753E</strong><br />
Anulgzzr warmup l%m: None required.<br />
The following procedures will load firmware for new or existing CPU boards in<br />
an <strong>HP</strong> <strong>8753E</strong> network analyzer.<br />
Loading Firmware into an Existing CPU<br />
Use this procedure for upgrading firmware in an operational instrument whose<br />
CPU board has not been changed.<br />
Caution Loading hrmware will clear all internal memory.<br />
Perform the following steps to save any instrument states that<br />
are stored in internal memory to a floppy disk.<br />
~:: :::: i .~~,a~~~ . . .;yf&+?& 7 FE i
At the end of a successful loading, the LEDs for Channel 1 and Testport 1<br />
will remain on and the display will turn on indicating the version of lirmware<br />
that was loaded.<br />
I.nCa13eofDifticulty<br />
If the firmware did not load successfully, LED patterns on the front panel can<br />
help you isolate the problem.<br />
� If the following LED pattern is present, the firmware disk is not for use with<br />
your instrument model. Check that the firmware disk used was for the<br />
<strong>HP</strong> <strong>8753E</strong>.<br />
� If any of the following LED patterns are present,<br />
defective.<br />
LEDlhttern<br />
CJIlCE2 B L T S<br />
.<br />
.<br />
.<br />
. .<br />
. . .<br />
.<br />
.<br />
.<br />
. .<br />
. . .<br />
. .<br />
. . .<br />
. . .<br />
. .<br />
. . .<br />
the firmware disk may be<br />
� If any other LED pattern is present, the CPU board is defective.<br />
342 Adjustments and Correction Constants
Loading Firmware into a New CPU<br />
Use this procedure to load firmware for an instrument whose CPU board has<br />
been replaced.<br />
1. Turn off the network analyzer.<br />
2. Insert the firmware disk into the instrument’s disk drive.<br />
3. Turn the instrument on. The firmware wilI be loaded automatically during<br />
power-on. The front panel LEDs should step through a sequence as firmware<br />
is loaded. The display will be blank during this time.<br />
At the end of a successful loading, the LEDs for Channel 1 and Testport 1<br />
will remain on and the display will turn on indicating the version of firmware<br />
that was loaded.<br />
Note After the llrmware has been loaded, the correction constants<br />
must be restored. Refer to ‘Ihble 3-l (2 of 3) to identify the<br />
service procedures required to restore (retrieve) or recreate the<br />
correction constants.<br />
In Case of Diflhlty<br />
� If the lirmware did not load successfully, LED patterns on the front panel can<br />
help you isolate the problem.<br />
� If the following LED pattern is present, an acceptable hrmware filename<br />
was not found on the disk. (The desired format for gnuware filenames is<br />
87533-07. -02.) Check that the lirmware disk used was for the <strong>HP</strong> 87533.<br />
Adjustments and Correction Constants 343
� If any of the following LED patterns are present, the firmware disk may be<br />
defective.<br />
LED pattern<br />
CElCE2 B L T 6<br />
.<br />
. .<br />
. .<br />
. . .<br />
.<br />
. .<br />
. .<br />
. . .<br />
. .<br />
. . .<br />
. . .<br />
� �<br />
. . .<br />
� If any other LED pattern is present, the CPU board is defective.<br />
Note If Grmware did not load, a red LED on the CPU board will be<br />
flashing.<br />
� If the following LED pattern is present on the CPU board, suspect the disk<br />
drive or associated cabling:<br />
344 Adjustments and Correction Constants<br />
� � � � � � � �<br />
(front of instrument 4)
sg640e<br />
FN VCO ADJ<br />
ADJUSTMENT HOLE<br />
Figure 3-15. Location of the FN VCO TUNJZ Adjustment<br />
Figure 3-16. Fractioual-N Frequency Range Adjustment Display<br />
345 Adjustments and Correction Constants
10. Observe the analyzer for the results of this adjustment:<br />
� If the marker value is less than 7, you have completed this procedure.<br />
� If the marker value is greater than 7, readjust ‘TN VCO ADJ” to 7.<br />
Then perform steps 2 to 10 to con&m that the channel 1 and channel 2<br />
markers are stilI above and below the reference line respectively.<br />
w If you cannot adjust the analyzer correctly, replace the Al4 board<br />
assembly.<br />
Adjustments and Correction Constants 347
Frequency Accuracy Adjustment<br />
Required Equipment and ‘Idols<br />
Spectrum <strong>Analyzer</strong> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 8563E<br />
RF Cable, 500 Type-N, 24-inch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<strong>HP</strong> P/N 8120-4781<br />
Non-metallic Adjustment lb01 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 8830-0024<br />
Antistatic Wrist Strap . , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 9300-1367<br />
Antistatic Wrist Strap Cord . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 9300-0980<br />
Static-control ‘lhble Mat and Earth Ground Wire . . . . . . . . . . . . <strong>HP</strong> P/N 9300-0797<br />
Additional Required Equipment for 5OQ <strong>Analyzer</strong>s<br />
Adapter APC-7 to Type-N (f) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 11525A<br />
Additional Required Equipment for 750 <strong>Analyzer</strong>s<br />
Minimum Loss Pad . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 11852B<br />
Anul~m warmup time: 30 minutes.<br />
This adjustment sets the VCXO (voltage controlled crystal oscillator) frequency<br />
to maintain the instrument’s frequency accuracy.<br />
1. Remove the upper-rear bumpers and analyzer top cover<br />
2. Connect the equipment as shown in Figure 3-17.<br />
348 Adjustments and Correction Constants
Note<br />
3.<br />
4.<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
PORTI<br />
I<br />
PORT2<br />
50R MPE-N CABLE ASSEMBLY<br />
<strong>HP</strong> 8563A<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
WITH OPTION 075 <strong>HP</strong> 8563A<br />
SPECTRUM ANALYZER<br />
PGRTl<br />
I<br />
PORT?:<br />
Figure 3-17. Frequency Accuracy Adjustment Setup<br />
Make sure that the spectrum analyzer and network analyzer<br />
references are not connected.<br />
For Option lD5 Instruments Only: Remove the BNC-to-BNC jumper<br />
that is connected between the “EXT REF” and the “10 MHz Precision<br />
Reference,” as shown in Figure 3-19.<br />
Set the spectrum analyzer measurement parameters as follows:<br />
I<br />
I<br />
sq641e<br />
Adjustments and Correction Constants 34
5- On the <strong>HP</strong> <strong>8753E</strong>, press @GZj @GG) :~~~~~~~,- @ Lc/n (or @ Lc/nl for<br />
Option 006).<br />
6. No adjustment is required if the spectrum analyzer measurement is within<br />
the following specifications:<br />
� &30 kHz for the <strong>HP</strong> <strong>8753E</strong><br />
� f60 kHz for the <strong>HP</strong> 8753e, Option 006<br />
Otherwise, locate the Al2 assembly (red extractors) and adjust the<br />
VCXO ADJ (see Figure 3-18) for a spectrum analyzer center frequency<br />
measurement within specifications.<br />
7. Replace the Al2 assembly if you are unable to adjust the frequency as<br />
specified. Repeat this adjustment test.<br />
A12 Reference Assembly<br />
Figure 3-18. Location of the VCXO ADJ Adjustment<br />
Note To increase the accuracy of this adjustment, the following steps<br />
are recommended.<br />
8. Replace the instrument covers and wait 10 to 15 minutes in order to allow<br />
the analyzer to reach its precise operating temperature.<br />
9. Recheck the CW frequency and adjust if necessary.<br />
3-50 Adjustments and Correction Constants
Instruments with Option lD5 Only<br />
10. Reconnect the BNC-to-BNC jumper between the “EXT REF” and the “10<br />
MHz Precision Reference” as shown in Figure 3-19.<br />
ENC T O ENC HIGH STABILITY<br />
JUMPER FREGUENCY ADJUST<br />
\ /<br />
Figure 3-19. High Stability Frequency Adjustment Location<br />
11. Insert a narrow screwdriver and adjust the high-stability frequency<br />
reference potentiometer for a CW frequency measurement within<br />
specification.<br />
In Case of Difficulty<br />
Replace the A26 assembly if you cannot adjust the CW frequency within<br />
specification.<br />
sgb42e<br />
Adjustments and Correction Constants 3-51
High/Low Band Transition Adjustment<br />
&x&red Equipment and 9bols<br />
Non-metalhc Adjustment lb01 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 8830-0024<br />
Amlgzer warmup time: 30 minutes.<br />
This adjustment centers the VCO (voltage controlled oscillator) of the Al2<br />
reference assembly for high and low band operations.<br />
3. Press m ~~~~~~~~~~~~~~ (--& a (.., Illl @-&<br />
4. Press (Scale L.1] Lxl_] and observe the VCO tuning trace:<br />
� If the left half of trace = 0 flOO0 mV and right half of trace = 100 to<br />
200 mV higher (one to two divisions, see Figure 3-20): no adjustment is<br />
necessary.<br />
� If the adjustment is necessary, follow these steps:<br />
a. Adjust the VCO tune (see Pigure 3-21) to position the left half of the<br />
trace to 0 f125 mV. The variable capacitor, C85, has a half-turn tuning<br />
range if the Al2 Reference Board is part number 08753-60209, and<br />
seven turns if the part number is 08753-60357. Be careful not to<br />
overtighten and damage the seven-turn capacitor.<br />
b. Adjust the HBLB (see Figure 3-21) to position the right half of the trace<br />
125 to 175 mV (about 1 to 1.5 divisions) higher than the left half.<br />
� Refer to Chapter 7, “Source Troubleshooting,” if you cannot perform the<br />
adjustment.<br />
3-52 Adjustments and Correction Constants
I I I I I I I I 11 I<br />
START ii.*00 000 mz STOP 21.OdO 000 MHZ<br />
Figure 3-20. High/Low Band Transition Adjustment Trace<br />
Al2 Reference Assembly<br />
Figure 3-21. High/Low Band Adjustment Locations<br />
Adjustments and Correction Constants 3-53
Fractional-N Spur Avoidance and<br />
FM Sideband Adjustment<br />
Required Equipment and ‘lbols<br />
Spectrum <strong>Analyzer</strong> .................................................... <strong>HP</strong> 8563E<br />
<strong>HP</strong>-IB Cable ................................................... <strong>HP</strong> 10833A/B/G/B<br />
RF Cable 50 ohm, Type-N, 24-inch ............................... <strong>HP</strong> P/N 81204781<br />
Cable, 509 Coax, BNC (m) to BNC (m) .............................. .<strong>HP</strong> 10503A<br />
Non-metallic Adjustment lb01 ................................ <strong>HP</strong> P/N 8830-0024<br />
Antistatic Wrist Strap ........................................ <strong>HP</strong> P/N 9300-1367<br />
Antistatic Wrist Strap Cord .................................. <strong>HP</strong> P/N 9300-0980<br />
Static-control Able Mat and Earth Ground Wire ............ <strong>HP</strong> P/N 9300-0797<br />
Additional Required Equipment for 5013 <strong>Analyzer</strong>s<br />
Adapter APC-7 to Type-N (f) . . . . .., . . . . . . . . . . . . . . . .., . . . . . . . . . . . . . . . <strong>HP</strong> 11525A<br />
Additional Required Equipment for 75 ohm <strong>Analyzer</strong>s<br />
Minimum Loss Pad . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> 11852B<br />
Anulgm warmup time: 30 minutes.<br />
This adjustment minimizes the spurs caused by the API (analog phase<br />
interpolator, on the fractional-N assembly) circuits. It also improves the<br />
sideband characteristics.<br />
1. Connect the equipment as shown in Figure 3-22.<br />
2. Make sure the instruments are set to their default <strong>HP</strong>-IB addresses:<br />
<strong>HP</strong> <strong>8753E</strong> = 16, Spectrum <strong>Analyzer</strong> = 18.<br />
344 Adjustments and Correction Constants
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
WITH OPTION 075 1<br />
PORT1<br />
NETWORK ANALYZER<br />
WITH OPTION 075<br />
I<br />
PORT2<br />
EXT REF<br />
INPUT<br />
5Ofi, COAX, BNI.<br />
Figure 3-22.<br />
Fractional-N Spur Avoidance and FM Sideband Adjustment Setup<br />
3. Set the spectrum analyzer measurement parameters as follows:<br />
Reference Level OdBm<br />
Resolution Bandwidth lOOI%<br />
Center Frequency 676.145105 MHz<br />
Spa<br />
2.5 kHz<br />
I<br />
Adjustments and Correction Constants 3-55
4. On the <strong>HP</strong> <strong>8753E</strong>, press LPreset] (i&) IF- l&J w @ m {&&!“I&Q..<br />
...... . . . s ....T .:..: T ::.................. . . . L...<br />
(pzLmiqm.<br />
5. Adjust the 100 kHz (R77) for a null (minimum amplitude) on the spectrum<br />
analyzer. The minimum signal may, or may not, drop down into the noise<br />
floor.<br />
1OOkHr API1 API2 API3 API4<br />
ORANGE (R77) (R35j (R43j (R45) CR471<br />
Al3 Fractional-N Analog Assembly<br />
Figure 3-23. Location of API and 100 kHz Adjustments<br />
6. On the spectrum analyzer, set the center frequency for 676.051105 MHz.<br />
7. On the <strong>HP</strong> 8753e, press m ~~~~~~~ @ZiZiiZ) m.<br />
- .._....._........__....<br />
8. Adjust the API1 (R35) for a null (minimum amplitude) on the spectrum<br />
analyzer.<br />
9. On the spectrum analyzer, set the center frequency for 676.007515 MHz.<br />
1o. on the <strong>HP</strong> <strong>8753E</strong>, press m ~~,~~ ‘-, ms<br />
11. Adjust the API2 (R43) for a null (minimum amplitude) on the spectrum<br />
analyzer.<br />
12. On the spectrum analyzer, set the center frequency for 676.003450 MHz.<br />
_ _<br />
13. ()n the <strong>HP</strong> 87533, press CMenu) ~~~~~; (676.ooo45) (MIII).<br />
_ _ i .,.........,.,.,.,....i _ .~ . . ..__.. .<br />
14. Adjust the API3 (R45) for a nuII (minimum amplitude) on the spectrum<br />
analyzer.<br />
3-56 Adjustments and Correction Constants
15. On the spectrum analyzer, set the center frequency for 676.003045 MHz.<br />
16. On the <strong>HP</strong> <strong>8753E</strong>, press (Menu) YmFY$$Q. c-1 m.<br />
17. Adjust the API4 (R47) for a null (minimum amplitude) on the spectrum<br />
analyzer.<br />
ln Case of Difliculty<br />
18. If this adjustment cannot be performed satisfactorily, repeat the entire<br />
procedure. Or else replace the Al3 board assembly.<br />
Adjustments and Correction Constants 3-57
Source Spur Avoidance Tracking Adjustment<br />
Required Equipment and ‘Idols<br />
BNC AIIigator Clip Adapter .................................. <strong>HP</strong> P/N 8120-1292<br />
BNC-to-BNC Cable ........................................... .<strong>HP</strong> P/N 8120-1840<br />
Antistatic Wrist Strap ........................................ <strong>HP</strong> P/N 9300-1367<br />
Antistatic Wrist Strap Cord .................................. <strong>HP</strong> P/N 9300-0980<br />
Static-control Table Mat and Earth Ground Wire ............<strong>HP</strong> P/N 9300-0797<br />
Anulgzer warmup time: 30 minutes.<br />
This adjustment optimizes tracking between the YO (YIG oscillator) and the<br />
cavity oscillator when they are frequency offset to avoid spurs. Optimizing<br />
YO-cavity oscillator tracking reduces potential phase-locked loop problems.<br />
1. Mate the adapter to the BNC cable and connect the BNC connector end to<br />
AUX INPUT on the <strong>HP</strong> <strong>8753E</strong> rear panel. Connect the BNC center conductor<br />
alligator-clip to All TPlO (labeled 4 ERR); the shield clip to All TPl (GND)<br />
as shown in Figure 3-24.<br />
BROWN<br />
A l lTP1 A l lip10<br />
GND @ERR UNLK CAV ADJ<br />
A3 Source<br />
Figure 3-24. Location of All Test Points and A3 CAV ADJ Adjustments<br />
3-58 Adjustments and Correction Constants
5. To make sure that you have connected the test points properly, adjust the<br />
CAV ADJ potentiometer while observing the analyzer display. You should<br />
notice a change in voltage.<br />
6. Observe the phase locked loop error voltage:<br />
w If “spikes” are not visible on the analyzer display (see Figure 3-25): no<br />
adjustment is necessary.<br />
� If “spikes” are excessive (see Figure 3-25): adjust the CAV ADJ<br />
potentiometer (see Pigure 3-24) on the A3 source bias assembly to eliminate<br />
the spikes.<br />
� If the “spikes” persist, refer to Chapter 7, “Source Troubleshooting.”<br />
I i i i i i i i i i 1<br />
a) Acceptable b) Excessive<br />
Figure 3-25. Display of Acceptable versus Excessive Spikes<br />
sg637s<br />
Adjustments and Correction Constants 3-59
Unprotected Hardware Option Numbers Correction<br />
Constants<br />
Aruzlyzer warmup Tim.&- None.<br />
This procedure stores the instrument’s unprotected option(s) information in A9<br />
CPU assembly EEPROMs.<br />
1. Make sure the A9 switch is in the Alter position.<br />
2. Record the installed options that are printed on the rear panel of the<br />
analyzer.<br />
4. Refer to ‘Ihble 3-2 for the address of each unprotected hardware option.<br />
Enter the address for the speci& installed hardware option that needs to be<br />
enabled or disabled. Follow the address entry by ~~~~. o Lxl.<br />
. Press f&!$$: L-1] (xl, then w to enable the option;<br />
.;s/ ,, ,:;::..<br />
. or, press :@m -._._-. @ (XJ), then w to disable the option.<br />
‘Ihble 3-2. PEEK/POKE Addressies<br />
Hardware PEEK/POKE<br />
Options Address<br />
5. Repeat steps 3 and 4 for all of the unprotected options that you want to<br />
enable.<br />
3-60 Adjustments and Correction Constants
6. After you have entered all of the instrument’s hardware options, press the<br />
following keys:<br />
7. View the analyzer display for the listed options<br />
8. When you have entered all of the hardware options, return the A9 switch to<br />
the Normal position.<br />
9. Perform the “EEPROM Backup Disk Procedure” located on page 3-42.<br />
In Case of DiiTiculty<br />
If any of the installed options are missing from the list, return to step 2 and<br />
reenter the missing option(s).<br />
Adjustments and Correction Constants 3-61
Sequences for Mechanical Adjustments<br />
The network analyzer has the capability of automating tasks through a<br />
sequencing function. The following adjustment sequences are available via<br />
Access <strong>HP</strong> on the World Wide Web.<br />
� F’ractional-N kequency Range Adjustment (F’NADJ and FNCHK)<br />
� High/Low Band Transition Adjustment (HBLBADJ)<br />
� Fractional-N Spur Avoidance and F’M Sideband Adjustment (APIADJ)<br />
You can download these adjustment sequences from the following URL:<br />
http://vaw.tmo.hp.com/tmo/pia/component-test/PIATop/~glish/<br />
comptest,support.htmI<br />
How to Load Sequences from Disk<br />
1. Place the sequence disk in the analyzer disk drive.<br />
3. Select any or all of the following sequence liles by pressing:<br />
..........ii ., / .:. : :::::::... _ .,..; .;.,.,... .::,..../,.,.,.;..; .a......... .:: . . . ,......... . . .<br />
. Select ~~~~~~~~~~~~~.~~ if you want to load the file for the “kacti0nal-N<br />
~......... .._......... ...............i....... .: .: .:::: . . . ...._;i~..........................~~~.<br />
. .<br />
Spur Avoidance and F’M Sideband Adjustment. n<br />
. ‘&led ~~~~~~~~.~~~~<br />
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<br />
if you wmt to lOad the fle for the “High/Low<br />
Band Transition Adjustment. n<br />
3-62 Adjustments and Correction Constants
How to Set Up the Fractional-N Frequency Range<br />
Adjustment<br />
1. Remove the right-rear bumpers and right side cover. This exposes the<br />
adjustment location in the sheet metal.<br />
2. Press (iGZ-j ~~~~~-.~..E~~~ ..~............................-:::: .:::: .: -.......A ii.. i.v.uA .......... . . ..A.......-.<br />
. . (where X is the sequence number).<br />
3. Adjust the “F’N VCO TUNE” with a non-metallic tool so that the channel 1<br />
marker is as many divisions above the reference line as the channel 2 marker<br />
is below it.<br />
. . . . . . . . . . . .’ :.............<br />
4. Press Ipreset] ?g#?jm@J ~.~@jK$&~ (where X is the sequence number).<br />
� If the marker value is ~7, you have completed this procedure.<br />
� If the marker value is >7, readjust “F’N VCO TUNE” to 7. Then repeat<br />
steps 2,3, and 4 to conlirm that the channel 1 and channel 2 markers are<br />
still above and below the reference line respectively.<br />
How to Set Up the High/Low Band Transition<br />
Adjustments / ,.; _ _ _ ;<br />
l. Press B ~~~~:~~~~~?~~~ (where X is the sequence number).<br />
2. Observe the VCO tuning trace:<br />
� If the left half of trace = of1000 mV and right half of<br />
trace = 100 to 200 mV higher (one to two divisions): no adjustment is<br />
necessary.<br />
w If the adjustment is necessary, follow these steps:<br />
a. Remove the upper-rear bumpers and top cover, using a TORX<br />
screwdriver.<br />
b. Adjust the VCO tune (Al2 C85) to position the left half of the trace<br />
to of125 mV. This is a very sensitive adjustment where the trace could<br />
easily go off of the screen.<br />
c. Adjust the HBLB (Al2 R68) to position the right half of the trace<br />
125 to 175 mV (about 1 to 1.5 divisions) higher than the left half.<br />
Adjustments and Correction Constants 3-63
� Refer to Chapter 7, “Source Troubleshooting,” if you cannot perform the<br />
adjustment.<br />
How to Set Up the Fractional-N Spur Avoidance and<br />
FM Sideband Adjustment<br />
1. Press B ~~~:~~~,~~~~~~’ (where X is the sequence number).<br />
2. Remove the upper-rear comer bumpers and the top cover, using a TORX<br />
screwdriver.<br />
3. Follow the directions on the analyzer display and make alI of the API<br />
adjustments.<br />
Sequence Contents<br />
Sequence for the High/Low Band Transition Adjustment<br />
--Sequence HB~sets the hi-band to low-band switch point.-<br />
PRESET<br />
SYSTEM<br />
SERVICE MENU<br />
ANALOG BUS ON<br />
STARTllIWu<br />
STOP 21 M/u<br />
MEAS<br />
ANALOG IN 22 xl (Al2 GND)<br />
DISPLAY<br />
DATA>MEM<br />
DATA-MEM<br />
MEAS<br />
ANALOG IN 23 xl (VCO TUNE)<br />
MKR11IWl.l<br />
SCALELREF .l xl<br />
3-64 Adjustments and Correction Constants
Sequences for the Fractional-N Frequency Range Adjustment<br />
-Sequence FND sets up Al4 (FRAC N Digital) VCO.-<br />
DISPLAY<br />
DUAL CHAN ON<br />
SYSTEM<br />
SERVICE MENU<br />
ANALOG BUS ON<br />
MENU<br />
NUMBER OF POINTS 11 xl<br />
COUPLED CHAN OFF<br />
START 36 M/u<br />
STOP 60.75 M./u<br />
MENU<br />
SWEEP TIME 12.5 k/m<br />
MEAS<br />
ANALOG IN 29 xl (FN VCO TUN)<br />
SCALE/REF 0.6 xl<br />
REF VALUE -7 xl<br />
CH 2<br />
MENU<br />
CW FREQ 31.0001 M/u<br />
SWEEP TIME 12.375 k/m<br />
MEAS<br />
ANALOG IN 29 xl (FN VCO TUN)<br />
SCALELREF .2 xl<br />
REF VALUE 6.77 xl<br />
MKR6k/m<br />
--Sequence FNCHK check the VCO a@@stmmt.-<br />
MENU<br />
CW FREQ 1 G/n<br />
SYSTEM<br />
SERVICE MENU<br />
ANALOG BUS ON<br />
SERVICE MODES<br />
FRACNTUNEON<br />
ANALOG IN 29 xl<br />
Adjustments and Correction Constants 3-65
SCALELREF<br />
REF VALUE 7 xl<br />
Sequences for the Fractional-N Avoidance and<br />
FM Sideband Adjustment<br />
--Sequence APL4DJsets up thejhctional-N API spur a@shmnts-<br />
TITLE<br />
SP 2.5K<br />
PERIPHERAL <strong>HP</strong>IB ADDR<br />
18 xl<br />
TITLE TO PERIPHERAL<br />
WAIT x<br />
0 xl<br />
TITLE<br />
AT ODB<br />
TITLE TO PERIPHERAL<br />
WAIT x<br />
0 xl<br />
TITLE<br />
RM 1OOHz<br />
TITLE TO PERIPHERAL<br />
WAIT x<br />
0 xl<br />
TITLE<br />
CF 676.145105MZ<br />
TITLE TO PERIPHERAL<br />
WAIT x<br />
0 xl<br />
CW FREQ<br />
676.045105Mh<br />
TITLE<br />
ADJ Al3 1OOKHZ<br />
SEQUENCE<br />
PAUSE<br />
TITLE<br />
CF 676.048105MZ<br />
TITLE TO PERIPHERAL<br />
WAIT x<br />
0 xl<br />
3-66 Adjustments and Correction Constants
TITLE<br />
ADJ Al3 API1<br />
SEQUENCE<br />
PAUSE<br />
TITLE<br />
CF 676.007515MZ<br />
TITLE TO PERIPHERAL<br />
WATT x<br />
0 xl<br />
CW FREQ<br />
676.004515Mh<br />
TITLE<br />
ADJ Al3 API2<br />
SEQUENCE<br />
PAUSE<br />
TITLE<br />
CF 676.00345OMZ<br />
TITLE TO PERIPHERAL<br />
WMT x<br />
0 xl<br />
CW FREQ<br />
676.00045OMh.1<br />
TITLE<br />
ADJ Al3 API3<br />
SEQUENCE<br />
PAUSE<br />
TITLE<br />
CF 676.003045MZ<br />
TITLE TO PERIPHERAL<br />
WMT x<br />
0 xl<br />
CW FREQ<br />
676.000045Mh<br />
TITLE<br />
ADJ Al3 API4<br />
Adjustments and Correction Constants 3-67
Start Troubleshooting Here<br />
The information in this chapter helps you:<br />
� Identify the portion of the analyzer that is at fault.<br />
� Locate the specific troubleshooting procedures to identify the assembly or<br />
peripheral at fault.<br />
To identify the portion of the analyzer at fault, follow these procedures:<br />
Step 1. Initial Observations<br />
Step 2. Operator’s Check<br />
Step 3. <strong>HP</strong>-IB Systems Check<br />
Step 4. Faulty Group Isolation<br />
4<br />
Start Troubleshooting Here 4-l
Assembly Replacement Sequence<br />
The following steps show the sequence to replace an assembly in an <strong>HP</strong> <strong>8753E</strong><br />
network analyzer.<br />
1. Identify the faulty group. Refer to Chapter 4, “Start Troubleshooting Here.”<br />
Follow up with the appropriate troubleshooting chapter that identifies the<br />
faulty assembly.<br />
2. Order a replacement assembly. Refer to Chapter 13, “Replaceable Parts. n<br />
3. Replace the faulty assembly and determine what adjustments are necessary.<br />
Refer to Chapter 14, “Assembly Replacement and Post-Repair Procedures. n<br />
4. Perform the necessary adjustments. Refer to Chapter 3, “Adjustments and<br />
Correction Constants. n<br />
5. Perform the necessary performance tests. Refer to Chapter 2, “System<br />
Verification and Performance Tests. n<br />
Having Your <strong>Analyzer</strong> <strong>Service</strong>d<br />
The <strong>HP</strong> <strong>8753E</strong> has a one year on-site warranty, where available. If the analyzer<br />
should fail any of the following checks, call your local <strong>HP</strong> sales or service office.<br />
A customer engineer will be dispatched to service your analyzer on-site. If a<br />
customer engineer is not available in your area, follow the steps below to send<br />
your analyzer back to <strong>HP</strong> for repair<br />
1. Choose the nearest <strong>HP</strong> service center. (A table listing of Hewlett-Packard<br />
sales or service offices is provided at the end of this guide.)<br />
2. Include a detailed description of any failed test and any error message.<br />
3. Ship the analyzer, using the original or comparable antistatic packaging<br />
materials.<br />
4-2 Start Troubleshooting Here
Step 1. InitiaI Observations<br />
Initiate the <strong>Analyzer</strong> Self-‘I&t<br />
1.<br />
2.<br />
3.<br />
Disconnect all devices and peripherals from the analyzer.<br />
Switch on the analyzer and press WI.<br />
Watch for the indications shown in Figure 4-l to determine if the analyzer is<br />
operating correctly.<br />
w If the self-test failed, refer to “Step 4. Faulty Group Isolation”.<br />
Start Troubleshooting Here 4-3
Step 2. Operator’s Check<br />
Description<br />
The operator’s check consists of two softkey initiated tests: Port 1 Op Chk and<br />
Port 2 Op Chk.<br />
A short is connected to port 1 (port 2) to reflect ah the source energy back into<br />
the analyzer for an SII (SZZ) measurement.<br />
The first part of Port I Op Chk checks the repeatability of the transfer switch.<br />
An SI1 measurement is stored in memory and the switch is toggled to port 2 and<br />
then back to port 1 where another SII measurement is made. The difference<br />
between the memory trace and the second trace is switch repeatability.<br />
The remaining parts of both tests exercise the internal attenuator in 5 dEI steps<br />
over a 55 dB range.<br />
The resulting measurements must fall within a limit testing window to pass the<br />
test. The window size is based on both source and receiver specifications.<br />
The operator’s check determines that:<br />
� The source is phase locked across the entire frequency range.<br />
� All three samplers are functioning properly.<br />
� The transfer switch is operational.<br />
� The attenuator steps 5 dB at a time.<br />
Required Equipment and lbols<br />
Short . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . part of the <strong>HP</strong> 85031B calibration kit<br />
Analgzm warm-up time: 30 minutes.<br />
Procedure<br />
1. Disconnect all devices, peripherals, and accessories (including adapters and<br />
limiters) from the analyzer.<br />
3. The display should show TEST 21 Port 1 Op Chk in the active entry area.<br />
44 Start Troubleshooting Here
4. Press ~E@WTE ‘EST to begin the test.<br />
/. ;.i.::. ..: .<br />
5. At the prompt, connect the short to the port indicated. Make sure the<br />
connection is tight.<br />
7. The test is a sequence of subtests. At the end of the subtests, the test title<br />
and result will be displayed. If all tests pass successfully, the overall test<br />
status will be PASS. If any test fails, the overall test status will be FAIL.<br />
8. ‘lb run the test for port 2, press the step &) key. The display should show<br />
TEST 22 Port2 Op Chkin the active entry area.<br />
9. Repeat steps 4 through 7.<br />
10. If both tests pass, the analyzer is about 80% verified. If either test fails,<br />
refer to “Step 4. Faulty Group Isolation” in this section, or:<br />
a. Make sure that the connection is tight. Repeat the test.<br />
b. Visually inspect the connector interfaces and clean if necessary (refer to<br />
“Principles of Microwave Connector Care” located in Chapter 1).<br />
c. Verify that the short meets published specihcations.<br />
d. Substitute another short, and repeat the test.<br />
e. Finally, refer to the detailed tests located in this section, or fault<br />
isolation procedures located in the troubleshooting sections<br />
Start Troubleshooting Here 4-5
Step 3. <strong>HP</strong>-IB Systems Check<br />
Check the analyzer’s <strong>HP</strong>-IB functions with a known. working passive peripheral<br />
(such as a plotter, printer, or disk drive).<br />
1. Connect the peripheral to the analyzer using a good <strong>HP</strong>-IB cable..<br />
2. Press o “““““““““““““““““““” to enable the analyzer to controI the<br />
peripheral.<br />
3. men press -~~~~~~~~~ and the appropriate softkeys to verify aat the<br />
L:L-.;..;; . . . . . . . . . . . . . . _i . . . . . . . ..-... _ .-.... _ . . . . . . . . . . . . . . . . . .i:::: i.<br />
device addresses will be recognized by the analyzer. The factory default<br />
addresses are:<br />
Device <strong>HP</strong>-IB Address<br />
<strong>HP</strong> 87533 16<br />
Plotter port - BP-IB 5<br />
Printer port - BP-IB 1<br />
Disk (external) 0<br />
Controller 21<br />
Power meter - I-FIB 13<br />
Note You may use other addresses with two provisions:<br />
4-6 Start Troubleshooting Here<br />
� Each device must have its own address.<br />
m The address set on each device must match the one<br />
recognized by the analyzer (and displayed).<br />
Peripheral addresses are often set with a rear panel switch.<br />
Refer to the manual of the peripheral to read or change its<br />
address.
If Using a Plotter or Printer<br />
1. Ensure that the plotter or printer is set up correctly:<br />
� Power is on.<br />
� Pens and paper loaded.<br />
� Pinch wheels are down.<br />
� Some plotters need to have Pl and P2 positions set.<br />
:,<br />
2. Press Lcopy and then ,..................../ 3%~~ or ;.:...-:.:...> ~~~.~.~~~~~~~~~.<br />
. . . . :: . . . . ~........._.......................... .._.... .::./ ..~..-. L .A......<br />
� If the result is a copy of the analyzer display, the printing/plotting features<br />
are functional in the analyzer. Continue with “Troubleshooting Systems<br />
with Multiple Peripherals”, “Troubleshooting Systems with Controllers”, or<br />
the “Step 4. Faulty Group Isolation” section in this chapter.<br />
� If the result is not a copy of the analyzer display, suspect the <strong>HP</strong>-IB<br />
function of the analyzer. Refer to Chapter 6, “Digital Control<br />
Troubleshooting. n<br />
lf Using an External Disk Drive<br />
::::~...~...:......:.:...::::~:~,~:~~..
� If the resultant trace starts at 1 MHz, <strong>HP</strong>-IB is functional in the analyzer.<br />
Continue with “Troubleshooting Systems with Multiple Peripherals”,<br />
“Troubleshooting Systems with Controllers”, or the “Step 4. Faulty Group<br />
Isolation” section in this chapter.<br />
� If the resultant trace does not start at 1 MHz, suspect the <strong>HP</strong>-IB function<br />
of the analyzer: refer to Chapter 6, “Digital Control Troubleshooting.”<br />
Troubleshooting Systems with Multiple Peripherals<br />
Connect any other system peripherals (but not a controller) to the analyzer<br />
one at a time and check their functionality. Any problems observed are in the<br />
peripherals, cables, or are address problems (see above).<br />
Troubleshooting Systems with Controllers<br />
Passing the preceding checks indicates that the analyzer’s peripheral functions<br />
are normal. Therefore, if the analyzer has not been operating properly with an<br />
external controller, check the following:<br />
� The <strong>HP</strong>-ID interface hardware is incorrectly installed or not operational. (See<br />
“<strong>HP</strong>-II3 Requirements” in the <strong>HP</strong> <strong>8753E</strong> <strong>Network</strong> Anulgzer User’s <strong>Guide</strong>.)<br />
� The programming syntax is incorrect. (Refer to the <strong>HP</strong> <strong>8753E</strong> <strong>Network</strong><br />
Aruzlgzer Programmer’s G&&e.)<br />
If the analyzer appears to be operating unexpectedly but has not completely<br />
failed, go to “Step 4. Faulty Group Isolation.”<br />
4-8 Start TroubleshootinN Here
Step 4. Faulty Group Isolation<br />
Use the following procedures only if you have read the previous sections in<br />
this chapter and you think the problem is in the analyzer. These are simple<br />
procedures to verify the four functional groups in sequence, and determine<br />
which group is faulty.<br />
The four functional groups are:<br />
� power supplies<br />
w digital control<br />
� source<br />
� receiver<br />
Descriptions of these groups are provided in Chapter 12, “Theory of Operation.”<br />
The checks in the following pages must be performed in the order presented.<br />
If one of the procedures fails, it is an indication that the problem is in the<br />
functional group checked. Go to the troubleshooting information for the<br />
indicated group, to isolate the problem to the defective assembly.<br />
Figure 4-2 illustrates the troubleshooting organization.<br />
I--------------------------------------------<br />
I ISOLATE FAULTY GROUP<br />
I<br />
I ASSEMBLY<br />
LEVEL TROUBLESHOOTING<br />
Figure 4-2. Troubleshooting Orgunization<br />
sg645d<br />
Start Troubleshooting Here 4-8
Power Supply<br />
Check the Rear Panel LEDs<br />
Switch on the analyzer. Notice the condition of the two LEDs on the Al5<br />
preregulator at rear of the analyzer. (See Figure 4-3.)<br />
� The upper (red) LED should be off.<br />
� The lower (green) LED should be on.<br />
i I<br />
RED LED GREEN LED<br />
NORMALLY OFF NORMALLY ON<br />
Figure 43. Al5 Preregulator LEDs<br />
Check the A8 Post Regulator LEDs<br />
UNE VOLTAGE<br />
SELECTOR SWITCH<br />
/<br />
sg646e<br />
Remove the analyzer’s top cover. Switch on the power. Inspect the green LEDs<br />
along the top edge of the A8 post-regulator assembly.<br />
I Ail green LEDs should be on.<br />
� The fan should be audible.<br />
In case of difficulty, refer to Chapter 5, “Power Supply Troubleshooting.”<br />
4-l 0 Start Troubleshooting Here
Digital Control<br />
Observe the Power Up Sequence<br />
Switch the analyzer power off, then on. The following should take place within<br />
a few seconds:<br />
� On the front panel, observe the following:<br />
1. All six amber LEDs illuminate.<br />
2. The port 2 LED illuminates.<br />
3. The amber LEDs go off after a few seconds, except the CH 1 LED. At the<br />
same moment, the port 2 LED goes off and the port 1 LED ilhnninates.<br />
(See Figure 4-4.)<br />
� The display should come up bright with no irregularity in colors.<br />
� After an initial pattern, five red LEDs on the A9 CPU board should remain<br />
off. They can be observed through a small opening in the rear panel.<br />
If the power up sequence does not occur as described, or if there are<br />
problems using the front panel keyboard, refer to Chapter 6, “Digital Control<br />
Troubleshooting. n<br />
Figure 4-4. Front Panel Power Up Sequence<br />
Start Troubleshooting Here 4-11
Verify Internal Tests Passed<br />
. . . . . . . . . . ,. .,..... . . . . _ . . / / . . . .<br />
l- Press [Preset) (System) .~~~~~~~.~ ..:::: . ii .._ i.::::::.~; . . . . . . . . . . . . .:::..: . .._. .._ ;;.:..;, .*T$i:: ..:.: .._..... :~~~~.:~~~,<br />
. . . . . . . . ..~.........~.~.....~ . . . . . . _... ;.:.::..: . ... ;:z:.:
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
/ \<br />
ADAPTER WC-7 to N(f)<br />
_-<br />
li<br />
.-,<br />
:<br />
I<br />
<strong>HP</strong> 8481A ’ <strong>HP</strong> 8482A<br />
POWER<br />
SENSOR<br />
POWER<br />
SENSOR<br />
” 5<br />
<strong>HP</strong> 438A<br />
POWER METER<br />
Figure 4-5. Equipment Setup for Source Power Check<br />
2. Zero and calibrate the power meter. Press LPreset] on the analyzer to initialize<br />
the instrument.<br />
3. on the analyzer, press LMenu) ~~~~~ ~ Lk/m) to output a cw 3oo kHz<br />
signal. The power meter should read approximately 0 deem.<br />
4. Press [161 m to change the CW frequency to 16 MHz. The output power<br />
should remain approximately 0 dBm throughout the analyzer frequency<br />
range. Repeat this step at 1 and 3 GHz. (For Option 006 include an additional<br />
check at 6 GHz.)<br />
If any incorrect power levels are measured, refer to Chapter 7, “Source<br />
Troubleshooting. n<br />
4.14 Start Troubleshooting Here<br />
s9648e
Figure 4-6. ABUS Node 16: 1 V/GHz<br />
sg641 d<br />
If any of the above procedures provide unexpected results, or if error messages<br />
are present, refer to Chapter 7, “Source Troubleshooting.”<br />
Start Troubleshooting Here 4-15
Receiver<br />
Observe the A and B Input Traces<br />
1.<br />
2.<br />
3.<br />
4.<br />
5.<br />
Connect the equipment as shown in F’igure 47 below. Be sure that any<br />
special accessories, such as limiters, have been disconnected. (The through<br />
cable is <strong>HP</strong> part number 8120-4779.)<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
TEST PORT<br />
THRU CABLE<br />
Figure 4-7. Equipment Setup<br />
sg649e<br />
Observe the measurement trace displayed by the A input. The trace should<br />
have about the same flatness as the trace in Figure 4-8.<br />
Observe the measurement trace displayed by the B input. The trace should<br />
have about the same flatness as the trace in Figure 4-8.<br />
4-l 6 Start Troubleshooting Here
Accessories<br />
If the analyzer has passed all of the previous checks but is still making incorrect<br />
measurements, suspect the system accessories Accessories such as RF or<br />
interconnect cables, calibration or verification kit devices, limiters, and adapters<br />
can ail induce system problems<br />
Reconfigure the system as it is normally used and reconllrm the problem.<br />
Continue with Chapter 9, “Accessories Troubleshooting. n<br />
Accessories Error Messages<br />
� POWERPROBESHUTDOWN!<br />
The biasing supplies to a front panel powered device (like a probe<br />
or millimeter module) are shut down due to excessive current draw.<br />
Troubleshoot the device.<br />
4-l 8 Start Troubleshooting Here
Power Supply Troubleshooting<br />
Use this procedure only if you have read Chapter 4, “Start Troubleshooting<br />
Here.” Follow the procedures in the order given, unless:<br />
� an error message appears on the display, refer to “Error Messages” near the<br />
end of this chapter.<br />
� the fan is not working; refer to “Fan Troubleshooting” in this chapter.<br />
The power supply group assemblies consist of the following:<br />
� A8 post regulator<br />
� Al5 preregulator<br />
All assemblies, however, are related to the power supply group because power is<br />
supplied to each assembly.<br />
5<br />
Powor Supply Troubleshooting 5-l
Assembly Replacement Sequence<br />
The following steps show the sequence to replace an assembly in an <strong>HP</strong> <strong>8753E</strong><br />
network analyzer.<br />
1. Identify the faulty group. Refer to Chapter 4, “Start Troubleshooting Here.”<br />
Follow up with the appropriate troubleshooting chapter that identifies the<br />
faulty assembly.<br />
2. Order a replacement assembly. Refer to Chapter 13, “Replaceable Parts.”<br />
3. Replace the faulty assembly and determine what adjustments are necessary.<br />
Refer to Chapter 14, “Assembly Replacement and Post-Repair Procedures. n<br />
4. Perform the necessary adjustments. Refer to Chapter 3, “Adjustments and<br />
Correction Constants. n<br />
5. Perform the necessary performance tests Refer to Chapter 2, “System<br />
Verification and Performance Tests ’<br />
5-2 Power Supply Troubleshooting
Simplified Block Diagram<br />
Figure 5-l shows the power supply group in simplified block diagram form.<br />
Refer to the detailed block diagram of the power supply (Figure 5-8) located at<br />
the end of this chapter to see voltage lines and specific connector pin numbers.<br />
PREREGULATOR<br />
A17 MOTHEREOARG<br />
OFF DURING<br />
NORMAL OPERATION<br />
\ON DURING<br />
NORMAL OPERATION<br />
\ ALL ON DURING<br />
NORMAL OPERAllON<br />
Figure 5-1. Power Supply Group Simplified Block Diagram<br />
sg6105e<br />
Power Supply Troubleshooting 5-3
Start Here<br />
Check the Green LED and Red LED on Al5<br />
Switch on the analyzer and look at the rear panel of the analyzer. Check the<br />
two power supply diagnostic LEDs on the Al5 preregulator casting by looking<br />
through the holes located to the left of the line voltage selector switch. (See<br />
Figure 5-2.)<br />
During normal operation, the bottom (green) LED is on and the top (red) LED is<br />
off. If these LEDs are normal, then Al5 is 95% verified. Continue to “Check the<br />
Green LEDs on A8”.<br />
� If the green LED is not on steadily, refer to “If the Green LED of the Al5 Is<br />
not ON Steadily” in this procedure.<br />
� If the red LED is on or flashing, refer to “If the Red LED of the Al5 Is ON” in<br />
this procedure.<br />
54 Power Supply Troubleshooting<br />
RED LED GREEN LED<br />
NORMALLY OFF NORMALLY ON<br />
/ /<br />
Figure 5-2. Location of Al5 Diagnostic LEDs<br />
LINE VOLTAGE<br />
SELECTOR SWITCH<br />
sg646e
Check the Green LEDs on A8<br />
Remove the top cover of the analyzer and locate the A8 post regulator; use the<br />
location diagram under the top cover if necessary. Check to see if the green<br />
LEDs on the top edge of A8 are all on. There are eight green LEDs (one is not<br />
visible without removing the PC board stabilizer).<br />
� If all of the green LEDs on the top edge of A8 are on, there is a 95%<br />
confidence level that the power supply is verified. lb confirm the last 5%<br />
uncertainty of the power supply, refer to “Measure the Post Regulator<br />
Voltages” (next).<br />
� If any LED on the A8 post regulator is off or Eashing, refer to “If the Green<br />
LEDs of the A8 are not alI ON” in this procedure.<br />
Measure the Post Regulator Voltages<br />
Measure the DC voltages on the test points of A8 with a voltmeter. Refer to<br />
Figure 5-3 for test point locations and Table 5-l for supply voltages and limits.<br />
+f%v AGND +5v!? SIX -1% -12.6VPP +15V -5VU -5.2V +22v t6V<br />
Figure 5-3. A8 Post Regulator ‘l&t Point Locations<br />
Power Supply Troubleshooting 5-5
‘lhble 5-1. A8 Post Regulator Test Point Voltages<br />
TP SUPPlY<br />
1 + 66 V (not used)<br />
2 AGND<br />
3 +6VD<br />
4 SDIS<br />
6 -16V<br />
6 - 12.6 VPP (probe power)<br />
7 +16V<br />
8 +6W<br />
0 -5.2 V<br />
10 +22v<br />
11 +6V<br />
5-5 Power Supply Troubleshooting<br />
Bane<br />
+ 64.6 to + 65.4<br />
n/a<br />
+4.0 to +6.3<br />
n/a<br />
-14.4 to -15.6<br />
-12.1 to -12.8<br />
+ 14.5 to + 15.5<br />
+ 5.05 to + 5.35<br />
-5.0 to -5.4<br />
+21.3 to +22.7<br />
+6.8 to +6.2
If the Green LED of the Al5 Is not ON Steadily<br />
If the green LED is not on steadily, the line voltage is not enough to power the<br />
analyzer.<br />
Check the Line Voltage, Selector Switch, and Fuse<br />
Check the main power line cord, line fuse, line selector switch setting, and<br />
actual line voltage to see that they are all correct. F’igure 5-4 shows how to<br />
remove the line fuse, using a small flat-blade screwdriver to pry out the fuse<br />
holder. Figure 5-2 shows the location of the line voltage selector switch. Use a<br />
small flat-blade screwdriver to select the correct switch position.<br />
If the Al5 green LED is still not on steadily, replace A15.<br />
FUSE IN USE<br />
\ INSERT SCREWDRIVER,<br />
PRY OPEN<br />
Figure 5-4. Removing the Line Fuse<br />
Power Supply Troubleshooting 5-7
If the Red LED of the Al5 Is ON<br />
If the red LED is on or flashing, the power supply is shutting down. Use the<br />
following procedures to determine which assembly is causing the problem.<br />
Check the A8 Post Regulator<br />
1. Switch off the analyzer.<br />
2. Disconnect the cable A15Wl from the A8 post regulator. (See Figure 5-5.)<br />
3. Switch on the analyzer and observe the red LED on A15.<br />
� If the red LED goes out, the problem is probably the A8 post regulator.<br />
Continue to “Verify the Al5 Preregulator” to first verify that the inputs to<br />
A8 are correct.<br />
� If the red LED is still on, the problem is probably the Al5 preregulator, or<br />
one of the assemblies obtaining power from it. Continue with “Check for a<br />
Faulty Assembly”.<br />
5-8 Power Supply Troubleshooting
Al5 Al5Wl (To<br />
Pre Reguloiur A17J2 Motherboardi<br />
Verify the Al6 Preregulator<br />
A15Wl (To<br />
A812 Post Regulator)<br />
Figure 5-5. Power Supply Cable Locations<br />
A8<br />
Post KegulatoI<br />
Verify that the Al5 preregulator is supplying the correct voltages to the A8 post<br />
regulator. Use a voltmeter with a small probe to measure the output voltages of<br />
A15Wl’s plug. Refer to lhble 5-2 and F’igure 5-6.<br />
17 If the voltages are not within tolerance, replace A15.<br />
Pewer Supply Troubleshooting 5-9
� If the voltages are within tolerance, Al5 is verified. Continue to “Check for a<br />
Faulty Assembly”.<br />
Pin<br />
1<br />
2<br />
394<br />
696<br />
7<br />
8<br />
0,lO<br />
11<br />
12<br />
A15WlPl (Dieeonnectea)<br />
vohgw<br />
N/C<br />
+126 to +loo<br />
+22.4to+33.6<br />
-22.4to-33.6<br />
N/C<br />
+9.4to +14<br />
-0.4 to -14<br />
N/C<br />
+32io+48<br />
‘able 5-2. Output Voltages<br />
A&J2 (connectea) Voltagee A15 Preregulatm Label<br />
+68to+72<br />
+68to+72<br />
+17.0 to +18.4<br />
-17.0 to -18.4<br />
+7.4 to +a.0<br />
+7.4io +a.0<br />
-6.7to -7.3<br />
+24.6to +28.6<br />
+24.6to +28.6<br />
N/C<br />
+7ov<br />
+18V<br />
-18V<br />
N/C<br />
+8V<br />
-8V<br />
N/C<br />
+26V<br />
IOTJZ: The + 6 VD supply must be loaded by one or more assemblies at alI times, or the other voltages will<br />
lot be correct. It connects to the motherboard connector A17J3 Pin 4.<br />
5-10 Power Supply Troubleshooting<br />
1
&T<br />
REGULATOR BOARD<br />
SOLDER s, DE ::I:I::: : A1532<br />
NOTE-<br />
I 1<br />
VOLTAGES ALL CABLES<br />
AND ASSEMBLIES<br />
CONNECTED<br />
Check for a Faulty Assembly<br />
Figure 5-6. A15Wl Plug Detail<br />
This procedure checks for a faulty assembly that might be shutting down the<br />
Al5 preregulator via one of the following lines (also refer to F’igure 5-l):<br />
� A15Wl connecting to the A8 post regulator<br />
� the + 5 VCPU line through the motherboard<br />
� the +5 VDIG line through the motherboard<br />
Do the following:<br />
1. Switch off the analyzer.<br />
2. Ensure that A15Wl is reconnected to A8. (Refer to Figure 5-5.)<br />
3. Remove or disconnect the assemblies listed in ‘lhble 5-3 one at a time<br />
and in the order shown. The assemblies are sorted from most to least<br />
accessible. Table 5-3 also lists any associated assemblies that are supplied<br />
sb6130d<br />
Puwer Supply Troubleshooting 5-11
y the assembly that is being removed. After each assembly is removed or<br />
disconnected switch on the analyzer and observe the red LED on A15.<br />
Note � Alwags switch ofl the analgzer before rewwwing or<br />
disconnecting assemblies.<br />
� When extensive disassembly is required, refer to Chapter 14,<br />
“Assembly Replacement and Post-Repair Procedures. n<br />
� Refer to Chapter 13, “Replaceable Parts,” to identify specific<br />
cables and assemblies that are not shown in this chapter.<br />
� If the red LED goes out, the particular assembly (or one receiving power from<br />
it) that allows it to go out is faulty.<br />
� If the red LED is still on after you have checked all of the assemblies listed in<br />
‘lhble 5-3, continue to “Check the Operating Temperature”.<br />
‘able 5-3. Recommended Order for RemovaUDisconnection<br />
Assembly Removal or Other Assemblies that Receive<br />
To Remove Disconne&ion Method Power from the Removed Assembly<br />
1. A19 Graphics Processor Remove from Card Cage None<br />
2. A14PracNDigital Remove from Card Cage None<br />
3. A9 CPU Disconnect W36 A20 Disk Drive<br />
(see “Cables, Rear” in<br />
Chapter 13)<br />
4. Al6 Rear Panel Interface<br />
5. A2 Front Panel Interface<br />
5-l 2 Power Supply Troubleshooting
Check the Operating Temperature<br />
The temperature sensing circuitry inside the Al5 preregulator may be shutting<br />
down the supply. Make sure the temperature of the open air operating<br />
environment does not exceed 55 OC (131 OF’), and that the analyzer fan is<br />
operating.<br />
� If the fan does not seem to be operating correctly, refer to “Pan<br />
Troubleshooting” at the end of this procedure.<br />
� If there does not appear to be a temperature problem, it is likely that Al5 is<br />
faulty.<br />
Inspect the Motherboard<br />
If the red LED is still on after replacement or repair of A15, switch off the<br />
analyzer and inspect the motherboard for solder bridges and other noticeable<br />
defects. Use an ohmmeter to check for shorts The +5 VD, +5 VCPU, or<br />
+5 VDSENSE lines may be bad. Refer to the block diagram (Figure 5-8) at the<br />
end of this chapter and troubleshoot these suspected power supply lines on the<br />
Al7 motherboard.<br />
Power Supply Troubleshooting 5-13
If the Green LEDs of the A8 are not all ON<br />
The green LEDs along the top edge of the A8 post regulator are normally on.<br />
Flashing LEDs on A8 indicate that the shutdown circuitry on the A8 post<br />
regulator is protecting power supplies from overcurrent conditions by<br />
repeatedly shutting them down. This may be caused by supply loading on A8 or<br />
on any other assembly in the analyzer.<br />
Remove A8, Maintain A15Wl Cable Connection<br />
1. Switch off the analyzer.<br />
2. Remove A8 from its motherboard connector, but keep the A15Wl cable<br />
connected to A8.<br />
3. Short A8TP2 (AGND) (see F’igure 5-3) to chassis ground with a clip lead.<br />
4. Switch on the analyzer and observe the green LEDs on A8.<br />
� If any green LEDs other than +5 VD are still off or flashing, continue to<br />
“Check the A8 Fuses and Voltages”.<br />
� If all LEDs are now on steadily except for the +5 VD LED, the Al5<br />
preregulator and A8 post regulator are working properly and the trouble<br />
is excessive loading somewhere after the motherboard connections at A8.<br />
Continue to “Remove the Assemblies”.<br />
Check the A8 Fuses and Voltages<br />
Check the fuses along the top edge of A8. If any A8 fuse has burned out,<br />
replace it. If it burns out again when power is applied to the analyzer, A8 or<br />
Al5 is faulty. Determine which assembly has failed as follows.<br />
1. Remove the A15Wl cable at AS. (See Figure 5-5.)<br />
2. Measure the voltages at A15WlPl (see F’igure 5-6) with a voltmeter having a<br />
small probe.<br />
3. Compare the measured voltages with those in Table 5-2.<br />
0 If the voltages are within tolerance, replace A8.<br />
� If the voltages are not within tolerance, replace A15.<br />
5-14 Power Supply Troubleshooting
If the green LEDs are now on, the Al5 preregulator and A8 post regulator are<br />
working properly and the trouble is excessive loading somewhere after the<br />
motherboard connections at A8. Continue to “Remove the Assemblies”.<br />
Remove the Assemblies<br />
1. Switch off the analyzer.<br />
2. Install A8. Remove the jumper from A8TP2 (AGND) to chassis ground.<br />
3. Remove or disconnect all the assemblies listed below. (See Figure 5-5.)<br />
Alwags suvitch ofl the anulgzer before removing or diswnnectircg an<br />
ass&lg.<br />
Al0 digital IF<br />
All phase lock<br />
Al2 reference<br />
Al3 fractional-N analog<br />
Al4 fractional-N digital<br />
A19 graphics processor<br />
4. Switch on the analyzer and observe the green LEDs on A8.<br />
� If any of the green LEDs are off or flashing, it is not likely that any of<br />
the assemblies listed above is causing the problem. Continue to “Briefly<br />
Disable the Shutdown Circuitry“.<br />
� If alI green LEDs are now on, one or more of the above assemblies may be<br />
faulty. Continue to next step.<br />
5. Switch off the analyzer.<br />
6. Reinstall each assembly one at a time. Switch on the analyzer after each<br />
assembly is instaIled. The assembly that causes the green LEDs to go off or<br />
flash could be faulty.<br />
Note It is possible, however, that this condition is caused by the<br />
A8 post regulator not supplying enough current. ‘Ib check<br />
this, reinstall the assemblies in a different order to change the<br />
loading. If the same assembly appears to be faulty, replace that<br />
assembly. If a different assembly appears faulty, A8 is most<br />
likely faulty (unless both of the other assemblies are faulty).<br />
Power Supply Troubleshooting 5-15
Briefly Disable the Shutdown Circuitry<br />
In this step, you shutdown the protective circuitry for a short time, and the<br />
supplies are forced on (including shorted supplies) with a 100% duty cycle.<br />
Caution Damage to components or to circuit traces may occur if A8TP4<br />
(SDIS) is shorted to chassis ground for more than a few seconds<br />
while supplies are shorted.<br />
1. Connect A8TP4 (SDIS) to chassis ground with a jumper wire.<br />
2. Switch on the analyzer and note the signal mnemonics and test points of any<br />
LEDs that are off. Immediately resow the jumper wire.<br />
3. Refer to the block diagram (Figure 5-8) at the end of this chapter and do the<br />
foIIowing:<br />
� Note the mnemonics of any additional signals that may connect to any A8<br />
test point that showed a fault in the previous step.<br />
� Cross reference alI assemblies that use the power supplies whose A8 LEDs<br />
went out when A8TP4 (SDIS) was connected to chassis ground.<br />
5-16 Power Supply Troubleshooting
� Make a list of these assemblies.<br />
� Delete the following assemblies from your list as they have already been<br />
verified earlier in this section.<br />
A10 digital IF<br />
All phase lock<br />
Al2 reference<br />
Al3 fractional-N analog<br />
Al4 fractional-N digital<br />
A19 graphics processor<br />
4. Switch off the analyzer.<br />
5. of those assemblies that are left on the list, remove or disconnect them<br />
from the analyzer one at a time. lbble 5-4 shows the best order in which to<br />
remove them, sorting them from most to least accessible. lhble 5-4 also lists<br />
any associated assemblies that are supplied by the assembly that is being<br />
removed. After each assembly is removed or disconnected, switch on the<br />
analyzer and observe the LEDs.<br />
Note<br />
w When extensive disassembly is required, refer to Chapter 14,<br />
“Assembly Replacement and Post-Repair Procedures. n<br />
H Refer to Chapter 13, “Replaceable Parts”, to identify specific<br />
cables and assemblies that are not shown in this chapter.<br />
� If all the LEDs light, the assembly (or one receiving power from it) that allows<br />
them to light is faulty.<br />
� If the LEDs are still not on steadily, continue to “Inspect the Motherboard”.<br />
Power Supply Troubleshooting 5-17
1. A3 Source<br />
‘able 5-4. Recommended Order for Removal/Disconnection<br />
Assembly<br />
To Remove<br />
2. A7 Pulse Generator<br />
3. A4 R Sampler<br />
4. A5 A Sampler<br />
6. A6 B Sampler<br />
6. A9 CPU<br />
7. A2 Front Panel Interface<br />
8. Al6 Rear Panel Interface<br />
Inspect the Motherboard<br />
Removal or OtherAssemblieathat Receive<br />
Disconnection Method Power from the Removed Assembly<br />
Remove from Card Cage None<br />
Remove from Card Cage None<br />
Remove from Card Cage None<br />
Remove from Card Cage None<br />
F&move from Card Cage None<br />
Disconnect W36 and W36 A20 Disk Drive<br />
Disconnect W17 Al Front Panel Keyboard<br />
Disconnect W27 A25 Test Set Interface<br />
A24 Transfer Switch<br />
AZ3 LED Front Panel<br />
Inspect the Al7 motherboard for solder bridges and shorted traces. In<br />
particuIar, inspect the traces that cany the supplies whose LEDs faulted when<br />
A8TP4 (SDIS) was grounded earlier.<br />
5-18 Power Supply Troubleshooting
Error Messages<br />
Three error messages are associated with the power supplies functional group.<br />
They are shown here.<br />
� POWER SUPPLY SHUT DOWN!<br />
One or more supplies on the A8 post regulator assembly is shut down due to<br />
one of the following conditions: overcurrent, overvoltage, or undervoltage.<br />
Refer to “If the Red LED of the Al5 Is ON” earlier in this procedure.<br />
� POWER SUPPLY HOT<br />
The temperature sensors on the A8 post regulator assembly detect an<br />
overtemperature condition. The regulated power supplies on A8 have been<br />
shut down.<br />
Check the temperature of the operating environment; it should not be greater<br />
than + 55 OC (131 OF). The fan should be operating and there should be at<br />
least 15 cm (6 in) spacing behind and all around the analyzer to allow for<br />
proper ventilation.<br />
� PROBE POWER SHUT DOWN !<br />
The front panel RF probe biasing supplies are shut down due to excessive<br />
current draw. These supplies are + 15 VPP and -12.6 VPP, both supplied by<br />
the A8 post regulator. + 15 VPP is derived from the + 15 V supply. -12.6 VPP<br />
is derived from the -12.6 V supply.<br />
Refer to Figure 5-7 and carefully measure the power supply voltages at the<br />
front panel RF probe connectors.<br />
Power Supply Troubleshooting 5-1 g
(C&K<br />
GROUND)<br />
SY -126”<br />
+15v<br />
Figure 5-7. Front Rmel Probe Power Connector Voltages<br />
� If the correct voltages are present, troubleshoot the probe.<br />
sg650e<br />
� If the voltages are not present, check the + 15 V and -12.6 V green LEDs on<br />
A8.<br />
� If the LEDs are on, there is an open between the A8 assembly and the<br />
front panel probe power connectors, Put A8 onto an extender board and<br />
measure the voltages at the following pins:<br />
ASP2 pins 6 and 36 -12.6 volts<br />
A8P2 pins 4 and 34 + 15 volts<br />
� If the LEDs are off, continue with “Check the Fuses and Isolate A8”.<br />
Check the Fuses and Isolate A8<br />
Check the fuses associated with each of these supplies near the A8 test points.<br />
If these fuses keep burning out, a short exists. Try isolating A8 by removing<br />
it from the motherboard connector, but keeping the cable A15Wl connected<br />
to A8J2. Connect a jumper wire from A8TP2 to chassis ground. If either the<br />
+ 15 V or -12.6 V fuse blows, or the associated green LEDs do not light, replace<br />
A8.<br />
5-20 Power Supply Troubleshooting
If the + 15 V and -12.6 V green LEDs light, troubleshoot for a short between<br />
the motherboard connector pins XA8P2 pins 6 and 36 (-12.6 V) and the front<br />
panel probe power connectors. Also check between motherboard connector pins<br />
XA8P2 pins 4 and 34 (+ 15 V) and the front panel probe power connectors.<br />
Power Supply Troubleshooting 5-21
Fan Troubleshooting<br />
Fan Speeds<br />
The fan speed varies depending upon temperature. It is normal for the fan to<br />
be at high speed when the analyzer is just switched on, and then change to low<br />
speed when the analyzer is cooled.<br />
Check the Ran Voltages<br />
If the fan is dead, refer to the A8 post regulator block diagram (F’igure 5-8) at<br />
the end of this chapter. The fan is driven by the + 18 V and -18 V supplies<br />
coming from the Al5 preregulator. Neither of these supplies is fused.<br />
The -18 V supply is regulated on A8 in the fan drive block, and remains<br />
constant at approximately -14 volts It connects to the Al7 motherboard via<br />
pin 32 of the A8Pl connector.<br />
The + 18 V supply is regulated on A8 but changes the voltage to the fan,<br />
depending on airflow and temperature information. Its voltage ranges from<br />
approximately - 1.0 volts to + 14.7 volts, and connects to the Al7 motherboard<br />
via pin 31 of the ASP1 connector.<br />
Measure the voltages of these supplies while using an extender board to allow<br />
access to the PC board connector, A8Pl.<br />
Short ASTP3 to Ground<br />
If there is no voltage at A8Pl pins 31 and 32, switch off the analyzer. Remove<br />
A8 from its motherboard connector (or extender board) but keep the cable<br />
A15Wl connected to A8. (See Figure 5-5.) Connect a jumper wire between<br />
A8TP3 and chassis ground. Switch on the analyzer.<br />
� If aII the green LEDs on the top edge of A8 Iight (except +5 VD), replace the<br />
fan.<br />
� If other green LEDs on A8 do not Iight, refer to “If the Green LEDs of the A8<br />
are not all ON” earlier in this procedure.<br />
5-22 Power Supply Troubleshootins
Intermittent Problems<br />
PRESET states that appear spontaneously (without pressing -I) typically<br />
signal a power supply or A9 CPU problem. Since the A9 CPU assembly is<br />
the easiest to substitute, do so. If the problem ceases, replace the A9. If the<br />
problem continues, replace the Al5 preregulator assembly.<br />
Power Supply Troubleshooting 5-23
Digital Control Troubleshooting<br />
Use this procedure only if you have read Chapter 4, “Start Troubleshooting<br />
Here. n<br />
The digital control group assemblies consist of the following:<br />
� CPU<br />
� A9<br />
� Display<br />
� A2, A18, A19, A27<br />
� Front Panel<br />
� Al, A2<br />
� Digital IF<br />
� A10<br />
� Rear Panel Interface<br />
� Al6<br />
Begin with “CPU Troubleshooting,” then proceed to the assembly that you<br />
suspect has a problem. If you suspect an <strong>HP</strong>-IB interface problem, refer to<br />
“<strong>HP</strong>-IB Failures,” at the end of this chapter.<br />
6<br />
Digital Control Troubleshooting 6-1
Digital Control Group Block Diagram<br />
6-2 Digital Control Troubleshooting<br />
Figure 6-1. Digital Control Group Block Diagram
Assembly Replacement Sequence<br />
The following steps show the sequence to replace an assembly in an <strong>HP</strong> <strong>8753E</strong><br />
network analyzer.<br />
1. Identify the faulty group. Refer to Chapter 4, “Start Troubleshooting Here.”<br />
Follow up with the appropriate troubleshooting chapter that identifies the<br />
faulty assembly.<br />
2. Order a replacement assembly. Refer to Chapter 13, “Replaceable Parts.”<br />
3. Replace the faulty assembly and determine what adjustments are necessary.<br />
Refer to Chapter 14, “Assembly Replacement and Post-Repair Procedures.”<br />
4. Perform the necessary adjustments. Refer to Chapter 3, “Adjustments and<br />
Correction Constants n<br />
5. Perform the necessary performance tests. Refer to Chapter 2, “System<br />
Verification and Performance Tests. n<br />
Digital Control Troubleshooting 6-3
CPU Troubleshooting (A9)<br />
A9 CC Switch Positions<br />
The A9 CC switch must be in the NORMAL position for these procedures. This<br />
is the position for normal operating conditions. To move the switch to the<br />
NORMAL position, do the following:<br />
1. Remove the power line cord from the analyzer.<br />
2. Set the analyzer on its side.<br />
3. Remove the two comer bumpers from the bottom of the instrument with a<br />
T-15 TORX screwdriver.<br />
4. Loosen the captive screw on the bottom cover’s back edge.<br />
5. Slide the cover toward the rear of the instrument.<br />
6. Move the switch to the NORMAL position as shown in Figure 6-2.<br />
7. Replace the bottom cover and power cord.<br />
64 Digital Control Troubleshooting
sga c8e<br />
A9 CPU Assembly<br />
Normal Mode Alter Mode Rocker Slide<br />
Figure 6-2. Switch Positions on the A9 CPU<br />
Checking A9 CPU Red LED Patterns<br />
The A9 CPU has five red LEDs that can be viewed through a small opening in<br />
the rear panel of the analyzer. (See Figure 6-3.) Four LEDs are easily viewable.<br />
The fifth LED must be viewed by looking to the left at an angle.<br />
1. Cycle the power while observing five red LEDs<br />
Cycle the power on the analyzer and observe the five red LEDs. After an<br />
initial pattern, the five red LEDs on the A9 CPU board should remain off.<br />
� If the LEDs remained off, then proceed to the assembly that you suspect<br />
has a problem.<br />
� If the LEDs did not remain off, switch off the power and remove the<br />
bottom cover for further troubleshooting.<br />
Digital Control Troubloshooting 6-5
LCPU LED<br />
WlNDOW<br />
Figure 6-3. CPU LED Window on Rear Panel<br />
2. Cycle the power while observing all eight red LEDs<br />
With the analyzer positioned bottom up, cycle the power and observe the<br />
eight red LEDs while looking from the front of the instrument.<br />
Note If Grmware did not load, a red LED on the CPU board will be<br />
flashing. Refer to “Loading Firmware” in Chapter 3.<br />
3. Evaluate results<br />
� If either of the following LED patterns remain, go to “Display<br />
Troubleshooting. n<br />
0 0 0 0 0 0 0 0<br />
� � � � � � � �<br />
(front of instrument 4)<br />
sg651e<br />
� If any other LED patterns remain, replace the A9 CPU after verifying the<br />
power supply.<br />
6-6 Digital Control Troubleshooting
Display Troubleshooting (A2, A18, A19, A27)<br />
This section contains the following information:<br />
� Evaluating your Display<br />
� Troubleshooting a White Display<br />
� Troubleshooting a Black Display<br />
w Troubleshooting a Display with Color Problems<br />
Evaluating your Display<br />
Switch the analyzer off, and then on. The display should be bright with the<br />
annotation legible and intelligible. There are four criteria against which your<br />
display is measured:<br />
� Background Lamp Intensity<br />
� Green, Red or Blue Stuck Pixels<br />
w Dark Stuck Pixels<br />
� Newtons ����<br />
Evaluate the display as follows:<br />
� If either the Al8 LCD, A19 GSP, A9 CPU or AZ7 backlight inverter assemblies<br />
are replaced, perform a visual inspection of the display.<br />
� If it appears that there is a problem with the display, refer to the<br />
troubleshooting information that follows<br />
� If the new display appears dim or doesn’t light, see “Backlight Intensity<br />
Check, n next.<br />
Digital Control Troubleshooting 6-7
Backlight Intensity Check<br />
Required Equipment and Ytbols<br />
Photometer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tektronix J16<br />
Probe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .‘Pektronix J6503<br />
Light Occluder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tektronix 016-0305-00<br />
Antistatic Wrist Strap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 9300-1367<br />
Antistatic Wrist Strap Cord . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <strong>HP</strong> P/N 9300-0980<br />
Static-control Table Mat and Earth Ground Wire . . . . . . . . . . . . <strong>HP</strong> P/N 9300-0797<br />
Analgm- warmup time: 30 minutes. Photomder warrn-up time: 30 minutes.<br />
Note This procedure should be performed with a photometer and only<br />
by qualified personnel.<br />
1. Press ~~)~~~~.~~~~~'.~~~~~~~~. ~~~~~~~Iloo]Lxl], to set the &play<br />
- . . . . . ~::::::. ..-.-..... -- -......-......-......... -- ..-. ..-- -- --.- -..<br />
intensity at 100%.<br />
,.,,,,,......,._. _ .,.,.,.,., _ __ . . . . . . . . . . . . / ,;.?.., . . . . . . . ..,, . . . _ . ,............,...,.........:....:::<br />
..;. ._ hy:.::*,7
Note<br />
H P <strong>8753E</strong><br />
NETWORK ANALYZER<br />
PHOTOMETER PHOTOMETER<br />
PROBE<br />
Figure 6-4. Backlight Intensity Check Setup<br />
The intensity levels are read with a display bezel installed.<br />
sg632e<br />
5. If the photometer registers less than 50 Nits, the display backlight lamp is<br />
bad. Refer to the “Replacement Procedures” chapter in the service manual<br />
for information on display lamp replacement.<br />
Red, Green, or Blue Pixels SpeciIlcations<br />
Red, green, or blue “stuck on” pixeis may appear against a black background.<br />
m ted for these dots, press w ~~~~~~~~~ .~~ 170) Ixl)<br />
:~~~~~~ ~~~~~,<br />
..,. ..,,.,...... ..,. - _- - ._.. -- -<br />
In a properly working display, the following will not occur:<br />
� complete rows or columns of stuck pixels<br />
� more than 5 stuck pixels (not to exceed a maximimi of 2 red or blue, and 3<br />
green)<br />
� 2 or more consecutive stuck pixels<br />
� stuck pixels less than 6.5 mm apart<br />
Digital Control Troubleshooting 6-g
Dark Pixels Specidications<br />
Dark “stuck on” pixels may appear against a white background. To test for<br />
these dots, press I?) ~~~~~~l~~~ :&‘J$ L66) @) ~~~~~~~<br />
::: ~.~.zsz -....... i_..-...:::::: . . .. . . . . . . . . . ..~...................-............. . . . . . . . .<br />
~~~~~~~~~~..~~~~~~~~~~~~~~~~~~..~.~~~~~~~~.<br />
~~~~~~~..<br />
: . ..A.. . . . . . . . . .<br />
In a properly working display, the following will not occur:<br />
� more than 12 stuck pixels (not to exceed a maximum of 7 red, green, or<br />
blue)<br />
� more than one occurrence of 2 consecutive stuck pixels<br />
� stuck pixels less than 6.5 mm apart<br />
Newton’s Rings<br />
To check for the patterns known as Newton’s Rings, change the display to white<br />
by pressing the following keys:<br />
Figure 6-5 ilhrstrates acceptable and non-acceptable examples of Newtons Rings<br />
6-10 Digital Control Troubleshooting
V<br />
4 Rings<br />
Unacceptable<br />
3 Rings<br />
Acceptable<br />
Figure 6-5. Newtons Rings<br />
sb8123d<br />
Digital Control Troubleshooting 6-11
Troubleshooting a White Display<br />
If the display is white, the A27 back light inverter is functioning properly.<br />
Connect a VGA monitor to the analyzer.<br />
� If the image on the external monitor is normal, then suspect A2, AM, or the<br />
front panel cabling.<br />
H If the image on the external monitor is bad, suspect the A19 GSP or cable<br />
W20 (CPU to motherboard).<br />
Troubleshooting a Black Display<br />
1. Remove the front panel with the exception of leaving cable W17 (A2 to<br />
motherboard) connected.<br />
2. Press 1Preset) while checking to see if there is a flash of light.<br />
� If the light does not flash, suspect the front panel cabling, the display lamp,<br />
or the A27 inverter.<br />
Troubleshooting a Display with Color Problems<br />
2. Run display service test 74 as described in Chapter 10. Confirm that there<br />
are four intensities for each color.<br />
� If the test passes, then continue.<br />
� If the test fails, then suspect the front panel cabling, A2, A19, or Al&<br />
3. Connect a VGA monitor to the analyzer.<br />
� If the image on the external monitor has the same color problems, then<br />
replace the A19 GSl?<br />
w If the image on the external monitor is acceptable, then there must be a<br />
missing color bit. Suspect the front panel cabling, A2, A19, or AM.<br />
6.12 Digital Control Troubleshooting
Front Panel Troubleshooting (Al, A2)<br />
Check Front Panel LEDs After Preset<br />
1. Press B on the analyzer.<br />
2. Observe that all front panel LEDs turn on and, within five seconds after<br />
releasing B, all but the CHl and Port 1 LED turns off. Refer to<br />
Figure 6-6.<br />
� If all the front panel LEDs either stay on or off, there is a control problem<br />
between A9 and Al/A2. See “Inspect Cables, n located later in this chapter.<br />
� If, at the end of the turn on sequence, the channel 1 LED is not on and all<br />
<strong>HP</strong>-IB status LEDs are not off, continue with “Identify the Stuck Key”.<br />
� If you suspect that one or more LEDs have burned out, replace the Al<br />
keypad assembly.<br />
Note Port 1 and port 2 LED problems may be caused by the<br />
malfunction of the A23 LED board or the A24 transfer switch.<br />
Figure 6-6. Preset Sequence<br />
Digital Control Troubleshooting 6-13
Identify the Stuck Key<br />
Match the LED pattern with the patterns in ‘Ihble 6-l. The LED pattern<br />
identifies the stuck key. Free the stuck key or replace the front panel part<br />
causing the problem.<br />
‘lhble 6-l. Front Panel Key Codes<br />
DeChWl LBD fattern % Front Rrnel Block<br />
Nnmber<br />
CEl CE2 R L T 6<br />
0<br />
1 .<br />
E<br />
2 . &<br />
Response<br />
Entry<br />
=m<br />
3 . . -Pm<br />
4 .<br />
EAx! BfXpOnSe<br />
5 . .<br />
0<br />
Entry<br />
6 . .<br />
0<br />
Entry<br />
7 . . . &f.f.;j:T~ Softicey<br />
8 . ;-.;g. MtJ=Y<br />
9 . .<br />
El<br />
Entry<br />
10 . . Lo/n) -try<br />
11 . . . m Active Channel<br />
12 . . Active Channel<br />
13 . . .<br />
14 . . .<br />
15 . . . .<br />
77<br />
b<br />
g&&#&f;<br />
Entry<br />
Entry<br />
softkey<br />
16 . @GJ StllllUlUS<br />
17 . . Instrument State<br />
18 . .<br />
@F Instrument State<br />
19 . . . && StllllUlUS<br />
20 . . Start StiIllUlW<br />
21 . . .<br />
@ii2<br />
Instrument State<br />
22. . . . Lsystem Instrument State<br />
23 . . . . $j?jR&$d softkey<br />
24 . . aesponse<br />
25 . . . Entry<br />
6-14 Digital Control Troubleshooting
Dedmal<br />
Number<br />
26<br />
27<br />
28<br />
29<br />
30<br />
31<br />
32<br />
33<br />
34<br />
35<br />
36<br />
37<br />
38<br />
39<br />
4G47<br />
48<br />
49<br />
50<br />
51<br />
62<br />
63<br />
64<br />
66<br />
‘able 6-1. Front Panel Key Codes (continued)<br />
CEl CE2<br />
LED Pattern<br />
R L T S<br />
s .<br />
.<br />
. .<br />
. .<br />
. . .<br />
. . .<br />
.<br />
. . . .<br />
.<br />
. . �<br />
� .<br />
.<br />
.<br />
.<br />
�<br />
.<br />
.<br />
� .<br />
.<br />
.<br />
.<br />
�<br />
.<br />
lot used<br />
� .<br />
. .<br />
. .<br />
.<br />
. .<br />
�<br />
. .<br />
� .<br />
. . .<br />
. . . .<br />
. . .<br />
�<br />
. . .<br />
� .<br />
Digital Control Troubleshooting 6-15
Inspect Cables<br />
Remove the front panel assembly and visually inspect the ribbon cable that<br />
connects the front panel to the motherboard. Also, inspect the interconnecting<br />
ribbon cable between Al and A2. Make sure the cables are properly connected.<br />
Replace any bad cables.<br />
Test Using a Controller<br />
If a controller is available, write a simple command to the analyzer. If the<br />
analyzer successfully executes the command, the problem is either the A2 front<br />
panel interface or W17 (A2 to motherboard ribbon cable) is faulty.<br />
6-16 Digital Control Troubleshooting
Run the Internal Diagnostic ‘lksts<br />
The analyzer incorporates 20 internal diagnostic tests. Most tests can be run as<br />
part of one or both major test sequences: alI internal (test 0) and preset (test 1).<br />
,. ,.z.;;;;,;.;~~ i ..: a.; .?, :: :*~:(;(;$,~, ;f; 51’:::” zgz,, . . . . _ _ .,. _ ,. / _<br />
1. Press @&J .$&&@J&#&#$@ Iaw @ Ixl) ~~~~~~: to perform a<br />
: . . . . . . . . . . ..$ .._._ .:: I .._. .L... .._............. - .._... ..-... -- -.<br />
INT tests.<br />
2. Then press (i-J Lxl) to see the results of the preset test. If either sequence<br />
fails, press the Q) @) keys to Gnd the tist occurrence of a FAIL message for<br />
tests 2 through 20. See ‘lhble 6-2 for further troubleshooting information.<br />
Digital Control Troubleshooting 6-17
0Allrnt<br />
1 Preset<br />
2IwM<br />
lkst<br />
3CMosRAM<br />
QMahlDRAM<br />
5 DSP WrlRd<br />
6DSPRAM<br />
7DSPALU<br />
8 DSP Intrpt<br />
9 DIP Control<br />
10 DIP Counter<br />
11 DSP Control<br />
12 Fr Pan Wr/Rd<br />
13 Rear Panel<br />
14 Post-reg<br />
15 FYac-N Cant<br />
16 Sweep !l’rig<br />
17ADcLin<br />
18ADcofs<br />
19 ABUS lbst<br />
20 PN count<br />
‘ICable 6-2. Internal Diagnostic ‘I&t with Commentary<br />
Seauence’ Probable Fniled AwembliPat --- I<br />
Comments and Troubleshooting Hints<br />
-: Executes tests 3-11,13-16,20.<br />
-: Executes tests 2-11, 14-16. Runs at power-on or preset.<br />
AOz Repeats on fail; refer to “CPU Troubleshooting (As)” in this chapter<br />
to replace ROM or A9.<br />
AOt Beplace A9.<br />
AOz Repeats on fail; replace A9.<br />
AOz Replace A9.<br />
AOI Replace A9.<br />
A& Replace A9.<br />
AO/AlO: Remove AlO, rerun test. If fail, replace A9. If paw, replace AlC<br />
AOiAlO: Most likely A0 assembly.<br />
AlO/AO/AlP: Check analog bus node 17 for 1 MHz. If correct, Al2 is<br />
verified; suspect AlO.<br />
AlO/& Most likely AlO.<br />
A2iAlIAg: Run test 23. lf fail, replace A2. If pass, problem is on bus<br />
between AS and A2 or on A9 assembly.<br />
AlB/AOz Disconnect A16, and check A9J2 pin 48 for 4 IdIiz clock signal.<br />
If OK, replace A16. If not, replace A9.<br />
AlS/A8/Destination assembly: See Chapter 6, ‘Power Supply<br />
Troubleshootiug.”<br />
A14: Replace A14.<br />
A14,AlOz Most likely A14.<br />
Al& Replace AlO.<br />
A10: Replace AlO.<br />
AlO: Replace AlO.<br />
*P- part of PRESET sequence; AI -part of ALL INTERNAL sequence.<br />
t in decreasiug order of probability.<br />
6-16 Digital ControlTroubleshooting<br />
A14lA13/A10: Most likely Al4 or A13, as previous tests check AlO. See<br />
1 Chapter 7, “Source Troubleshooting.”
If the Fault Is Intermittent<br />
Repeat Test Function<br />
If the failure is intermittent, do the following:<br />
.,.,.,.,.,.,.,.,.,.,. . . _ _ ‘....s ;~.,_..;;_ ..~.......,.,.,.,.,. ,....... .~, ., ,/ ,,,,, ,,,,,,, . . . (<br />
1. Press (s)<br />
.._........._...._~~.....~..-..........-..<br />
~~~~~,~~<br />
/-._ii ..--<br />
~~~~~~~~~~~~<br />
i _.._..........__ --:;;;::;A-...;;; _........................<br />
.m!&g.: @g<br />
- -..<br />
to turn on the<br />
repeat function.<br />
3. Select the test desired and press ~~~~~<br />
:..: . . .. ii . . . . . . . I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . .ii .... . . . . . . . . . . . . . ........ . . . . . . . . . . . . . ..x. . .<br />
4. Press any key to stop the function. The test repeat function is explained in<br />
Chapter 10, “<strong>Service</strong> Key Menus and Error Messages n<br />
<strong>HP</strong>-II3 Failures<br />
If you have performed “Step 3. Troubleshooting <strong>HP</strong>-B3 Systems” in Chapter 4,<br />
“Start Troubleshooting Here,” and you suspect there is an <strong>HP</strong>-IB problem in the<br />
analyzer, perform the following test. It checks the internal communication path<br />
between the A9 CPU and the Al6 rear panel. It does not check the <strong>HP</strong>-IB paths<br />
external to the instrument.<br />
., .... .............................. ........ .............. . .. .... ..... .::.:.:,,: .. ............ ::.::.::.::.~::<br />
hem m ~~~~~~~~,-<br />
_,i ,_,, i........................... i ..,.:........__ ....... .._ ....... j..........<br />
:;~~~<br />
........................_<br />
L13) Lxl] :~~~~~~~~.<br />
If the analyzer fails the test, the problem is likely to be the Al6 rear panel.<br />
� If the analyzer passes the test, it indicates that the A9 CPU can communicate<br />
with the Al6 rear panel with a 50% confidence level. There is a good chance<br />
that the Al6 rear panel is working. This is because internal bus lines have<br />
been tested between the A9 CPU and A16, and <strong>HP</strong>-IB signal paths are not<br />
checked external to the analyzer.<br />
Digital Control Troubleshooting 6-l 6
Source Troubleshooting<br />
Use this procedure only if you have read Chapter 4, “Start Troubleshooting<br />
Here.” This chapter is divided into two troubleshooting procedures for the<br />
following problems:<br />
w Incorrect power levels: Perform the “Power” troubleshooting checks.<br />
� Phase lock error: Perform the “Phase Lock Error” troubleshooting checks.<br />
The source group assemblies consist of the following:<br />
� A3 source<br />
� A4 sampler/mixer<br />
� A7 pulse generator<br />
w A11 phase lock<br />
w Al2 reference<br />
w Al3 fractional-N (analog)<br />
� Al4 fractional-N (digital)<br />
7<br />
Source Troubleshooting 7-l
Assembly Replacement Sequence<br />
The following steps show the sequence to replace an assembly in an <strong>HP</strong> <strong>8753E</strong><br />
network analyzer.<br />
1. Identify the faulty group. Refer to Chapter 4, “Start Troubleshooting Here. n<br />
Follow up with the appropriate troubleshooting chapter that identifies the<br />
faulty assembly.<br />
2. Order a replacement assembly. Refer to Chapter 13, “Replaceable Parts. n<br />
3. Replace the faulty assembly and determine what adjustments are necessary.<br />
Refer to Chapter 14, “Assembly Replacement and Post-Repair Procedures.”<br />
4. Perform the necessary adjustments. Refer to Chapter 3, “Adjustments and<br />
Correction Constants. n<br />
5. Perform the necessary performance tests Refer to Chapter 2, “System<br />
Verihcation and Performance Tests. n<br />
Before You Start Troubleshooting<br />
Make sure ail of the assemblies are llrmly seated. Also make sure that input R<br />
has a signal of at least -35 dBm (about 0.01 Vp-p into 50 ohms) at all times to<br />
maintain phase lock.<br />
7-2 Source Troubleshooting
Phase Lock Error<br />
sg652e<br />
GIGITIZING<br />
OX I LLOSCOPE<br />
H P <strong>8753E</strong><br />
NETWORK<br />
ANALYZER<br />
(USE WITH SPECTRUM ANALYZER)<br />
i<br />
EXT<br />
REF<br />
INPUT<br />
10 MHz<br />
OUT , i<br />
SPECTRUM<br />
ANALYZER<br />
I /<br />
I<br />
I I<br />
I<br />
/<br />
,<br />
I<br />
,<br />
I I<br />
I<br />
I I<br />
I<br />
I<br />
,<br />
\ A<br />
.------------ _ ------------~_-__________<br />
J<br />
Figure 7-1. Basic Phase Lock Error Troubleshooting Equipment Setup<br />
Troubleshooting tools include the assembly location diagram and phase lock<br />
diagnostic tools. The assembly location diagram is on the underside of the<br />
instrument top cover. The diagram shows major assembly locations and RF cable<br />
connections. The phase lock diagnostic tools are explained in the “Source Group<br />
Troubleshooting Appendix” and should be used to troubleshoot phase lock<br />
problems The equipment setup shown in Figure 7-l can be used throughout this<br />
chapter.<br />
Phase Lock Loop Error Message Check<br />
Phase lock error messages may appear as a result of incorrect pretune<br />
correction constants. To check this possibility, perform the pretune correction<br />
constants routine.<br />
The four phase lock error messages, listed below, are described in the “Source<br />
Group Troubleshooting Appendix” at the end of this chapter.<br />
� NO IFFOUND: CHECK R INPUT LEVEL<br />
� NO PHASE LOCK: CHECK R INPUT LEVEL<br />
� PHASE LOCK CAL FAILED<br />
74 Source Troubleshooting
H PHASE LOCK LOST<br />
1. Make sure the A9 CC switch is in the AIZER position:<br />
a. Remove the power line cord from the analyzer.<br />
b. Set the analyzer on its side.<br />
c. Remove the two corner bumpers from the bottom of the instrument with<br />
a T-15 TORX screwdriver.<br />
d. Loosen the captive screw on the bottom cover’s back edge.<br />
e. Slide the cover toward the rear of the instrument.<br />
f. Move the jumper to the AI.X position as shown in Figure 7-2.<br />
g. Replace the bottom cover, comer bumpers, and power cord.<br />
sgs1 me<br />
A9 CPU Assembly<br />
Normal Mode Alter Mode Rocker Slide<br />
Figure 7-2. Jumper Positions on the A9 CPU<br />
Source Troubleshooting 7-5
. . . . . . .<br />
2. ‘Jet& on the andyzer md press [s) :~~~~~~~~~; ;*?a$ (46) Ixl]<br />
. . . . . . . . . . . . . . . . . .<br />
.,........... ..,. .,<br />
_.........A.. -~~;~.............-/..........~.......... i............ ..__... u;...:.< I ..:.::: ._.:. . . . . . . . . . . . i,<br />
new analog bus correction constants. Then press<br />
L45) Lxl) ~~~~ to generate default<br />
pretune correction constants<br />
_ i .._... .: ,:..: _ _ _ . . _ _ ::. ...::--:.:.:.:. := . . . . x ; ..z.; . . . _..... . . . T ..../....: ..-.... __; ‘Q&f& -.... /._i&. L48) Lxl) ~~~:...~~. 1-i to<br />
generate new pretune correction constants.<br />
3. Press m and observe the analyzer display:<br />
a. No error message: restore the A9 CC jumper to the NRM position. Then<br />
refer to “Post-Repair Procedures” in Chapter 14 to verify operation.<br />
b. Error message visible: continue with “A4 Sampler/Mixer Check”.<br />
A4 Sampler/Mixer Check<br />
The A4, A5, and A6 (R, A and B) sampler/mixers are similar in operation. Any<br />
sampler can be used to phase lock the source. lb eliminate the possibility of a<br />
faulty R sampler, follow this procedure.<br />
1. Remove the W8 cable (Al 1Jl to A4) from the R-channel sampler (A4) and<br />
connect it to either the A-channel sampler (A5) or the B-channel sampler<br />
(A6). Refer to F’igure 7-3.<br />
7-6 Source Troubleshooting
All A12 Al3 Al4<br />
I I<br />
sg6116e<br />
Figure 7-3. Sampler/Mixer to Phase Lock Cable Connection Diagram<br />
2. If you connected W8 to:<br />
3. Ignore the displayed trace, but check for phase lock error messages. If the<br />
phase lock problem persists, the R-channel sampler is not the problem.<br />
Source Troubleshooting 7-7
A3 Source and A11 Phase Lock Check<br />
This procedure checks the source and part of the phase lock assembly. It opens<br />
the phase-locked loop and exercises the source by varying the source output<br />
frequency with the A11 pretune DAC.<br />
Note If the analyzer failed internal test 48, default pretune correction<br />
constants were stored which may result in a constant offset of<br />
several MHz. Regardless, continue with this procedure.<br />
Note Use a spectrum analyzer for problems above 100 MHz.<br />
1. Connect the oscilloscope or spectrum analyzer as shown in Figure 7-l. (Set<br />
the oscilloscope input impedance to 50 ohms)<br />
I<br />
2.<br />
mess (Preset, Lsyst~, ~~~~~~<br />
.<br />
~~~~~~~~~;<br />
. . . . _ ..,., ,.,. . . ..,..<br />
,,.<br />
~~~~~~~~~,<br />
,, _,,, ,.....,..... ..,,,,,, .,:...:.:.::.. i .._ __.................,.,.,.,.,.,.....i<br />
,.,.,...,.,.,.,,.,.,,j __;__~__~<br />
._.; .,.. .<br />
.-,.<br />
. . .._..<br />
i _<br />
__.<br />
._,,_ i _,__ i _ . . . . . . . . . . _____i _.. _ .,.; i . ..=.... _i . .._....... ./<br />
. . . . . . . . _ . . . . . . _<br />
~~~~~~~ ~~~~~~ to activate *e SoUTce tune (SRC ME)<br />
service mode.<br />
3. Use the front panel knob or front panel keys to set the pretune frequency<br />
to 300 kHz, 30 MHz, and 40 MHz. Verify the signal frequency on the<br />
0sciIioscope.<br />
Note In SRC TUNE mode, the source output frequency changes in<br />
1 to 2 MHz increments and should be 1 to 6 MHz above the<br />
indicated output frequency.<br />
4. Check for the frequencies indicated by Table 7-l.<br />
settins!<br />
‘Ikxble 7-1. Output Frequency in SEC Tune Mode<br />
Observed Frequency<br />
3ookHz 1.3 to 6.3 MHZ<br />
3oMHz<br />
4oMHz<br />
31to36MHz<br />
41to46lmz<br />
5. The signal observed on an osciRoscope should be as solid as the signal in<br />
Figure 7-4.<br />
7-g SourceTroubleshooting
6.<br />
-SO. MO n.oc O.OMOO met so.MO n.sc<br />
I I t<br />
ch. 1 � ���� � ��������� Off-t<br />
11- - 10.0 -miv Dmloy : ik5iizotYs<br />
Figure 7-4. Waveform Integrity in SRC Tune Mode<br />
sg607s<br />
The signal observed on the spectrum analyzer will appear jittery as in<br />
Figure 7-5 (B), not solid as in F’igure 7-5 (A). This is because in SRC TUNE<br />
mode the output is not phase locked.<br />
B<br />
sg609s<br />
Figure 7-5.<br />
Phase Locked Output Compared to Open Loop Output in SRC Tune Mode<br />
Source Troubleshooting 7-9
7- Press IMenu) ~~hkd# to vary the power and check for corresponding level<br />
changes on the test instrument. (A power change of 20 dl3 wilI change the<br />
voltage observed on the oscilIoscope by a factor of ten.)<br />
8. Note the results of the frequency and power changes:<br />
If the frequency and power output changes are correct, skip ahead to “Al2<br />
Reference Check” located in this chapter.<br />
If the frequency changes are not correct, continue with “YO Coil Drive<br />
Check with Analog Bus”.<br />
If the power output changes are not correct, check analog bus node 3.<br />
b. Press (Marker) @ Lc/n). The marker should read approximately 434 mu.<br />
c. Press (K) @ Lc/n). The marker should read approximately 646 mu.<br />
7-10 Sourcs Troubleshooting
YO Coil Drive Check with Oscilloscope<br />
Note Use the large extender board for easy access to the voltage<br />
points. The extender board is included with the <strong>HP</strong> 8753 lb01<br />
Kit. See Chapter 13, “Replaceable ParW, for part numbers and<br />
ordering information.<br />
1. Connect oscilloscope probes to AllPl-1 and AllPl-2. The YO coil drive<br />
signal is actually two signals whose voltage difference drives the coil.<br />
3. Monitor the two YO coil drive lines In source tune mode the voltage<br />
difference should vary from approximately 3.5 to 5.0 volts as shown in<br />
Figure 7-7.<br />
� If the voltages are not correct, replace the faulty All assembly.<br />
� If the output signa.ls from the All assembly are correct, replace the faulty<br />
A3 source assembly.<br />
� If neither the A11, nor the A3 assembly is faulty, continue with the next<br />
check.<br />
-300.000 Ins -150.000 IS 0.00000 s<br />
I<br />
z::: - 1.000<br />
1. GCG volte/div<br />
volts/div<br />
Offmet<br />
Offset<br />
-<br />
7.000<br />
7.000<br />
volts<br />
11-e - 30.0<br />
volts<br />
mddiv Oeloy - 0. OOMO s<br />
Figure 7-7.<br />
YO- and YO + Coil Drive Voltage Differences with SOURCE PIA OFF<br />
7-12 Source Troubleshooting<br />
sg606s
Al2 Reference Check<br />
The signals are evaluated with pass/fail checks. The most efficient way to check<br />
the Al2 frequency reference signals is to use the analog bus while referring to<br />
‘Pable 7-2.<br />
Alternatively, you can use an osciuoscope, while referring to ‘Ihble 7-3 and<br />
Figure 7-8 through F’igure 7-14. If any of the observed signals differs from<br />
the figures, there is a 90% probability that the Al2 assembly is faulty. Either<br />
consider the Al2 assembly defective or perform the “A12 Digital Control Signals<br />
Check”.<br />
Both of these procedures are described ahead.<br />
Analog Bus Method<br />
counter.<br />
2. Press L21) IXJ to count the frequency of the 100 kHz signal.<br />
3. Press 1Menu) ~~~~~~~ ::: :... ii ~........~...i__--.i . . . . 1500) . . m. Verify that the counter reading (displayed<br />
on the analyzer next to cnt :) matches the corresponding 100 kHz value for<br />
the CW frequency. (Refer to Table 7-2.)<br />
4. Verify the remaining CW frequencies, comparing the counter reading with<br />
the value in ‘Ihble 7-2:<br />
CW Fre4pency<br />
5ookIiz<br />
2Bm!&<br />
6OBmz<br />
able 7-2. Analog Bus Check of Reference Frequencies<br />
Analog BM Node 21 Analog BUE Node 24<br />
lOOkILt 2ndLO<br />
0.100 MHZ 0.504 MHZ<br />
0.100 MHZ 2.007 Jmz<br />
0.100 MHZ 0.996 MB2<br />
Analog Bus Node 25<br />
0.500 MHZ<br />
2.000 MHZ<br />
1.000 Bmz<br />
the frequencies listed in this table to within 3~0.1%. Accuracy may vary<br />
Source Troubleshooting 7-13
5. Press L24) Lxl] to count the frequency of the 2nd Lo signal.<br />
. . . . . .<br />
6- Press Ihnenu_) ~$ji!t~:~t~~~~ Lsoo] Ck/m. Verify that the counter reading matches<br />
the corresponding 2nd Lo value for the CW frequency. (Refer to ‘lhble 7-2.)<br />
7. Verify the remaining CW frequencies, comparing the counter reading with<br />
the value in Table 7-2:<br />
� Press ��☺ ������<br />
� Press �␇�☺ �������<br />
8. Press L25_) Lxl] to count the frequency of the PLREF signai.<br />
9. Press @J ~~~~~: L500) m. Verify that the counter reading matches<br />
the corresponding PLREF value for the CW frequency. (Refer to ‘Pable 7-2.)<br />
10. Verify the remaining CW frequencies, comparing the counter reading with<br />
the value in ‘lhble 7-2:<br />
� �������☺����☺<br />
� ������������☺�☺�<br />
11. Check the results.<br />
� If aII the counter readings match the frequencies listed in Table 7-2, skip<br />
ahead to “A13/A14 Fractional-N Check”.<br />
� If the counter readings are incorrect at the 500 kHz and 2 MHz settings<br />
only, go to ‘TN LO at Al2 Check”.<br />
� If aII the counter readings are incorrect at aII three CW frequencies, the<br />
counter may be faulty. Perform the “OsciIIoscope Method” check of the<br />
signals described below. (If the signais are good, either the A10 or Al4<br />
assemblies could be faulty.)<br />
7-14 Source Troubleshooting
Oscilloscope Method<br />
You need not use the oscilloscope method unless the analog bus is<br />
non-functional or any of the signals fail the specifications listed in mble 7-2.<br />
If the analog bus is non-functional or the previous check has revealed<br />
questionable signals, observe the signal(s) with an oscilloscope. ‘Pdble 7-3<br />
identifies a convenient test point and a plot for the five signals listed.<br />
able 7-3. Al2 Reference Frequencies<br />
Mnemonic Signal LOCdi0n<br />
Description<br />
FN1OOkIiZREF 100 kH2 Reference AlSTPb<br />
RF2 Phase Lock AllTP9<br />
Reference<br />
REP Phase Lock AllTP9<br />
Reference<br />
mm* Fractional-N Lo A14J2<br />
4MHzREF 4 MHZ Reference Al2TP9<br />
2ND Lo+/- Second Lo AEPl-2,4<br />
2ND Lo+/- Second M Al2Pl-2,4<br />
Not an Al2 signal, but required for Al2 lowband operation.<br />
see <strong>Analyzer</strong><br />
Fh3=e htting<br />
Figure 7-8 any<br />
Figure 7-9 216MHzCW<br />
Plgure 7-10 6MHzCW<br />
F?gure 7-11 1oMHzcw<br />
F?gure 7-12 any<br />
F?gure 7-1s >lSMHzCW<br />
pisure 7-14 14MHzcw<br />
Source Troubleshooting 7-15
100kHzPulses<br />
The 100 kHz pulses are very narrow and typically 1.5 V in amplitude. You may<br />
have to increase the oscilloscope intensity to see these pulses. (See Figure 7-8.)<br />
-100.000 us 0.00000 L 100.000 “*<br />
sg6i OS<br />
Figure 7-8. Sharp 100 kHz Pulses at A13TP5 (any frequency)<br />
7-16 Source Troubleshooting
PLREF Waveforms<br />
REF Signal At AllTP9. REF is the buffered PLREF+ signal. The 1st IF is<br />
phase locked to this signal. Use an oscilloscope to observe the signal at the<br />
frequencies noted in Figure 7-9 and Figure 7-10.<br />
High Band RJW Signal. In high band the REF signal is a constant 1 MHz square<br />
wave as indicated by Figure 7-9.<br />
-1.00000 us 0.00000 5 1.00000 us<br />
ch.1 - SOD.0 auoltm/div off& - o.wo VOIU<br />
Timsboso - 200 ns/drv DdCby - 0.00000 s<br />
Figure 7-9. High Band REF Signal (216 MHz CW)<br />
sg611 s<br />
Source Troubleshooting 7-17
Low Band REF Signal. In low band this signal follows the frequency of the RF<br />
output signal. Figure 7-10 illustrates a 5 MHz CW signal.<br />
Figure 7-10. REF Signal at AllTP9 (5 MHz CW)<br />
� If REF looks good, skip ahead to “4 MHz Reference Signal”.<br />
� If REF is bad in low band, continue with TN Lo at Al2 Check”.<br />
7-18 Source Troubleshooting<br />
sg612s
FN LO at Al2 Check<br />
1. Use an oscilloscope to observe the FN Lo from.&14 at the cable<br />
end of A14J2. Press (jj) (SystemJ . . ~~~~~,~~~~.. . . . . . . . . . . . . i . . . : . . . . . . . . . .i . . .. . . . . . ~,............../..~..... . .<br />
. . -.::: .:.
4 MHz Reference Signal<br />
This reference signal is used to control the receiver. If faulty, this signal can<br />
cause apparent source problems because the CPU uses receiver data to control<br />
the source. At A12TP9 it should appear similar to Figure 7-12.<br />
-5oo.oon rleec 500.000 l-was<br />
ch. 1 - 1.000 volts/dav Offset - o.ooo volts<br />
11rboro = 100 nsec/div OPlDy - o.oocoo *PC<br />
Figure 7-12. 4 MHz Reference Signal at A12TP!3 (Preset)<br />
7-20 Source Troubleshooting<br />
sg614s
2ND LO Waveforms<br />
The 2nd LO signals appear different in phase and shape at different frequencies.<br />
90 Degree Phase Offset of 2nd LO Signals in High Band. In high band, the<br />
2nd Lo is 996 kHz. As indicated by Figure 7-13, the 2nd Lo actually consists of<br />
two signals 90 degrees out of phase.<br />
-1.00000 “.OO 0.00000 mc<br />
sg615s<br />
Figure 7-13.<br />
90 Degree Phase Offset of High Band 2nd LO Signals (216 MHZ CW)<br />
In-Phase 2nd LO Signals in Low Band. The 2nd Lo signals in low band, as<br />
shown in Figure 7-14, are not phase shifted. In low band these signals track the<br />
RF output with a 4 kHz offset.<br />
SourceTroubleshooting 7-21
-1M.000 - O.MMO .mc lLlo.om “UC<br />
I I I t I I<br />
I I I I I I I<br />
- 200.0 mvoltm/dlv<br />
- ROD0 voltm<br />
Ek=: - $O&O~ve~~;d’v<br />
Tmobamo -<br />
m:<br />
oehy<br />
: gL:h:<br />
Figure 7-14. In-Phase Low Band 2nd LO Signals SSgnals (14 MHZ CW)<br />
sg616s<br />
If any of the signals of Table 7-2 are incorrect, the probability is 90% that the<br />
Al2 assembly is faulty. Either consider the Al2 assembly faulty or perform the<br />
“Al2 Digital Control Signals Check” described ahead.<br />
7-22 Source Troubleshooting
Al2 Digital Control Signals Check<br />
Several digital control signals must be functional for the Al2 assembly<br />
to operate properly. Check the control lines listed in ‘I%ble 7-4 with the<br />
oscilloscope in the high input impedance setting.<br />
Mnemonic<br />
LENREF<br />
LHB<br />
LLB<br />
‘Ihble 7-4. Ala-Related Digital Control Signals<br />
Signtll<br />
Description<br />
L-Reference Enable<br />
L-Hi& Band<br />
L-Low Band<br />
Loc8tion<br />
Al2P2-6<br />
Al2P2-32<br />
Al2Pl-23<br />
see <strong>Analyzer</strong><br />
FIBrve -ttinB<br />
Figure 7-15 Preset<br />
Figlm 7-16 Preset<br />
Finure 7-16 Preset<br />
L ENREF Line. This is a TI’L signal. lb observe it, trigger on the negative edge.<br />
In preset state, the signal should show activity similar to Figure 7-15.<br />
ch.2 - Fg>z;d’v offwt<br />
Tim,bwm - .<br />
sg617s<br />
Figure 7-15. L ENREF Line at A12P2-16 (Preset)<br />
Source Troubleshooting 7-23
L HB and L LB Lines. These complementary signals toggle when the instrument<br />
switches from low band to high band as illustrated by Figure 7-16.<br />
sg618s<br />
Figure 7-16. Complementary L J3.B and L LB Signals (Preset)<br />
If all of the digital signals appeared good, the Al2 assembly is faulty<br />
A13/A14 Fractional-N Check<br />
Use the analog bus or an oscilloscope to check the Al4 VCO’s ability to sweep<br />
from 30 MHz to 60 MHz. The faster analog bus method should suffice unless<br />
problems are detected.<br />
Fractional-N Check with Analog Bus<br />
. . . . . . . . . . .,. .,.,...,.......,.,.. :,. ,. ,. ..-.- /,.,.,._ ;; _. .._............................ - .._ -__ _ _ .,.~.....~.,..... _ _ i . . . . . . . . . . . . . . . . . . . . . ../~_....... . . . . . . . . . . . .<br />
;&&&+z& -~,~,~~~~~~~ _ _ ~~~~<br />
. . . . . . . . . . . . . / . . _ . . .;,..<br />
to sMtch on the andog bus md the<br />
.i<br />
..:... :
‘Jhble 7-5. VC0 Range Check Frequencies<br />
Imtmment Setting Counter Qeadng 1<br />
31Bmz 30f0.030 MHZ<br />
6o.oooooo MHZ 60*0.060 MHZ<br />
4. Check the counter reading at the frequencies indicated.<br />
� If the readings are within the limits specified, the probability is greater<br />
than 90% that the fractional-N assemblies are functional. Either skip<br />
ahead to the “A7 PuIse Generator Check” or perform the more conclusive<br />
“Al4 VCO Range Check with Oscilloscope” described below.<br />
� If the readings fail the specified limits, perform the “Al4 VCO Exercise”.<br />
Al4 VCO Range Check with Oscilloscope<br />
1. Remove the W9 HI OUT cable (A14Jl to A7) from the A7 assembly and<br />
connect it to an oscilloscope set for 50 ohm input impedance. Switch on the<br />
analyzer.<br />
Menus and Error Messages”, for more information-on the F’RACN TUNE<br />
mode.<br />
3. Vary the fractional-N VCO frequency with the front panel knob and check<br />
the signal with the oscilloscope. The waveform should resemble F’igure 7-17,<br />
Figure 7-18, and F’igure 7-19.<br />
If the fractional-N output signals are correct, continue source troubleshooting<br />
by skipping ahead to “A7 Pulse Generator Check”.<br />
Source Troubleshooting 7-25
Ch. 2 - 100.0 mvolta/div Offrt - a000 VO~+E<br />
T~mebase - 10.0 nsec/div Delay - 0.00000 set<br />
Figure 7-17. 10 MHZ HI OUT Wiweform from A14Jl<br />
Ch. 2 - 100.0 mvol+a/div<br />
T~nsba - 10.0 nmec/div<br />
7-26 Source Troubleshooting<br />
Figure 7-18. 25 MHz El OUT Wiweform from A14Jl<br />
sgdi 9s<br />
sg62Os
-50.000 n-w 0.00000 eec SO.000 “.OC<br />
I I I I I I I<br />
ch.2 - lm.0 wolt=/div 0ffwt - aM0 Volta<br />
Tirmbo8a - 10.0 nmos/div -ioy = aoomo .PC<br />
Al4 VCO Exercise<br />
Figure 7-19. 60 MHz HI OUT Waveform from A14Jl<br />
sg621 s<br />
The nominal tuning voltage range of the VCO is + 10 to -5 volts When the<br />
analyzer is in operation, this voltage is supplied by the Al3 assembly. This<br />
procedure substitutes a power supply for the Al3 assembly to check the<br />
frequency range of the Al4 VCO.<br />
1. Switch off the analyzer and remove the Al3 assembly.<br />
2. Put the Al4 assembly on an extender board and switch on the instrument.<br />
3. Prepare to monitor the VCO frequency, either by:<br />
a. Activating the analog bus and setting the internal counter to the FRACN<br />
node, or<br />
b. Connecting an oscilloscope to A14J2 (labeled LO OUT) and looking for<br />
waveforms similar to Figure 7-20.<br />
Source Troubleshooting 7-27
-50.000 - 0.00000 *es 50.000 “se.2<br />
I-* II - ,nn n -..^>~~,.4*., nrr--r - 0. MO vo<br />
Figure 7-20. LO OUT Waveform at A14J2<br />
4. Vary the voltage at A14TP14 from + 10 to -5 volts either by:<br />
a. Connecting an appropriate external power supply to A14TP14, or<br />
sg613s<br />
b. First jumping the + 15 V internal power supply from A8TP8 to A14TP14<br />
and then jumping the -5.2 V supply from ASTPlO to A14TP14.<br />
5. Conhrm that the VCO frequency changes from approximately 30 MHz or less<br />
to 60 MHz or more.<br />
6. If this procedure produces unexpected results, the Al4 assembly is faulty.<br />
7. If this procedure produces the expected results, continue with the “Al4<br />
Divide-by-N Circuit Check”.<br />
7-28 Source Troubleshooting
Al4 Divide-by-N Circuit Check<br />
Note The Al3 assembly should still be out of the instrument and the<br />
Al4 assembly on an extender board.<br />
1. Ground A14TP14 and confirm (as in the Al4 VCO Exercise) that the VCO<br />
oscillates at approximately 50 to 55 MHz.<br />
2. Put the analyzer in CW mode (to avoid relock transitions) and activate the<br />
F’RACN TUNE service mode.<br />
3. Connect an oscilloscope to A14J3 and observe the output.<br />
4. With the F’RACN TUNE service feature, vary the frequency from 30 MHz to<br />
60.8 MHz.<br />
5. The period of the observed signal should vary from 5.5 ps to 11 p.s.<br />
� If this procedure produces unexpected results, the Al4 assembly is faulty.<br />
� If this procedure produces the expected results, perform the “A14-to-Al3<br />
Digital Control Signals Check. n.<br />
6. Remember to replace the Al3 assembly.<br />
A14-to-Al3 Digital Control Signals Check.<br />
The Al4 assembly generates a ‘ITL cycle start (CST) signal every 10<br />
microseconds. If the VCO is oscillating and the CST signal is not detectable at<br />
A14TP3, the Al4 assembly is non-functional.<br />
Use the CST signal as an external trigger for the oscilloscope and monitor the<br />
signals in ‘Ihble 7-6. Since these ‘ITL signals are generated by Al4 to control<br />
A13, check them at Al3 6rst. Place Al3 on the large extender board. The<br />
signals should look similar to Pigure 7-21. If these signals are good, the Al3<br />
assembly is defective.<br />
Source Troubleshooting 7-28
‘lhble 7-6. A14-to-Al3 Digital Control Signal Locations<br />
05T<br />
L FNHOLD<br />
FNBIA6<br />
APU<br />
API2<br />
API3<br />
API4<br />
API6<br />
7-30 Source Troubleshooting<br />
Al3 Location<br />
none<br />
P2-2<br />
P2-6<br />
Al4 Location<br />
TP3<br />
P2-2<br />
P2-6<br />
P2-32 P2-32<br />
P2-3 P2-3<br />
P2-34 P2-34<br />
P2-4 P2-4<br />
P2-36 P2-36<br />
Pl-23 Pl-63<br />
* LFNHOLO<br />
API14<br />
FN LATCH<br />
sg622s<br />
Figure 7-21. Al4 Generated Digital Control Signals
H MB Line. This signal is active during the 16 MHz to 31 MHz sweep. The<br />
upper trace of F’igure 7-22 shows relative inactivity of this signal during preset<br />
condition. The lower trace shows its status during a 16 MHz to 31 MHz sweep<br />
with inactivity during retrace only.<br />
-1.00000 set 0.00000 *PC 1.00000 (105<br />
sg623s<br />
Figure 7-22.<br />
H MB Signal at A14Pl-5 (Preset and 16 MHZ to 31 MHz Sweep)<br />
Source Troubleshooting 731
A7 Pulse Generator Check<br />
The pulse generator affects phase lock in high band only. It can be checked with<br />
either a spectrum analyzer or an oscilloscope.<br />
A7 Pube Generator Check with Spectrum <strong>Analyzer</strong><br />
1. Remove the A7-to-A6 SMB cable (W7) from the A7 pulse generator assembly.<br />
Set the analyzer to generate a 16 MHz CW signal. Connect the spectrum<br />
analyzer to the A7 output connector and observe the signal. The A7 comb<br />
should resemble the spectral display in Figure 7-23.<br />
Figure 7-23. Pulse Generator Output<br />
sg624s<br />
2. If the analyzer malfunction relates to a particular frequency or range, look<br />
more closely at the comb tooth there. Adjust the spectrum analyzer span<br />
and bandwidth as required. Even at 3 GHz, the comb should look as clean<br />
as Figure 7-24. For Option 006 instruments at 6 GHz, the comb tooth level<br />
should be approximately -46 dBm.<br />
732 Source Troubleshooting
I I I I I I I<br />
CENTER 2.989 88 GClL *PAN ?. .ea wiz<br />
mas ml 36 *uz VW 363 *cIx OYP 28.8 un.5<br />
sg625s<br />
Figure 7-24. High Quality Comb lboth at 3 GHz<br />
3. If the signaI at the A7 output is good, check the A7-to-A4 cable.<br />
4. If the signal is not as clean as F’igure 7-24, observe the HI OUT input signal to<br />
the A7 assembly.<br />
. . . . . . . . . :E .;y: ( .,<br />
~~~~~~~~~~.<br />
::: .... . . . z.2 . :.... z :...... 2: . . . ~.;..:....~.i . .,:si . . i.;,.~......_~......i . . .<br />
&he&e do not readjust the instrument. Remove the<br />
A14-to-A7 SMB cable (WQ) from the A7 pulse generator assembly<br />
(CW B 16 MHz).<br />
b. Set the spectrum analyzer to a center frequency of 45 MHz and a span<br />
of 30 MHz. Connect it to the A14-to-A7 cable still attached to the Al4<br />
assembly. Narrow the span and bandwidth to observe the signal closely.<br />
5. If the HI OUT signal is as clean as Figure 7-25, the A7 assembly is faulty.<br />
Otherwise, check the A14-to-A7 cable or recheck the A13/A14 fractional-N as<br />
described ahead.<br />
Rechecking the A13/A14 Fractional-N<br />
Some phase lock problems may result from phase noise problems in the<br />
fractional-N loop. lb troubleshoot this unusual failure mode, do the following:<br />
1. Set the network analyzer at 60 MHz in the FRACN TUNE mode.<br />
Source Troubleshooting 7-33
2. Use a spectrum analyzer, to examin e the HI OUT signal from the Al4<br />
assembly. The signal should appear as clean as Figure 7-25. The comb shape<br />
may vary from pulse generator to pulse generator.<br />
sg626s<br />
Figure 7-25. Stable HI OUT Signal in FRACN TUNE Mode<br />
A7 Pulse Generator Check with Oscilloscope<br />
Perform this check if a spectrum analyzer is not available.<br />
1. Remove the A4to-All SMB cable from the A4 (R) sampler/mixer output.<br />
Connect the oscilloscope to the A4 output (1st IF).<br />
2. Activate the FRACN TUNE .._.................................. service mode ,.,, _ _ ..; . ..,., . . . ..,.,... . _ . . . . and . . _. _ ;... _,. t.~e,,ne.~~~~ion~~,~ _ . . . i_ _ __.....i . . .,. _ t@-,<br />
50 MHz. press Is-] ~~~~~~~~ ~~~~~~~~~~ ~~~:~,~~~~.~~~~ [sol<br />
m-<br />
3. Activate the SRC TUNE service mode of the analyzer and tune the source to<br />
,:: 7 .i .:z: .~~;.;~~~~;.~~~;~;;;~~; ii<br />
50 M&. press ~~~~.~.~~~~~<br />
i . .. . . . _._ . _ . _ . _ . . . . . . __ .<br />
~~~~~~~<br />
_ . __ . ____ . . _ .,.,.,.,. . i _ . _ . ,.,. _.,._.,_.~.._<br />
. . .<br />
L50)<br />
. . .<br />
Irln_llE).<br />
. . . . . . . . . . . . . . . . . . . . . .<br />
4. Set the SRC TUNE frequency to those listed in Table 7-7 and observe the 1st<br />
Il? waveforms. They should appear similar to F’igure 7-26.<br />
� If the signals observed are proper, continue with “All Phase Lock Check”.<br />
~3 If the signals observed are questionable, use a spectrum analyzer to<br />
perform the preceding “A7 Pulse Generator Check with Spectrum<br />
<strong>Analyzer</strong>”.<br />
7-34 Source Troubleshooting
‘Ihble 7-7. 1st IF Waveform Settings<br />
I SRCTUNE I PBACN I HZUIUOlIiC I<br />
1stlF I<br />
6obfHz 6oMHz 1 ltO6MHZ<br />
26oMHz 6oMHz 6 lto6MHz<br />
266OBfHz 6oMHz 51 lto6MHZ<br />
-,.00040 “0 0.04400 E 1.00400 us<br />
I I t I I I I<br />
Ch. 1 - 15 -00 avol+s/div Offset - 0.000 volts<br />
T,nebnsa - 200 ns/drv Delay - 0.04400 c<br />
Ch. I Pormetoro Froq. - 4. 21293 WL<br />
sg627s<br />
Figure 7-26. Typical 1st IF WAveform in FRACN lTJNE/SRC TUNE Mode<br />
All Phase Lock Check<br />
At this point, the All phase lock assembly appears to be faulty (its inputs<br />
should have been verified already). Nevertheless, you may elect to use the<br />
phase lock diagnostic routines or check the relevant signals at the assembly<br />
itself for confirmation.<br />
Note If external source mode is the only operating mode with phase<br />
lock problems, replace the A11 phase lock assembly.<br />
Source Troubleshooting 735
Phase Lock Check with PLL DIAG<br />
Refer to “Phase Lock Diagnostic Tools” in “Source Group Troubleshooting<br />
Appendix” at the end of this chapter for an explanation of the error messages<br />
and the diagnostic routines. Follow the steps there to determine in which state<br />
the phase lock is lost.<br />
� If NO IF FOUND is displayed, con&m that the analog bus is functional and<br />
perform the “Source Pretune Correction Constants (Test 48)” as outlined in<br />
Chapter 3, “Adjustments and Correction Constants.”<br />
� If phase lock is lost in the ACQUIRE state, the A11 assembly is faulty<br />
� If phase lock is lost in the TRACK state, troubleshoot source phase lock loop<br />
components other than the A11 assembly.<br />
Phase Lock Check by Signal Examination<br />
lb con&m that the A11 assembly is receiving the signals required for its proper<br />
operation, perform the following steps.<br />
1. Place the A11 assembly on the large extender board.<br />
2. Switch on the analyzer and press Ipreset).<br />
3. Check for the signals listed in ‘Ihble 7-8.<br />
Mnemonic II0 Accesa<br />
‘Ihble 7-8. All Input Signals<br />
FE=<br />
Notes<br />
FMCOIL- 0 AllPl-S,SS Figure7-27 AidsYOcoILinaettingYIG.PreasLPreset)LMenu)<br />
,._._ i .,., .__<br />
~~~~~~. @ @-J to *serve this s.I.<br />
REP I AllTPD FIgwe 7-0, Observe both low band and high band CW frequencies.<br />
Figure 7-10<br />
YOcoIL+ 0 AllPl-2,S2 pjgure 7-7 uw .~~~~~.<br />
._....... - _.............. I- .._... .._._.<br />
YOCOIL- 0 AllPl-1,Sl F-lgure 7-7<br />
WrIF I AllPLIFIN F’igure 7-26 Check for 1 MHz with tee a All jack (not at cable end) ir<br />
high band.<br />
7-36 Source Troubleshooting
ti<br />
. I . L.<br />
I<br />
I<br />
I I t ’ II<br />
I<br />
0.00000 3<br />
m. I - 2.000 volfa/div Offs*+ - 0.000 volto<br />
Tirobosn - ��� � s/div 0010y - 0.00000 s<br />
Figure 7-27. FM Coil - Plot with 3 Point Sweep<br />
I<br />
sg628s<br />
4. If any of the input signal is not proper, refer to the overall block diagram in<br />
Chapter 4, “Start Troubleshooting Here,” as an aid to trouble shooting the<br />
problem to its source.<br />
5. If any of the output signals is not proper, the A11 assembly is faulty.<br />
Source Troubleshooting 7-37
Source Group Troubleshooting Appendix<br />
Troubleshooting Source Problems with the Analog Bus<br />
The analog bus can perform a variety of fast checks, However, it too is subject<br />
to failure and thus should be tested prior to use. You should have done this in<br />
Chapter 4, “Start Troubleshooting Here. n<br />
lb use the analog bus to check anv one of the nodes. : Dress e . . . . . . I<br />
i<br />
I<br />
~~~~~~~ .~~~~~~~~~~~. men press m ~~~~~~~~~~~;~:~~~.<br />
.,.<br />
..-.....................-.... ::::: ..::::.: - .::::::, - .._....__... . . . . . . . .::::..;: . . -. . . . L;.,:.;.:.;.:.:.;.: .,,. >,:L. .,.,, .L’.._ :. .._ :.: . . . ..__ . . _ . . . . . . . . . . . . . . . . . . . .._....... . . . . . . . . . . . . .<br />
and enter the analog bus node number followed by Lxl]. Refer to “Analog<br />
Bus” in Chapter 10, “<strong>Service</strong> Key Menus and Error Messages”, for additional<br />
information.<br />
Phase Lock Diagnostic Tools<br />
� error messages<br />
� diagnostic routines<br />
Phase Lock Error Messages<br />
All phase lock error messages can result from improper front panel connections.<br />
NO IF FOUND : CHECK R INPUT LEVEL means no IF was detected during pretune:<br />
a source problem. Perform the “A4 Sampler/Mixer Check”.<br />
NO PHASE LOCK : CHECK R INPUT LEVEL means the IF was not acquired after<br />
pretune: a source problem. Perform the “A4 Sampler/Mixer Check”, earlier in<br />
this chapter.<br />
PHASE LOCK CAL FAILED means that a calculation of prettme values was not<br />
successful: a source or receiver failure. Perform the “Source Prettme Correction<br />
Constants” routine as outlined in Chapter 3, “Adjustments and Correction<br />
Constants” If the analyzer fails that routine, perform the “A4 Sampler/Mixer<br />
Check”.<br />
PHASE LOCK LOST means that phase lock was lost or interrupted before the band<br />
sweep ended: a source problem. Refer to “Phase Lock Diagnostic Routines”<br />
next to access the phase lock loop diagnostic service routine. Then troubleshoot<br />
the problem by following the procedures in this chapter.<br />
7-38 Source Troubleshooting
Phase Lock Diagnostic Routines<br />
Perform the following steps to determine at what frequencies and bands the<br />
phase lock problem occurs<br />
_.,,. . . . . . . . ,,,...... : ..::.: .:;: ::. ::: / . ...::::. . . . . . . . . . . . . . . . :,:s’::::,:,:,:,:, ..,.,., .:...
Receiver Troubleshooting<br />
Use this procedure only if you have read Chapter 4, “Start Troubleshooting<br />
Here. n Follow the procedures in the order given, unless instructed otherwise.<br />
The receiver group assemblies consist of the following:<br />
w A4/5/6 sampler/mixer assemblies<br />
� A10 digital IF assembly<br />
8<br />
Receiver Troubleshooting 8-1
Assembly Replacement Sequence<br />
The following steps show the sequence to replace an assembly in an <strong>HP</strong> <strong>8753E</strong><br />
network analyzer.<br />
1. Identify the faulty group. Refer to Chapter 4, “Start Troubleshooting Here.”<br />
Follow up with the appropriate troubleshooting chapter that identifies the<br />
faulty assembly.<br />
2. Order a replacement assembly. Refer to Chapter 13, “Replaceable Parts.”<br />
3. Replace the faulty assembly and determine what adjustments are necessary.<br />
Refer to Chapter 14, “Assembly Replacement and Post-Repair Procedures. n<br />
4. Perform the necessary adjustments. Refer to Chapter 3, “Adjustments and<br />
Correction Constants. n<br />
5. Perform the necessary performance tests. Refer to Chapter 2, “System<br />
Verification and Performance Tests n<br />
8-2 Receiver Troubleshooting
Receiver Failure Error Messages<br />
The error messages which indicate receiver group problems may be caused by<br />
the instrument itself or by external devices or connections. The following three<br />
error messages share the same description.<br />
� CAUTION: OVERLOAD ON INPUT A, POWER REDUCED<br />
w CAUTION: OVERLOAD ON INPUT B, POWER REDUCED<br />
� CAUTION: OVERLOAD ON INPUT R, POWER REDUCED<br />
If any of the above error messages appear, the analyzer has exceeded<br />
approximately + 14 dBm at one of the test ports. The RF output power is<br />
automatically reduced to -85 dBm. The annotation PJ appears in the left<br />
margin of the display to indicate that the power trip function has been<br />
activated. lb reset the analyzer’s power and regain control of the power level,<br />
do the following:<br />
1. Remove any devices under test which may have contributed excess power to<br />
the input.<br />
2. fiess m @&&@ @ Lxl] ~~~~~~~~~~~, to return the power level to<br />
~.....~........................... . . . . . ..-.I . . . . . . . . . . . . ~............~ . . . . . i . . . . . . v~-~.~..~...~.~.~..~ ._.. i<br />
the preset state.<br />
� If the power trip indicator (Pi) does not reappear, reconfigure the test<br />
setup to keep input power levels at 0 dBm or below.<br />
� If Pl reappears, continue with “Check the A and B Inputs”.<br />
Receiver Troubleshooting 8-3
Check the A and B Inputs<br />
Good inputs produce traces similar to Figure 8-2 in terms of flatness. To examine<br />
both input traces, do the following:<br />
1. Connect the equipment as shown in Figure 8-1. (The through cable is <strong>HP</strong> part<br />
number 8120-4779.)<br />
2.<br />
3.<br />
NETWORK ANALYZER<br />
Figure S-l. Equipment Setup<br />
Check the flatness of the input A trace by comparing it with the trace in<br />
Figure 8-2.<br />
Check the flatness of the input B trace by comparing it with the trace in<br />
Figure 8-2.<br />
:.:............................... __ .... ................... ..~.~...~.~ ...... . _ ................................ ...) p .:.:.:.:.:.... / ::..:...:.:.:.: ....<br />
fie3 1Meao)<br />
~~~~~~~~., ;@) ...<br />
..................<br />
............_.............-.<br />
..............................................<br />
_......................._....iiii. .....................2.. ... :.z.x.:.: .- ,. :.:.:.z.:.&...........ii..............................<br />
.._ ........:.:.::.,_L :cz.:.m<br />
� If neither of the input traces resembles Figure 8-2, continue with<br />
“Troubleshooting When All Inputs Look Bad”.<br />
� If at least one input trace resembles Figure 8-2, continue with<br />
“Troubleshooting When One or More Inputs Look Good”.<br />
84 Receiver Troubleshooting
START 030 000 MHZ<br />
Figure 8-2. Typical Good Trace<br />
Receiver Troubleshooting 8-5
Troubleshooting When All Inputs Look Bad<br />
Run Internal Tests 18 and 17<br />
1. Press (Preset) ~ ~~~I~~~~.~~ ~~~~ Llsl Lxl) ~~~~~~ to I-un<br />
- . ..-.................-... .._...._... - .._. -... ;:... .._........<br />
the ADC offset.<br />
__ _ _ ~~.<br />
2. Then, when the analyzer finishes test 18, press L17) Lxl) .~~~~~~~~ to<br />
run the ADC linearity test.<br />
If either of these tests FAIL, the A10 assembly is probably faulty. This can be<br />
conflrmed by checking the 4 MHz signal and substituting the A10 assembly or<br />
checking the signals listed in Table 8-l.<br />
Check 2nd LO<br />
Check the 2nd Lo signal. Refer to the “Al2 Reference Check” section of<br />
Chapter 7, “Source Troubleshooting” for analog bus and oscilloscope checks of<br />
the 2nd Lo and waveform illustrations.<br />
� If the analyzer passes the checks, continue to “Check the 4 MHz REF Signal”.<br />
� If the analyzer fails the checks, perform the high/Iow band transition<br />
adjustment. If the adjustment fails, or brings no improvement, replace A12.<br />
8-6 Receiver Troubleshooting
Check the 4 MHz REF Signal<br />
1. Press w.<br />
2. Use an oscilloscope to observe the 4 MHz reference signal at AlOP2-6.<br />
� If the signal does not resemble Figure 8-3, troubleshoot the signal source<br />
(A12P2-36) and path.<br />
� If the signal is good, the probability is greater than 90% that the A10<br />
assembly is faulty. For confirmation, perform “Check A10 by Substitution<br />
or Signal Examination”.<br />
I<br />
-500.000 nmec 0.00000 ma0 soo.000 Mac<br />
I I<br />
iA<br />
f/ I / I<br />
I<br />
\<br />
/<br />
/ \<br />
A<br />
/t \<br />
/<br />
/ \<br />
I<br />
/<br />
I<br />
Ch. 1 - 1.000 volt.s/d,v Offmet - 0.000 Volts<br />
TImebase - 100 nwc/div OIlOY - o.ooooo se=<br />
Figure 8-3. 4 MHz RJIF Waveform<br />
sg603s<br />
Receiver Troubleshooting 8-7
Check A10 by Substitution or Signal Examination<br />
If the 4 MHz REF signal is good at the A10 digital IF assembly, check the A10<br />
assembly by one of the following methods:<br />
� Substitute another A10 assembly or<br />
� Check the signal/control lines required for its operation. The pins and signal<br />
sources of those lines are identified in ‘Ihble 8-1. It is possible that the A9<br />
assembly may not be providing the necessary signals. These signal checks<br />
allow you to determine which assembly is faulty. Some of the waveforms are<br />
illustrated by Figure 8-4 and Figure 8-5.<br />
If the substitute assembly shows no improvement or if all of the input signals<br />
are valid, continue with “Check the 4 kHz Signal”. Otherwise troubleshoot the<br />
suspect signal(s) or consider the A10 assembly faulty.<br />
8-8 Receiver Troubleshooting
Dlmo<br />
DlFDl<br />
DE-D2<br />
DIFD3<br />
DlFD4<br />
DEDS<br />
DEDB<br />
DlFD7<br />
L DIPEN<br />
L D-1<br />
L DIFEN2<br />
DIFCC<br />
DIRXK<br />
DIF DATA<br />
LFiNDlF<br />
LINTCOP<br />
Mnemonic<br />
‘Check for Tl’L activity.<br />
‘Ihble S-l. Signals Required for A10 Assembly Operation<br />
Description<br />
Digital IF date 0 (MB)<br />
DigitallFdatal<br />
DigitallFdata2<br />
DigitallPdata3<br />
DigitallFdata4<br />
DigitdIFdata6<br />
DigitdIFdlIta6<br />
Digital lF data 7 (MSB)<br />
Digital IF enable 0<br />
Digital IF enable 1<br />
Digital IF enable 2<br />
Digital IF conversion camp.<br />
Digital IF aerial clock<br />
Digital lF aerial data out<br />
L-enable digital IF<br />
L-interrupt, DSP<br />
P2-27<br />
P2-67<br />
P2-28<br />
P2-63<br />
F%20<br />
P2-69<br />
P2-30<br />
P2-60<br />
P2-34<br />
P2-6<br />
P2-36<br />
F%33<br />
P2-4<br />
P2-3<br />
P2-17<br />
P2-2<br />
A10<br />
LOCAiOU<br />
SW<br />
source<br />
Aopz-27<br />
AQP2-67<br />
AQP2-28<br />
AOPZ-63<br />
AQP2-20<br />
AW2-60<br />
ABP2-30<br />
Am&60<br />
AQP2-34<br />
Mm-6<br />
AoP2-36<br />
AlOP2-33<br />
AlOP2-4<br />
AlOP2-3<br />
AoP2-17<br />
AlOP2-2<br />
Receiver Troubleshooting 8-g
* DIF DATA consists of 16 serial bits per input conversion.<br />
the LSB is on the right side and is the most volatile.<br />
DIFCLK<br />
DIFDATA*<br />
Figure 8-4. Digital Data Lines Observed Using L INTCOP as Trigger<br />
Ch. 1 - 4.000 vo1tc/cirv<br />
Ch. 2 - 1.000 voltddrv<br />
T , **boss - 20.0 “dd2V<br />
sg604s<br />
sg602s<br />
Figure 8-5. Digital Control Lines Observed Using L INTCOP as Trigger<br />
g-10 Receiver Troubleshooting
Troubleshooting When One or More Inputs Look Good<br />
Since at least one input is good, all of the common receiver circuitry beyond the<br />
multiplexer is functional. Only the status of the individual sampler/mixers and<br />
their individual signal paths is undetermined.<br />
Check the 4 kHz Signal<br />
l- Press Lpreset) LMenu) ~~~~~.<br />
2. Use an oscilloscope to check the 4 kHz output of the sampler/mixer in<br />
question at the Al0 assembly. The input and output access pins are listed in<br />
lhble 8-2. The signal should resemble the waveform of Figure 8-6.<br />
� If the signal is good, continue with “Check the Trace with the Sampler<br />
Correction Constants Off n.<br />
� If the signal is bad, skip ahead to “Check 1st Lo SiiaI at Sampler/Mixer”.<br />
‘ItLble 8-2. 2nd IF (4 kHz) Signal Locations<br />
I Mnemonic I DeecrlPtlon I A10 Locatlou I slgual solute I<br />
lm<br />
IFA<br />
IFB<br />
4kHz AlOPl-1, 31 A4Pl-6<br />
4kHz AlOPl-4, 34 ASPl-6<br />
4kHz AlOPl-7, 37 A6Pl-6<br />
Receiver Troubleshooting 8-l 1
If the trace shows no improvement when the sampler correction constants are<br />
toggled from off to on, perform the “Sampler Magnitude and Phase Correction<br />
Constants (Test 53)” adjustment described in Chapter 3, “Adjustments and<br />
Correction Constants” If the trace remains bad after this adjustment, the A10<br />
assembly is defective.<br />
(4 04<br />
Figure 8-7. Typical Trace with Sampler Correction On and off<br />
sg643d<br />
Receiver Troubleshooting 8-13
Check 1st LO Signal at Sampler/Mixer<br />
If the 4 kHz signal is bad at the sampler/mixer assembly, check the 1st LO signal<br />
where it enters the sampler/mixer assembly in question.<br />
� If the 1st LO is faulty, check the 1st LO signal at its output connector on the<br />
A7 assembly to determine if the failure is in the cable or the assembly.<br />
� If the 1st LO is good, continue with “Check 2nd LO SiiaI at Sampler/Mixer”.<br />
Check 2nd LO Signal at Sampler/Mixer<br />
Check the 2nd LO signal at the pins identified in ‘0ble 8-3. Refer to the “Al2<br />
Reference Check” in Chapter 7, “Source Troubleshooting”, for analog bus<br />
and oscilloscope checks of the 2nd LO and waveform illustrations ‘Ihble 8-3<br />
identifies the signal location at the samplers and the Al2 assembly.<br />
Mnemonic Description<br />
ZndL01 2nd Lo (0 degrees)<br />
2nd Lo 2 2nd Lo ( - 9O degrees)<br />
‘Ihble 8-3. 2nd LO Locations<br />
Sampler<br />
LOCdl0n<br />
A4/6/6 Pl-11<br />
A4lbl6 Pl-4<br />
SW<br />
soluce<br />
Al2Pl-2, 32<br />
Al2Pl-4, 34<br />
If the 2nd LO is good at the sampler/mixer, the sampler/mixer assembly is faulty.<br />
Otherwise, troubleshoot the Al2 assembly and associated signal path.<br />
8-14 Receiver Troubleshooting
Accessories Troubleshooting<br />
Use this procedure only if you have read Chapter 4, “Start Troubleshooting<br />
Here.” Follow the procedures in the order given, unless instructed otherwise.<br />
Measurement failures can be divided into two categories:<br />
� Failures which don’t affect the normal functioning of the analyzer but render<br />
incorrect measurement data.<br />
� Failures which impede the normal functioning of the analyzer or prohibit the<br />
use of a feature.<br />
This chapter addresses the First category of failures which are usually caused by<br />
the following:<br />
� operator errors<br />
� faulty calibration devices or connectors<br />
� bad cables or adapters<br />
w improper calibration techniques<br />
These failures are checked using the following procedures:<br />
� “Inspect the Accessories”<br />
� “Inspect the Error Terms”<br />
9<br />
AccessoriesTroubleshooting g-1
Assembly Replacement Sequence<br />
The following steps show the sequence to replace an assembly in an <strong>HP</strong> <strong>8753E</strong><br />
network analyzer.<br />
1. Identify the faulty group. Refer to Chapter 4, “Start Troubleshooting Here.”<br />
Follow up with the appropriate troubleshooting chapter that identifies the<br />
faulty assembly.<br />
2. Order a replacement assembly. Refer to Chapter 13, “Replaceable Parts.”<br />
3. Replace the faulty assembly and determine what adjustments are necessary.<br />
Refer to Chapter 14, “Assembly Replacement and Post-Repair Procedures.”<br />
4. Perform the necessary adjustments. Refer to Chapter 3, “Adjustments and<br />
Correction Constants. n<br />
5. Perform the necessary performance tests. Refer to Chapter 2, “System<br />
Verification and Performance Tests n<br />
9-2 Accessories Troubleshooting
Inspect the Accessories<br />
Inspect the Test Port Connectors and Calibration Devices<br />
1. Check for damage to the mating contacts of the test port center conductors<br />
and loose connector bulkheads.<br />
2. Inspect the calibration kit devices for bent or broken center conductors and<br />
other physical damage. Refer to the calibration kit operating and service<br />
manual for information on gaging and inspecting the device connectors.<br />
If any calibration device is obviously damaged or out of mechanical<br />
tolerance, replace the device.<br />
Inspect the Error ‘Ikmns<br />
Error terms are a measure of a “system”: a network analyzer, calibration kit,<br />
and any cables used. As required, refer to Chapter 11, “Error Terms,” for the<br />
following:<br />
� The specific measurement calibration procedure used to generate the error<br />
terms.<br />
� The routines required to extract error terms from the instrument.<br />
� Typical error term data.<br />
Use Table 9-l to cross-reference error term data to system faults<br />
Accessories Troubleshooting g-3
Component<br />
Calibration Kit<br />
load<br />
open/short<br />
<strong>Analyzer</strong><br />
sampler<br />
A10 d&ital IF<br />
tent port connector8<br />
External cablea<br />
‘lhble 9-l. Components Related to Specific Error ‘lkrms<br />
X<br />
X X<br />
X X X<br />
X X X X X X<br />
X<br />
X X<br />
If you detect problems using error term analysis, use the following approach to<br />
isolate the fault:<br />
1. Check the cable by examining the load match and transmission tracking<br />
terms. If those terms are incorrect, go to “Cable Test.”<br />
2. Verify the calibration kit devices:<br />
Loads: If the directivity error term looks good, the load and the test port<br />
are good. If directivity looks bad, connect the same load on the other test<br />
port and measure its directivity. If the second port looks bad, as if the<br />
problem had shifted with the load, replace the load. If the second port<br />
looks good, as if the load had not been the problem, troubleshoot the llrst<br />
port.<br />
Shorts and opens: If the source match and reflection tracking terms look<br />
good, the shorts and the opens are good. If these terms look bad while the<br />
rest of the terms look good, proceed to “Verify Shorts and Opens.”<br />
94 Accessories Troubleshooting
Cable Test<br />
The load match error term is a good indicator of cable problems. You can<br />
further verify a faulty cable by measuring the reflection of the cable. Perform<br />
an Sll l-port calibration directly at port 1 (no cables). Then connect the suspect<br />
cable to port 1 and terminate the open end in 50 ohms.<br />
Figure 9-l shows the return loss trace of a good (left side) and faulty cable.<br />
Note that the important characteristic of a cable trace is its level (the good cable<br />
trace is much lower) not its regularity. Refer to the cable manual for return loss<br />
specifications.<br />
CHl Sll log MAG 5dB/ REF 0 dB I-: -28.426 dB CHl Sll<br />
START 030 000 MHZ STOP 6 000.000 000 MHz<br />
log WAG 5 dB, REF 0 dB I-: -15.524 dE<br />
START 030 000 MHZ STOP 6 000.000 000 MHz<br />
Figure 9-1. Typical Return LOSS Traces of Good and Poor Cables<br />
sg642d<br />
Accessories Troubleshooting g-5
Verify Shorts and Opens<br />
Substitute a known good short and open of the same connector type and sex as<br />
the short and open in question. If the devices are not from one of the standard<br />
calibration kits, refer to the <strong>HP</strong> <strong>8753E</strong> <strong>Network</strong> A~~~lyzer User’s <strong>Guide</strong> for<br />
hfomation on how to use the ~~~~~~~~~~~~ fMction* Set aside the short<br />
and open that are causing the problem.<br />
1. Perform an Sll l-port calibration using the good short and open. Then press<br />
zpQ&g,c,,<br />
. . . . .._. . ;ii.....:L.:!. i I-- ~~~~~~~~<br />
-._- ..__.._... - . . . . .../..<br />
to view the devices h S&h chart format.<br />
2. Come& the good shod to poti 1. Press c-1 ~~~~~~~~~ ad<br />
turn the front panel knob to enter enough electrical delay so that the trace<br />
appears as a dot at the left side of the circle. (See Figure 9-2a, left.)<br />
Replace the good short with the questionable short at port 1. The trace of<br />
the questionable short should appear very similar to the known good short.<br />
3. CoMect *e good open to port 1. mess lscale, ~.~~~~~~~~ and<br />
turn the front panel knob to enter enough electrical delay so that the trace<br />
appears as a dot at the right side of the circle. (See Figure 9-2b, right.)<br />
Replace the good open with the questionable open at port 1. The trace of the<br />
questionable open should appear very similar to the known good open.<br />
g-6 Accessories Troubleshooting
Figure 9-2. Typical Smith Chart Traces of Good Short (a) and Open (b)<br />
Accessories Troubleshooting 9-7
<strong>Service</strong> Key Menus and Error Messages<br />
<strong>Service</strong> Key Menus<br />
These menus allow you to perform the following service functions:<br />
� test<br />
� verify<br />
� adjust<br />
� control<br />
w troubleshoot<br />
The menus are divided into two groups:<br />
1. Internal Diagnostics<br />
2. <strong>Service</strong> Features<br />
When applicable, the <strong>HP</strong>-IB mnemonic is written in parentheses following the<br />
key. See <strong>HP</strong>-IB <strong>Service</strong> Mnemonic Definitions at the end of this section.<br />
Error Messages<br />
The displayed messages that pertain to service functions are also listed in this<br />
chapter to help you:<br />
� Understand the message.<br />
� Solve the problem.<br />
10<br />
Sarvics Kay Menus and Error Messages 1 O-1
<strong>Service</strong> Key Menus - Internal Diagnostics<br />
The internal diagnostics menus are shown in Figure 10-l and described in the<br />
following paragraphs. The following keys access the internal diagnostics menus:<br />
sg6104e<br />
Note<br />
Figure 10-l. Internal Diagnostics Menus<br />
Throughout this service guide, these conventions are observed:<br />
o m are labeled front pane1 keys.<br />
� ����� ���� ������␛ ������ ��␛� ��� ��� �������<br />
����� ������������� � � ��� ��� ��������� �����<br />
� (<strong>HP</strong>-IB COMMANDS) when applicable, follow the keystrokes<br />
in parentheses.<br />
1 O-2 <strong>Service</strong> Key Menus and Error Messages
Tests Menu<br />
To access this menu, press w ~~~~~,~~ :,TlZYK$:.<br />
. i ._... /<br />
accesses a menu that allows you to select or execute<br />
the service tests The default is set to internal<br />
test 1.<br />
Note Descriptions of tests in each of the categories are given under<br />
the heading Z&Z Lkscript&nzs in the following pages.<br />
The tests are divided by function into the following<br />
categories:<br />
0 Internal Tests (O-20)<br />
� External Tests (21-26)<br />
� System Verification Tests (27-43)<br />
13 Adjustment Tests (44-58)<br />
� Display Tests (59-65)<br />
0 Test Patterns (66-80)<br />
‘lb access the tlrst test in each category, press the<br />
category softkey. To access the other tests, use the<br />
numeric keypad, step keys, or front panel knob. The<br />
test number, name, and status abbreviation will be<br />
displayed in the active entry area of the display.<br />
<strong>Service</strong> Key Menus and Error Messages 1 O-3
‘Ihble 10-l shows the test status abbreviation that appears on the display, its<br />
delinition, and the equivalent <strong>HP</strong>-IB code. The <strong>HP</strong>-IB command to output<br />
the test status of the most recently executed test is OUTPTESS. For more<br />
information, refer to “<strong>HP</strong>-IB <strong>Service</strong> Mnemonic Definitions” located at the end<br />
of this chapter.<br />
‘able 10-l. l’kst Status ‘kms<br />
Display Abbreviation Defiuition UF-IB code<br />
;;:>a “‘..‘.F<br />
_ _<br />
PASS PASS 0<br />
FAIL FAIL 1<br />
-lP- lNFFmGlzEss 2<br />
WA) NOT AVAILABLE 3<br />
-ND- NOT DONE 4<br />
DONE DONE 6<br />
&@$@J$., ?&#@j (EmT)<br />
Lz:..... . . ..s.s...i . . .. . .::: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ~~~.22> . . ..A.... ~.W~..> . . . . . . i . ...:::<br />
104 <strong>Service</strong> Key Menus and Error Messages<br />
runs the selected test and may display these<br />
softkeys:<br />
y ,, ‘.:.:..‘~::...:.:~.:.:.:.. ..:.:. . . . . :: :.:.: :.. :.:.I<br />
~~~~~~ (TEBl) continues the selected test.<br />
_....._ - ._..___.. -.__-..-.-<br />
.m (TESRB) alters correction constants during<br />
adjustment tests.<br />
:,.....<br />
:$&J&Y$ (TESR4) displays the next choice.<br />
.__..........__....._ ~~ - .._.. -. (TESR6) chooses the option indicated.<br />
,.,. .,.;<br />
~~~~~ (‘J-Em@ terminates _......_._..... -...-..<br />
the test and returns to<br />
the tests menu.<br />
evaluates the analyzer’s internal operation. These<br />
tests are completely internal and do not require<br />
external connections or user interaction.<br />
evaluate the analyzer’s external operation. These<br />
additional tests require some user interaction (such<br />
as keystrokes).
Test Options Menu<br />
verifies the analyzer system operation by examining<br />
the contents of the measurement calibration arrays.<br />
The procedure is in the “System Verification and<br />
Performance Tests” chapter. Information about the<br />
calibration arrays is provided in the “Error Terms”<br />
chapter.<br />
generates and stores the correction constants.<br />
For more information, refer to the “Adjustments”<br />
chapter.<br />
checks for correct operation of the display and GSP<br />
board.<br />
accesses softkeys that affect the way tests (routines)<br />
run, or supply necessary additional data.<br />
resumes the test from where it was stopped.<br />
toggles the repeat function on and off. When the<br />
function is ON, the selected test will rtm 10,000<br />
times unless you press any key to stop it. The<br />
analyzer shows the current number of passes and<br />
fails.<br />
toggles the record function on and off. When the<br />
function is ON, certain test results are sent to<br />
a printer via <strong>HP</strong>-IB. This is especially useful for<br />
correction constants. The indent must be in<br />
system controller mode or pass control mode to<br />
print (refer to the “Printing, Plotting, and Saving<br />
Measurement Results” chapter in the <strong>HP</strong> 87533<br />
User’s Guidt?.<br />
selects either NORMal or SPeCiaL (tighter) limits for<br />
the Operator’s Check. The SPCL limits are useful for<br />
a guard band.<br />
accesses the following Edit List menu to allow<br />
modihcation of the external power loss data table.<br />
<strong>Service</strong> Key Menus and Error Messages 1 O-5
accesses the power loss/sensor lists menu:<br />
‘~~~~~~~~~~,~‘~~~~:.<br />
. . .._ . . . . . . .,.......,.... s . ..., . . . . . . . . . . ;.. . . . . . . .<br />
se1e&s the A or B power SenSOr<br />
calibration factor list for use in power meter<br />
calibration measurements.<br />
.& ,,~~~~~~~~~~:~~ (CALFSENA) aCCeSSeS<br />
L...AL..:~:.: . . . ..A. .._.... ..........i.........~; .:: ..:... ;:...: . ...&...L :..<br />
the Edit List menu to allow modification of the<br />
calibration data table for power sensor A.<br />
~~~,~.~~~~~~~~~~~~.. (CALFSENB) acceSSeS<br />
the Edit List menu to allow modification of the<br />
calibration data table for power sensor B.<br />
~~~,~~~~~ (pOjVIJJST) acceSSeS the Edit I&t<br />
menu to allow modification of the external power<br />
loss data table that corrects coupled-arm power<br />
loss when a directional coupler samples the RF<br />
output.<br />
generates printed graphs of verification results when<br />
activated during a system verification.<br />
Edit List Menu To access this menu, press &Z&T) ~.~~~~~~~<br />
.. . . . . . . . . . . . .._. L .,.,,,,,,,__ii~;~ _i i _; _ _:<br />
__ . . . . . . . _.I.i ,.... ; “‘,.,.,.<br />
fj$gi&@<br />
__ i ,.,.,.,.,..............<br />
‘#j%$$ (SEDI[D])<br />
‘@$@’ (EDITDONE)<br />
1 O-6 <strong>Service</strong> Kay Menus and Error Messages<br />
selects a segment (frequency point) to be edited,<br />
deleted from, or added to the current data table.<br />
Works with the entry controls<br />
allows modification of frequency, cal factor and loss<br />
values previously entered in the current data table.<br />
deletes frequency, cal factor and loss values<br />
previously entered in the current data table.<br />
adds new frequency, cal factor and loss values to the<br />
current data table up to a maximum of 12 segments<br />
(frequency points, PTS).<br />
/ deletes _ _ the entire ctu~+~~data table (or list) when<br />
:i@; b pressed. &es #&: to avoid deletion.<br />
returns to the previous menu.
Self Diagnose Softkey<br />
. . . . . . . . . :i ..:: ..:... .:.: : . . .<br />
You cm access the self d@mos~ fundon by pressing I%@) ~~~~Jr.~..~~~~<br />
.~~~~~~~~.~~~. This fun&ion examines, in order, the pass/fail status of ail<br />
internal tests and displays NO FAILURE FOUND if no tests have failed.<br />
If a failure is detected, the routine displays the assembly or assemblies most<br />
probably faulty and assigns a failme probability factor to each assembly.<br />
Test Descriptions<br />
The analyzer has up to 80 routines that test, verify, and adjust the instrument.<br />
This section describes those tests.<br />
Internal Tests<br />
This group of tests runs without external connections or operator interaction.<br />
All return a PASS or FAIL condition. All of these tests run on power-up and<br />
PRESET except as noted.<br />
0 ALL INT. Runs only when selected. It consists of internal tests 3-11,<br />
13-16, and 20. Use the front panel knob to scroll through the tests and<br />
see which failed. If aIl pass, the test displays a PASS status. Each test<br />
in the subset retains its own test status.<br />
1 PRESET. Runs the following subset of internal tests: first, the<br />
ROM/RAM tests 2, 3, and 4; then tests 5 through 11, 14, 15, and 16. If<br />
any of these tests fail, this test returns a FAIL status. Use the front<br />
panel knob to scroll through the tests and see which failed. If all pass,<br />
this test displays a PASS status. Each test in the subset retains its own<br />
test status. This same subset is available over <strong>HP</strong>-IB as “TST?“. It is not<br />
performed upon remote preset.<br />
2 ROM. Part of the ROMJRAM tests and cannot be nm separately. Refer<br />
to the “Digital Control Troubleshooting” chapter for more information.<br />
<strong>Service</strong> Kay Menus and Error Messages 1 O-7
3 SRAM RAM. Verifies the A9 CPU SRAM (long-term) memory with a<br />
non-destructive write/read pattern. A destructive version that writes<br />
over stored data at power-on can be enabled by changing the 4th<br />
switch position of the A9 CPU switch as shown in Figure 10-2.<br />
sge117e<br />
s400<br />
A9 CPU Assembly<br />
Normal Mode Destructive SRAM<br />
Test Enabled<br />
Figure 19-2. A9 CPU Switch Positions<br />
I<br />
Rocker Slide<br />
4 Main DRAM. Verifies the A9 CPU main memory (DRAM) with a<br />
non-destructive write/read test pattern. A destructive version of this<br />
test is run during power-on.<br />
For additional information, see Internal Tests (near the front of this<br />
section) and the “Digital Control Troubleshooting” chapter.<br />
1 O-8 <strong>Service</strong> Kay Menus and Error Messages
5<br />
6<br />
7<br />
8<br />
9<br />
10<br />
11<br />
12<br />
13<br />
14<br />
DSP WdRd. Verifies the ability of the main processor and the<br />
DSP (digital signal processor), both on the A9 CPU assembly, to<br />
communicate with each other through DRAM. This also verifies that<br />
programs can be loaded to the DSP, and that most of the main RAM<br />
access circuits operate correctly.<br />
DSP RAM. Verifies the A9 CPU RAM associated with the digital signal<br />
processor by using a write/read pattern.<br />
DSP ALU. Verifies the A9 CPU high-speed math processing portions of<br />
the digital signal processor.<br />
DSP Intrpt. Tests the ability of the A9 CPU digitai signal processor to<br />
respond to interrupts from the A10 digital IF ADC.<br />
DIF Control. Tests the ability of the A9 CPU main processor to<br />
write/read to the control latches on the A10 digitaI IF<br />
DIF Canter. Tests the ability of the A9 CPU main processor to<br />
write/read to the triple divider on the A10 CPU. It tests the A9<br />
CPU data buffers and A10 digital IF, the 4 MHz clock from the Al2<br />
reference.<br />
DSP Control. Tests the ability of the A9 CPU digital signal processor to<br />
write to the control latches on the A10 digital IF. Feedback is verified<br />
by the main processor. It primarily tests the A10 digital IF, but failures<br />
may be caused by the A9 CPU.<br />
Fr F&n Wr/Rd. Tests the ability of the A9 CPU main processor to<br />
write/read to the front panel processor. It tests the A2 front panel<br />
interface and processor,and A9 CPU data buffering and address<br />
decoding. (See also tests 23 and 24.) This runs only when selected.<br />
Rear mel. Tests the ability of the A9 CPU main processor to<br />
write/read to the rear panel control elements. It tests the Al6 rear<br />
panel, and A9 CPU data buffering and address decoding. (It does not<br />
test the <strong>HP</strong>-IB interface; for that, see the <strong>HP</strong>-IB Programming <strong>Guide</strong>.)<br />
This runs only when selected or with ALL INTERNAL.<br />
Post Reg. Polls the status register of the A8 post-regulator, and<br />
flags these conditions: heat sink too hot, inadequate air flow, or<br />
post-regulated supply shutdown.<br />
<strong>Service</strong> Key Menus and Error Messages 1 O-g
15 Frac N Cont. Tests the ability of the A9 CPU main processor to<br />
write/read to the control element on the Al4 fractional-N (digital)<br />
assembly. The control element must be functioning, and the<br />
fractional-N VCO must be oscillating (although not necessarily<br />
phase-locked) to pass.<br />
16 Sweep Trig. Tests the sweep trigger (L SWP) Iine from the Al4<br />
fractional-N to the A10 digital IF. The receiver with the sweep<br />
synchronizes L SWP.<br />
17 ADC Lin. It tests the linearity of the A10 digital IF ADC using the<br />
built-in ramp generator. The test generates a histogram of the ADC<br />
linearity, where each data point represents the relative “width” of a<br />
particular ADC code. Ideally, ah codes have the same width; different<br />
widths correspond to non-Iinearities<br />
18 ADC Ofs. This runs only when selected. It tests the ability of the<br />
offset DAC, on the A10 digit& IF’, to apply a bias offset to the IF signals<br />
before the ADC input. This runs only when selected.<br />
19 ABUS ‘Wt. Tests analog bus accuracy, by measuring several analog bus<br />
reference voltages (aII nodes from the A10 digitai IF). This runs only<br />
when selected.<br />
20 F’N Count. Uses the internal counter to count the Al4 fractional-N<br />
VCO frequency (120 to 240 MHz) and the divided fractional-N<br />
frequency (100 kHz). It requires the 100 kHz signal from Al2 and the<br />
counter gate signal from A10 to pass<br />
1 O-1 0 <strong>Service</strong> Key Menus and Error Messages
External Tests<br />
These tests require either external equipment and connections or operator<br />
interaction of some kind to run. Tests 30 and 60 are comprehensive front panel<br />
checks, more complete than test 12, that checks the front panel keys and knob<br />
entry.<br />
21 Port 1 Op Chk. Part of the “Operator’s Check” procedure, located<br />
in the “Start Troubleshooting” chapter. The procedure requires the<br />
external connection of a short to PORT 1.<br />
22<br />
Port 2 Op Cbk. Same as 21, but tests PORT 2.<br />
23 Fr Pan Seq. Tests the front panel knob entry and all A1 front panel<br />
keys, as well as the front panel microprocessor on the A2 assembly. It<br />
prompts the user to rotate the front panel knob, then press each key<br />
in an ordered sequence. It continues to the next prompt only if the<br />
current prompt is correctly satisfied.<br />
24 Fr Fan Diag. Similar to 23 above, but the user rotates the front panel<br />
knob or presses the keys in any order. This test displays the command<br />
the instrument received.<br />
25 ADC Hist. Factory use only.<br />
26 Source Ex. Factory use only.<br />
<strong>Service</strong> Key Menus and Error Messages 1 O-1 1
System Verification Tests<br />
These tests apply mainly to system-level, error-corrected verification and<br />
troubleshooting. Tests 27 to 31 are associated with the system verification<br />
procedure, documented in the “System Verification and Performance Tests”<br />
chapter. Tests 32 to 43 facilitate examining the calibration coefficient arrays<br />
(error terms) resuhing from a measurement calibration; refer to Chapter 11,<br />
“Error Terms,” for details.<br />
27<br />
28<br />
29<br />
30<br />
31<br />
32-43<br />
Sys Ver Init. Recalls the initiaiization state for system verification<br />
from an <strong>HP</strong> <strong>8753E</strong> verification disk, in preparation for a measurement<br />
calibration. It must be done before service internal tests 28, 29, 30, or<br />
31 are performed.<br />
Ver Dev 1. Recalls verification Iimits from disk for verification device<br />
#1 in aII applicable S-parameter measurements. It performs pass/fail<br />
Iimit testing of the current measurement.<br />
Ver Dev 2. Same as 28 above for device #2.<br />
Ver Dev 3. Same as 28 above for device #3.<br />
Ver Dev 4. Same as 28 above for device #4.<br />
CaI Coef 1-12. Copies error term data from a measurement calibration<br />
array to display memory. A measurement calibration must be complete<br />
and active. The de9nition of calibration arrays depends on the current<br />
calibration type. After execution, the memory is automatically<br />
displayed. Refer to Chapter 11, “Error Terms,” for details.<br />
lo-12 <strong>Service</strong> Key Menus and Error Messages
Adjustment Tests<br />
The tests without asterisks are used in the procedures located in the<br />
“Adjustments” chapter of this manual, except as noted.<br />
44<br />
45<br />
46<br />
47<br />
48<br />
50<br />
51<br />
52<br />
53<br />
54<br />
*Source Def. Writes default correction constants for rudimentary<br />
source power accuracy. Use this test before running test 47, below.<br />
*Pretune Def. Writes default correction constants for rudimentary<br />
phase lock pretuning accuracy. Use this test before running test 48,<br />
below.<br />
ABUS Cm. Measures three 6xed voltages on the ABUS, and generates<br />
new correction constants for ABUS amplitude accuracy in both high<br />
resolution and low resolution modes. Use this test before nmning test<br />
48, below.<br />
Source Cm. Measures source output power accuracy, flatness, and<br />
linearity against an external power meter via <strong>HP</strong>-IB to generate new<br />
correction constants Run tests 44, 45,46, and 48 first.<br />
Pretune Cm. Generates source pretune values for proper phase-locked<br />
loop operation. Run tests 44, 45, and 46 first.<br />
Disp 2 Ex. Not used in “Adjustments.” Writes the “secondary test<br />
pattern” to the display for adjustments. Press (Preset to exit this<br />
routine.<br />
IF Step Cm. Measures the gain of the IF ampliliers (A and B only)<br />
located on the A10 digital IF, to determine the correction constants for<br />
absolute amplitude accuracy. It provides smooth dynamic accuracy and<br />
absolute amplitude accuracy in the -30 dBm input power region.<br />
ADC Ofs Cm. Measures the A10 Digital IF ADC linearity<br />
characteristics, using an internal ramp generator, and stores values<br />
for the optimal operating region. During measurement, IF signals are<br />
centered in the optimal region to improve low-level dynamic accuracy.<br />
Sampler Cm. Measures the absolute amplitude response of the<br />
R sampler against an external power meter via <strong>HP</strong>-IB, then compares<br />
A and B, (magnitude and phase), against R. It improves the R input<br />
accuracy and AAYR tracking.<br />
Cav Osc Cm. Calculates the frequency of the cavity oscillator and the<br />
instrument temperature for effective spur avoidance.<br />
<strong>Service</strong> Key Menus and Error Messages lo-13
55 Serial Cor. Stores the serial number (input by the user in the Display<br />
Title menu) in EEPROM. This routine will not overwrite an existing<br />
serial number.<br />
56<br />
57<br />
58<br />
Option hr. Stores the option keyword (required for Option 002, 006,<br />
010 or any combination).<br />
Not used.<br />
Init EEPEOM. This test initializes certain EEPROM addresses to zeros<br />
and resets the display intensity correction constants to the default<br />
values. Also, the test will not alter the serial number and correction<br />
constants for Option 002, 006, and 010.<br />
1 O-14 <strong>Service</strong> Key Menus and Error Messages
Display Tests<br />
These tests return a PASS/FAIL condition. All six amber front panel LEDs will<br />
turn off if the test passes. Press m to exit the test. If any of the six LEDs<br />
remain on, the test has failed.<br />
59<br />
60<br />
61<br />
62<br />
63<br />
64<br />
65<br />
Dispkpu corn. Checks to con&n that the CPU can communicate with<br />
the A19 GSP board. The CPU writes all zeros, all ones, and then a<br />
walking one pattern to the GSP and reads them back. If the test fails,<br />
the CPU repeats the walking 1 pattern until I&%?) is pressed.<br />
DRAM cell. Tests the DRAM on A19 by writing a test pattern to the<br />
DRAM and then verifying that it can be read back.<br />
Main VRAM. Tests the VRAM by writing all zeros to one location in<br />
each bank and then writii all ones to one location in each bank.<br />
Finally a walking one pattern is written to one location in each bank.<br />
VRAM bank. Tests all the cells in each of the 4 VRAM banks<br />
VRAMhideo. Verifies that the GSP is able to successfully perform both<br />
write and read shift register transfers. It also checks the video signals<br />
LHSYNC, LVSYNC, and LBLANK to verify that they are active and<br />
toggling.<br />
RGB outputs. Confirms that the analog video signals are correct and it<br />
verifies their functionality.<br />
Inten DAC. Verifies that the intensity DAC can be set both low and<br />
high.<br />
<strong>Service</strong> Key Menus and Error Messages 1 O-1 5
Test Patterns<br />
Test patterns are used in the factory for display adjustments, diagnostics,<br />
and troubleshooting, but they are not used for field service. Test patterns<br />
are executed . . . . . . . . . . . . . . . . . . . . . by . . . . . . . entering . . . . . . . the test number (66 through SO), then pressing<br />
~~~~~~~ ~~~~~~. me te,& pattem fl be displayed md the &aey<br />
~:.:.:..i.:.:.:.:.:.:.:.~.:.:.~.~.~.~.~.~.~.~,~.~,~.~ _ ___ .,.. ,,,,,,.,.,... I .....,. ...<br />
. . . . . . . .:: . . . .::.:<br />
. . . . . . . . . . . . . .<br />
labels blanked. ‘Ib increment to the next pattern, press softkey 1; to go back<br />
to a previous pattern, press softkey 2. To exit the test pattern and return the<br />
softkey labels, press softkey 8 (bottom softkey). The following is a description<br />
of the test patterns.<br />
66 ‘I&t Pat 1. Displays an all white screen for verifying the light output<br />
of the A18 display and checks for color purity.<br />
67-69 ‘l&t Pat 2-4. Displays a red, green, and blue pattern for verifying the<br />
color purity of the display and also the ability to independently control<br />
each color.<br />
70<br />
71<br />
72<br />
73<br />
74<br />
‘I&t Pat 5. Displays an all black screen. This is used to check for<br />
stuck pixels.<br />
‘l&t Fat 6. Displays a 16-step gray scale for verifying that the A19 GSP<br />
board can produce 16 different amplitudes of color (in this case, white).<br />
The output comes from the RAM on the GSP board, it is then split. The<br />
signal goes through a video DAC and then to an external monitor or<br />
through some buffer amplifiers and then to the internal LCD display.<br />
If the external display looks good but the internal display is bad, then<br />
the problem may be with the display or the cable connecting it to the<br />
GSP board. This pattern is also very useful when using an oscilloscope<br />
for troubleshooting. The staircase pattern it produces will quickly show<br />
missing or stuck data bits<br />
Test Pat 7. Displays the following seven colors: Red, Yellow, Green,<br />
Cyan, Blue, Magenta and White.<br />
‘Ibest Fat 8. This pattern is intended for use with an external display.<br />
The pattern displays a color rainbow pattern for showing the ability<br />
of the A19 GSP board to display 15 colors plus white. The numbers<br />
written below each bar indicate the tint number used to produce that<br />
bar (0 & loo-pure red, 33=pure green, 67=pure blue).<br />
‘I&t Fat 9. Displays the three primary colors Red, Green, and Blue at<br />
four different intensity levels. You should see 16 color bands across<br />
the screen. Starting at the left side of the display the pattern is; Black<br />
four bands of Red (each band increasing in intensity) Black four bands<br />
lo-16 <strong>Service</strong> Key Menus and Error Messages
of Green (each band increasing in intensity) Black four bands of Blue<br />
(each band increasing in intensity) Black If any one of the four bits for<br />
each color is missing the display will not look as described.<br />
75 ‘lbst Pat 10. Displays a character set for showing the user ail<br />
the different types and sizes of characters available. Three sets<br />
of characters are drawn in each of the three character sizes. 125<br />
characters of each size are displayed. Characters 0 and 3 cannot be<br />
drawn and several others are really control characters (such as carriage<br />
return and line feed).<br />
76 l&t Pat 11. Displays a bandwidth pattern for verifying the bandwidth<br />
of the EXTERNAL display. It consists of multiple alternating white and<br />
black vertical stripes. Each stripe should be clearly visible. A limited<br />
bandwidth would smear these lines together. This is used to test the<br />
quality of the external monitor.<br />
77 ‘I&t Pat 12. Displays a repeating gray scale for troubleshooting, using<br />
an oscilloscope. It is similar to the 16 step gray scale but is repeated 32<br />
times across the screen. Each of the 3 outputs of the video palette will<br />
then show 32 ramps (instead of one staircase) between each horizontal<br />
sync pulse. This pattern is used to troubleshoot the pixel processing<br />
circuit of the A19 GSP board.<br />
78 ‘lbst PM. 13. Displays a convergence pattern for measuring the<br />
accuracy of the color convergence of the external monitor.<br />
79-80 l&t Pat 14-15. Displays crosshatch and inverse crosshatch patterns<br />
for testing color convergence, linearity,and alignment. This is useful<br />
when aligning the LCD display in the bezel.<br />
<strong>Service</strong> Key Menus and Error Messages 1 O-17
<strong>Service</strong> Key Menus - <strong>Service</strong> Features<br />
The service feature menus are shown in F’igure 10-3 and described in the<br />
following paragraphs. The following keys access the service feature menus:<br />
<strong>Service</strong> Modes Menu<br />
lo-18 <strong>Service</strong> Key Menus and Error Messages<br />
Figure 10-3. <strong>Service</strong> Feature Menus<br />
sg6103e<br />
allows you to control and monitor various circuits<br />
for troubleshooting.<br />
tests the Al3 and Al4 fractional-N circuits. It dOWS<br />
YOU to directly control and monitor the output<br />
frequency of the fractional-N synthesizer (10 MHz to<br />
60 MHZ). Set the instrument to CW sweep mode ami<br />
then set F’RACN TUNE ON.
:.:~l.L:.,z ) i<br />
k&g, ~~~~.‘~~~<br />
., ,..........<br />
.I /._.._..-/__//i AL.< A..><br />
Change frequencies with the front panel keys or<br />
knob. The output of the Al4 assembly can be<br />
checked at A14Jl HI OUT (in high band) or A14J2<br />
LO OUT (in low band) with an oscilloscope, a<br />
frequency counter, or a spectrum analyzer. Siiai<br />
jumps and changes in shape at 20 MHz and 30 MHz<br />
when tuning up in frequency, and at 29.2 MHz and<br />
15 MHz when tuning down, are due to switching<br />
of the digital divider. This mode can be used with<br />
the SRC TUNE mode as described in “Source<br />
Troubleshooting” chapter.<br />
accesses the functions that ailow you to adjust the<br />
source:<br />
._<br />
~~~~~ .~~~~~~~~ tests the p&me fun&ions<br />
of the phase lock and source assemblies Use<br />
the entry controls to set test port output to any<br />
frequency from 300 KHz to 6 GHz. When in this<br />
mode:<br />
� ~,~~ Set analyzer ..= . ..- ~ .(H( to CW frequency before pressing<br />
~~~~~~~.~. .<br />
� Test port output is 1 to 6 MHz above indicated<br />
(entered) frequency.<br />
� Instrument does not attempt to phase lock.<br />
o Residual FM increases.<br />
_ . . . . . . . . . . . . . . . . . . . . . . . . . . . ..~..............i............................... . . . . _. . . . . . . . . . . . . . . . . _ . . ._ . .. . . _ . . :.; . . .,.,...,.,. . . . . . . . . .,.,. . / . . ,.................<br />
. . . . . . ./ .<br />
. . . . . . . . . . . . . . . . . . . . . .<br />
~~~~~~ &ow you to change the somce<br />
tune frequency.<br />
_ ::..::::.: .;,_ . ,_; . . . . . . . . . _.,.,,.......,...,.,..................i .:.x . . . . . . . . . . . . . . . _<br />
~~~~~~~~<br />
,.i_i___ __ _..~ .,......_ _ ,,,.,. :.,.<br />
toggles the automatic leveling<br />
control (ALC) on and off.<br />
~.~~~~~~~~~<br />
:. ..i<br />
::;:::... “.::::“:::::~::::::::~..:::.::::::::..:~:::::::::::::::::::::::::: .; ;..::::.:<br />
~~~~~~~~~~<br />
~~.:.~.~.& . . . . . . . . . ..~... __ . . . . . . A,,.; . .,.,. i .,...<br />
~~~~~~~~~<br />
. . . . ..c.. ii...........i<br />
m _ _ _ _ _; _ _ _ _i_i_ i<br />
.~~~~~~~~~~~~~.<br />
.,,....,,....... .::: ..::..... . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . * . . . . . . . . . . . . . . . . . . . . . . . . . :
..,.,, _ _ _ . . . . . . . _.;.:..; ,........... ., . . . . . . . . . . . .<br />
~~~~~~~~~~~~(SM5)<br />
With this mode switched OFF, the source stays in<br />
the pretune mode and does not attempt to complete<br />
the phase lock sequence. Also, all phase lock error<br />
messages are disabled. The fractional-N circuits<br />
and the receiver operate normally. Therefore, the<br />
instrument sweeps, but the source is being driven by<br />
the pretune DAC in a stair-stepped fashion.<br />
Automatically attempts to determine new pretune<br />
values when the instrument encounters phase lock<br />
problems (for example, “harmonic skip”). With<br />
~~~~~~~~~~~ the frequencies and voltages do<br />
. . . . . . . . . .<br />
not change, like when they are attempting to<br />
determine new prettme values, so troubleshooting<br />
the phase-locked loop circuits is more convenient.<br />
This function may also be turned off to avoid<br />
pretune calibration errors in applications where<br />
there is a limited frequency response in the R<br />
(reference) channel. For example, in a high power<br />
test application, using band limited lllters for R<br />
channel phase locking.<br />
displays a phase lock sequence at the beginning of<br />
each band. This sequence normally occurs very<br />
rapidly, making it difficult to troubleshoot phase lock<br />
problems Switching this mode ON slows the process<br />
down, allowing you to inspect the steps of the phase<br />
lock sequence @retune, acquire, and track) by<br />
pausing at each step. The steps are indicated on the<br />
display, along with the channel (Cl or C2) and band<br />
number (Bl through B13).<br />
This mode can be used with PLL PAUSE to halt the<br />
process at any step. It can also be used with the<br />
analog bus counter.<br />
10-20 <strong>Service</strong> Key MenusandError Messages<br />
,;_; _ ,....<br />
; _ _ .,.,., /<br />
used only with PLL DIAG mode. $J$#&~ indicates<br />
that it will continuously cycle through all steps of<br />
the phase lock sequence. ;@#J$&; holds it at any step<br />
of interest. This mode is useful for troubleshooting<br />
phase-locked loop problems<br />
Accesses the service modes more menu listed below.
<strong>Service</strong> Modes More Menu<br />
‘:&#dw . ;; /.i i IJHmij,,<br />
. . . . . . . . . . . . ii. . .<br />
;~.~.~~~~~~ :##g<br />
- .._^...................-.................... i<br />
Toggles the sampler correction routine ON,<br />
for normal operation, or OFF, for diagnosis or<br />
adjustment purposes<br />
Normal operating condition and works in<br />
conjunction with IF GAIN ON and OFF. The A10<br />
assembly includes a switchable attenuator section<br />
and an amplifier that amplitles low-level 4 kHz<br />
IF signals (for A and B inputs only). This mode<br />
allows the A10 IF section to automatically determine<br />
if the attenuator should be switched in or out.<br />
The switch occurs when the A or B input signal is<br />
approximately -30 dBm.<br />
Locks out the A10 IF attenuator sections for<br />
checking the A10 IF gain amplifier circuits,<br />
regardless of the amplitude of the A or B IF signal.<br />
Switches out both the A and B attenuation circuits;<br />
they cannot be switched independently. Be aware<br />
that input signal levels above -30 dBm at the<br />
sampler input will saturate the ADC and cause<br />
measurement errors.<br />
Switches in both of the A10 IF attenuators for<br />
checking the A10 IF gain amplifier circuits Small<br />
input signals will appear noisy, and raise the<br />
apparent noise floor of the instrument.<br />
,.,:,,<br />
,.( ,.,.;.~.~.~.~..~,,,.......: . . . . . . . j*................ .::: ,,,_; .__.. . . . . . .<br />
~~~~~~~~~~~~~; ($3~7)<br />
_ .,.,. i .-_ _ .-._.. :..T-.:.:.,.:.+L _/_ _ _ ,.,.,.,.,.,.,.,.,.,. _ _i .,... i<br />
For factory use only.<br />
. . . . . . . . .._ . . . . . . .<br />
~~~~~~~~~~~::~ Allows you to store the correction constants that<br />
reside in non-volatile memory (EEPROM) onto a<br />
disk. Correction constants improve instrument<br />
performance by compensating for specific operating<br />
variations due to hardware limitations (refer to the<br />
“Adjustments” chapter). Having this information on<br />
disk is useful as a backup, in case the constants are<br />
lost (due to a CPU board failure). Without a disk<br />
backup the correction constants can be regenerated<br />
<strong>Service</strong> Key Menus and Error Messages 1 O-21
Analog Bus<br />
Description of the Analog Bus<br />
manually, although the procedures are more time<br />
consuming.<br />
offsets the frequency of both the A3 YIG oscillator<br />
and the A3 cavity oscillator to avoid spurs _ _ which<br />
_ ..,. ,. . . . . ....:.:.:<br />
cannot othe&e be filtered out. ~~~~~~~i:~~~.;<br />
allows examination of these spurs for service.<br />
enables and disables the analog bus, described<br />
below. Use it with the analog in menu,<br />
(a description of this menu follows).<br />
The analog bus is a single multiplexed line that networks 31 nodes within the<br />
instrument. It can be controlled from the front panel, or through <strong>HP</strong>-IB, to<br />
make voltage and frequency measurements just like a voltmeter, oscilloscope, or<br />
frequency counter. The next few paragraphs provide general information about<br />
the structure and operation of the analog bus See “Analog Bus Nodes, n for a<br />
description of each individual node. Refer to the “Overall Block Diagram,” in<br />
the “Start Troubleshooting” chapter, to see where the nodes are located in the<br />
instrument.<br />
The analog bus consists of a source section and a receiver section. The source<br />
can be the following:<br />
� any one of the 31 nodes described in “Analog Bus Nodes”<br />
� the Al4 fractional-N VCO<br />
� the Al4 fractional-N VCO divided down to 100 kHz<br />
The receiver portion can be the following:<br />
� the main ADC<br />
� the frequency counter<br />
When analog bus traces are displayed, frequency is the x-axis. For a linear<br />
x-axis in time, switch to CW time mode (or sweep a single band).<br />
1 O-22 <strong>Service</strong> Key Menus and Error Messages
The Main ADC<br />
The main ADC is located on the A1~~~digita.l IF assembly and makes voltage<br />
::: ;:: .;< b :
Analog In Menu<br />
Select this menu to monitor voltage and frequency nodes, using the analog bus<br />
and internal counter, as explained below.<br />
lb switch on the analog bus and access the analog in menu, press:<br />
‘I’he ~~~~~,~~~~~~~~~~~ key toggles between low and high resolution.<br />
.,<br />
R4%3OlIltiOIl -SW MiIlimnm8ignal<br />
LOW +0.5 v -0.5 v<br />
HIGH +lOV -10 v<br />
~~~~~~~~~~~ &lows you to monitor the adog bus nodes (except nodes<br />
1, 2, 3, 4, 9, 10, 12) with external equipment (osciIloscope,<br />
voltmeter, etc). To do this, connect the equipment to the<br />
AUX<br />
_<br />
INPUT<br />
-:..::;).,<br />
BNC . . . . . . connector . . . . . . . . . . . . . . . . . . . . . . on . . . . the rear panel, and press<br />
~~~~;~ stilly is highlighted.<br />
_.._........ - ,<br />
Caution To prevent damage to the analyzer, Ilrst connect the signal to<br />
the rear panel AUX INPUT, and then switch the function ON.<br />
switches the internal counter off and removes the counter<br />
display from the display. The counter can be switched on<br />
with one of the next three keys. (Note: Using the counter<br />
slows the sweep.) The counter bandwidth is 16 MHz unless<br />
otherwise noted for a specific node.<br />
Note OUTPCNTR is the <strong>HP</strong>-IB command to output the counter’s<br />
frequency data.<br />
1 O-24 <strong>Service</strong> Key Menus and Error Messages
switches the counter to monitor the analog bus.<br />
switches the counter to monitor the Al4 fractional-N<br />
VCO frequency at the node shown on the “Overall Block<br />
Diagram, m in the “Start Troubleshooting” chapter.<br />
switches the counter to monitor the Al4 fractional-N VCO<br />
frequency after it has been divided down to 100 kHz for<br />
phase locking the VCO.<br />
ServiseKeyMenusandErrorMessages lo-26
Analog Bus Nodes<br />
The following paragraphs describe the 31 analog bus nodes. The nodes are listed<br />
in numerical order and are grouped by assembly. Refer to the “Overall Block<br />
Diagram” for node locations.<br />
A3 Source<br />
‘Ib observe six of the eight A3 analog bus nodes (not node 5 or 8), perform<br />
step A3 to set up a power sweep on the analog bus. Then follow the node<br />
specific instructions.<br />
1 O-26 <strong>Service</strong> by Menus and Error Messages
Node 1 Bh Fwr DAC (main power DAC)<br />
Perform step A3 to set up a power sweep on the analog bus. Then press m<br />
,..,.,,..;.<br />
dklJ&ti# J$ fg Ixl) (Scale) .~~~~~~.<br />
Node 1 is the output of the main power DAC. It sets the reference voltage to the<br />
ALC loop. At normal operation, this node should read approximately -4 volts at<br />
0 dBm with a slope of about -150 mV/dB. This corresponds to approximately<br />
4 volts from -15 to + 10 dBm.<br />
START -15 B dh cw 3 888.088 am PtHZ STOP IB 0 am<br />
sg6262d<br />
Figure 10-4. Analog Bus Node 1<br />
<strong>Service</strong> Key Menus and Error Messages 1 O-27
Node 2 Src lV/GHz (source 1 volt per GHz)<br />
Press the following to view analog bus node 2:<br />
Node 2 measures the voltage on the internal voltage controlled oscillator. Or, in<br />
normal operation, it should read -lV/GHz.<br />
W-28 <strong>Service</strong> Key Menus and Error Messages<br />
sg6263d<br />
Figure 10-5. Analog Bus Node 2
Node 3 Amp Id (ampltier current)<br />
Press the following keys to view analog node 3:<br />
Node 3 measures the current that goes to the main IF amplifier. At normal<br />
operation this node should read about:<br />
15 mA from 30 kHz to 299 kHz<br />
130 mA from 300 kHz to 3 GHz<br />
500 mA from 3 GHz to 6 GHz<br />
<strong>Service</strong> Key Menus and Error Messages 1 O-29
Node 4 Det (detects RF OUT power level)<br />
Perform step A3, described previously, to set up a power sweep on the analog<br />
Node 5 lkmp (temperature sensor)<br />
This node registers the temperature of the cavity oscillator which must be<br />
known for effective spur avoidance. The sensitivity is 10 mV/” C. The oscillator<br />
changes frequency slightly as its temperature changes. This sensor indicates the<br />
temperature so that the frequency can be predicted.<br />
Node 6 Integ (ALC leveling integrator output)<br />
Perform ..?... ,;.? ,.=; step
Node 7 Log (log ampliiier output detector)<br />
Perform step .:::: A3 to set up a power sweep on the analog bus. Then press LMeas)<br />
.:.. :,::: :::,::::::,::.,..::,~~ ,. ‘;:~~p;$~~: p’<br />
:~~~~.~.~~~~~ :~~.~;;:.:.:.~~~.:.~.:,..~ _i iii .,.,.,.,.,...,...,....,., ._ @ (XJ @izzTq ~~~~~~~~~:.<br />
Node 7 displays the output of a logger circuit in the ALC loop. The trace should<br />
be a linear ramp with a slope of 33 mv/dB with approximately 0 volts at<br />
-3 dBm. Absolute voltage level variations are normal. Flat segments indicate<br />
ALC saturation and should not occur between -15 dBm and + 10 deem.<br />
The proper waveform at node 7 indicates that the circuits in the A3 source ALC<br />
loop are normal and the source is leveled.<br />
Node 8 A3 Gnd (ground)<br />
1 O-32 <strong>Service</strong> Key Menus and Error Messages<br />
t i i i i i i i i i 1<br />
sg6267d<br />
Figure 10-9. Analog Bus Node 7
AlODigitalIF<br />
‘Ib observe the A10 analog bus nodes, perform step AlO, below. Then follow the<br />
node-specific instructions<br />
Step AlO.<br />
Press:<br />
Node9 +0.37 V(+O.37 V reference)<br />
.~,,‘....:..~:...:.:.:....~I.~:~:.:.’ . . . . . ::.::.:.:::.: ;..: i~.~.~.~.~.~.~ ~:::::<br />
Perform<br />
;<br />
step AlO, above, and then press IMeas) ~~~~~~~~~:<br />
Check for a flat line at approximately + 0.37 V. This is used as the voltage<br />
reference in the “Analog Bus Correction Constants” adjustment procedure. The<br />
voltage level should be the same in high and low resolution; the absolute level is<br />
not critical.<br />
Node10 +2.50 V(+2.50 V reference)<br />
<strong>Service</strong> Key Menus and Error Messages lo-33
Node 11 Aux Input (rear panel input)<br />
. . . .<br />
Perform step A10 and then press (Meas) -#JAI,Zi$.@# (iJ (TJ (ZJ.<br />
This selects the rear panel AUX INPUT to drive the analog bus for voltage<br />
and frequency measurements It can be used to look at test points within the<br />
instrument, using the analyzer’s display as an oscilloscope. Connect the test<br />
point of interest to the rear panel AUX INPUT BNC connector.<br />
This feature can be useful if an oscilloscope is not available. Also, it can be used<br />
for testing voltage-controlled devices by connecting the driving voltage of the<br />
device under test to the AUX IN connector. Look at the driving voltage on one<br />
display channel, while displaying the S-parameter response of the test device on<br />
the other display channel.<br />
_ _ . . . . . _ . .<br />
With - .JKK&&%EY ,,.:.:::. * - . . :::: . . . . . . . . . . %.,., . . . . . . . . . . . switched ON, you can examine the analyzer’s analog bus nodes<br />
with eaem& equipment (see ~~~~~‘~~~<br />
-.-._...-._........i. 1..........._..... >..A.: .<br />
&f$~;<br />
. . .
Node 14 Mb Ref (ECL reference voltage level)<br />
. . . . . ..,.:.. .:::: :.:.:.:.::.. . . . .._ : / .s.:..<br />
Perform step Al 1 and then press IMeas) $&$$X&$ rmr” (141 a w @ Ixl]<br />
... ;:c,: . . .
Node 15 Pretune (open-loop source pretune voltage)<br />
This node displays the source pretune signal and should look like a stair-stepped<br />
ramp. Each step corresponds to the start of a band.<br />
1046 <strong>Service</strong> Key Menus and Error Messages<br />
Figure 10-11. Analog Bus Node 15
Node 16 lV/GHz (source oscillator tuning voltage)<br />
. . . . . . . i . . . . . . .::::. . . . .<br />
Perform step A11 and then press m .. ‘$@&$%:Z# . . . . Li . . i::::.:._;;~ ... . . ~.~.C.Z ....... . . . (161 @J (Z&TZ]<br />
. iimo@m.<br />
. . . . . Li i . . . . . . . . . . . ;2<br />
This node displays the tuning voltage ramp used to tune the source oscillator.<br />
You should see a voltage ramp like the one shown in Figure 10-12. If this<br />
waveform is correct, you can be confident that the All phase lock assembly,<br />
the A3 source assembly, the A13/A14 fractional-N assemblies, and the A7 pulse<br />
generator are working correctly and the instrument is phase locked. If you see<br />
anything else, refer to the “Source Troubleshooting” chapter.<br />
sg6270d<br />
Figure 16-12. Analog Bus Node 16<br />
<strong>Service</strong> Key Menus and Error Messages 1037
Node 17 1st IF (IF used for phase lock)<br />
Vary the frequency and compare the results to the table below.<br />
Entered Frequency Counter Reading<br />
I<br />
0.2 to 15.999 MHz same as entered<br />
16MHzto6GHz 1MI-h<br />
This node displays the IF frequency (see node17) as it enters the All phase lock<br />
assembly via the A4 R sampler assembly. This signal comes from the R sampler<br />
output and is used to phase lock the source.<br />
1 O-38 <strong>Service</strong> Key Menus and Error Messages<br />
sg6271 d<br />
Figure 10-13. Counter Readout Location
Node 18 IF Det 2N (IF on All phase lock after 3 MHz filter)<br />
Perform step A11 and then press B ~~~~~:~~~ L18) (xl) m L20) m<br />
(j-Ref_J ~~~~~~~<br />
.._................... i < ::.<br />
This node detects the IF within the low pass IIIter/iimiter. The IiIter is used<br />
during the track and sweep sequences but never in band l(3.3 to 16 MHz). The<br />
low level (about -1.7 V) means IF is in the passband of the 6Iter. This node can<br />
be used with the FRAC N TUNE and SRC TUNE service modes.<br />
sg6272d<br />
Figure 19-14. Analog Bus Node 18<br />
Node 19 IF Det 2W (IF after 16 MHz IUter)<br />
This node detects IF after the 16 MHz fiIter/iimiter. The 6Iter is used during<br />
pretune and acquire, but not in band 1. Normal state is a flat Iine at about<br />
-1.7 v.<br />
<strong>Service</strong> Key Menus and Error Messages 1 O-38
Node 20 IF Det 1 (IF after 30 MHz filter)<br />
. . . . . . . . . . . . .. ...:. i . . . . . _ . _ _ _ ,..<br />
perfvrm step A11 and then press (Meas) - ,~~~~~~~~~~~ .._ - .____..__............... (YZJ @ I&ZTG) @ Ixl)<br />
::~~~~~~~~ m a).<br />
- .._. :..:...: ............. ~.:.:
Node 21 100 kH2 (100 kH2 reference frequency)<br />
Perform step Al2 and then press (EJJ .._.............._.................. ~~~~~~~:~~~.~~ .: .._ L21) Lxl)<br />
- ~~~~~.~~~~~~ .._......_.......................................... I i:.... i.......:... .
Node 24 2nd LO<br />
perform step A12 ad then press m ~~~~~~~~~~ (241@<br />
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. i,,_ . . . . . . _ __....,._ :.~:.:.:.~<br />
This node counts the 2nd LO used by the sampler/mixer assemblies to produce<br />
the 2nd IF of 4 kHz. As you vary the frequency, the counter reading should<br />
change to values very close to those indicated below:<br />
1 F’reqnency Entered 1 CounterReading )<br />
Node 25 PL Ref (phase lock reference)<br />
perform step A12 ad then press m ~~~~~~~~ 125) Lxl]<br />
.._; _<br />
~~~~~,~~~~~~~: LMenu) ~~~~~~~~,.<br />
L .._............ ii... .:::: .:. . . . . :.._ s.<br />
This node counts the reference signal used by the phase comparator circuit on<br />
the All phase lock assembly. As you vary the frequency, the counter reading<br />
should change as indicated below:<br />
1042 <strong>Service</strong> Key Menus and Error Messages
Node 26 Ext l&f (rear panel external reference input)<br />
Perform step Al2 and then press B &@@~ :Ihl 126) Lxl).<br />
The voltage level of this node indicates whether an external reference timebase<br />
is being used:<br />
� No external reference: about -0.9 V<br />
� With external reference: about -0.6 V.<br />
Node 27 VCXO Tune (40 MHz VCXO tuning voltage)<br />
Perform step Al2 and then press IMeas) _.......................................~. :;~~~~~..~~ i i L27) @ cj)<br />
...... ..;. * .% /....................... _., .,__<br />
&&&& ” - “#g&f&? %<br />
:::: . . . . . . . . . . . :.:..>+% ..__ 2 ./ ._._ .;...:. T.... ;.s - i.... -s: I i ./ ..Y.... :..<br />
This node displays the voltage used to fine tune the Al2 reference VCXO to<br />
40 MHz. You should see a flat line at some voltage level (the actual voltage level<br />
varies from instrument to instrument). Anything other than a flat line indicates<br />
that the VCXO is tuning to different frequencies. Refer to the “Frequency<br />
Accuracy” adjustment procedure.<br />
Node 28 Al2 Gnd 2 (Ground reference)<br />
Al4 Fractional-N (Digital)<br />
lb observe the Al4 analog bus nodes perform step A14, below. Then follow the<br />
node-specific instructions.<br />
Step A14.<br />
Press:<br />
<strong>Service</strong> Key Menus and Error Messages 1043
Node 29 FN VU3 Tun (Al4 FN VCO tuning voltage)<br />
_ _ _ / . . . . . . . . . .:..<br />
Perform step Al4 and then press LMeas) ~~~~~~~‘;;~# (29) @J c-1<br />
~~~~~~~<br />
Observe the Al4 F’N VCO tuning voltage. If the Al3 and Al4 assemblies are<br />
functioning correctly and the VCO is phase locked, the trace should look Iike<br />
Figure 10-17. Any other waveform indicates that the FN VCO is not phase<br />
locked. The vertical lines in the trace indicate the band crossings. (The counter<br />
can also be enabled to count the VCO frequency in CW mode.)<br />
1044 <strong>Service</strong> Key Menus and Error Messages<br />
sg6274d<br />
Figure 10-17. Analog Bus Node 29
Node 30 FN VC0 Det (Al4 VC0 detector)<br />
See whether the F’N VCO is oscillating. The trace should resemble Figure 10-18.<br />
sg6275d<br />
Figure 10-18. Analog Bus Node 30<br />
Node 31 Count Gate (analog bus counter gate)<br />
You should see a flat line at + 5 V across the operating frequency range. The<br />
counter gate activity occurs during bandswitches, and therefore is not visible<br />
on the analog bus. To view . . . . the . . . . . . . . . . . . . . . . . bandswitch activity, @ok at..$is node on an<br />
oscilloscope, using ~~~~~~~~. Refer to ~~~~~~~~~.-~~~~~~ mder the Analog<br />
. . . .L......... . .<br />
. . . . . . ..L . .. . ..A .A? . . . ..w................ . .,.,,.. A.A... :.:.:,.;: ,.,. i .,.,.,.,.,.~.,.,.,.,.,.~.,. i ,.,.,.~....... i . . . n . . . . . . _ . . _ _,,.,.,.,.,.,.,.,.,.,,/._i<br />
Bus Menu heading.<br />
<strong>Service</strong> Key Menus and Error Messages 1045
PEEK/POKE Menu<br />
m acceSS tl& menu, press Csystem_l ~~~:~~~~~~r, ~p.&@~~<br />
:........: 2.: .: i::::::: ;;....~.~~~.~~.~;.;;~..:: ,... ‘. z . ../ ?Z
Firmware Revision Softkey<br />
_.., ..,<br />
Ress ~'~~~~~~~,~~~ ~~~~~,~~~~,~~~~to &play the current<br />
.//. I..i./........ ;.............................~..ii..~~..~~~...~ ..A. .:... ._._..........................-...................-..........-..-..............<br />
flrmware revision information. The number and implementation date appear<br />
in the active entry area of the display as shown in Figure lo-19 below. The<br />
analyzer’s serial number and installed options are also displayed. Another way<br />
to display the Grmware revision information is to cycle the line power.<br />
I REFO dB<br />
START .030 000 MHz STOP 6 000.000 000 MHz<br />
dg632e<br />
Figure 10-19. Location of Firmware Revision Information on Display<br />
<strong>Service</strong> Key Menus and Error Messages 1047
<strong>HP</strong>-IB <strong>Service</strong> Mnemonic Definitions<br />
Ah service routine keystrokes can be made through <strong>HP</strong>-IB in one of the<br />
following approaches:<br />
w sending equivalent remote <strong>HP</strong>-IB commands. (Mnemonics have been<br />
documented previously with the corresponding keystroke.)<br />
� invoking the System Menu (MENUSYST) and using the analyzer mnemonic<br />
(SCFTn), where “nn represents the softkey number. (Softkeys are<br />
numbered 1 to 8 from top to bottom.)<br />
An <strong>HP</strong>-IB overview is provided in the “Compatible Peripherals” chapter in<br />
the User’s ouide. <strong>HP</strong>-IB programming information is also provided in the<br />
Programming <strong>Guide</strong>.<br />
Invoking Tests Remotely<br />
Many tests require a response to the displayed prompts. Since bit 1 of the Event<br />
Status Register B is set (bit 1 = service routine waiting) any time a service<br />
routine prompts the user for an expected response, you can send an appropriate<br />
response using one of the following techniques:<br />
� Read event status register B to reset the bit.<br />
� Enable bit 1 to interrupt (ESNB[D]). See “Status Reporting” in the<br />
Programming <strong>Guide</strong>.<br />
w Respond to the prompt with a TESRn command (see Tests Menu, at the<br />
beginning of this chapter).<br />
Symbol Conventions<br />
[I An optional operand<br />
D A numericaI operand<br />
A necessary appendage<br />
I<br />
An either/or choice in appendages<br />
1048 <strong>Service</strong> Key Menus and Error Messages
Analog Bus Codes<br />
OUTPCNTR<br />
OUTPERRO<br />
OUTPTESS<br />
TST?<br />
Measures and displays the analog input. The preset state<br />
input to the analog bus is the rear panel AUX IN. The other<br />
30 nodes may be selected with ip., only if the AEKJS is<br />
enabled (ANABon).<br />
Outputs the counter’s frequency data.<br />
Reads any prompt message sent to the error queue by a<br />
service routine.<br />
Outputs the integer status of the test most recently<br />
executed. Status codes are those listed under “TST?“.<br />
Executes the power-on self test (internal test 1) and<br />
outputs an integer test status. Status codes are as follows:<br />
0 =pass<br />
1 =fail<br />
2 =in progress<br />
3 =not available<br />
4 =not done<br />
5 =done<br />
<strong>Service</strong> Key Menus and Error Messages 1049
Error Messages<br />
This section contains an alphabetical list of the error messages that pertain to<br />
servicing the analyzer. The information in the list includes explanations of the<br />
displayed messages and suggestion to help solve the problem.<br />
Note The error messages that pertain to measurement applications<br />
are included in the <strong>HP</strong> <strong>8753E</strong> <strong>Network</strong> Anulgzer User’s <strong>Guide</strong>.<br />
BATTERY FAILED. STATE MEMORY CLEARED<br />
Error Number The battery protection of the non-volatile SRAM memory has<br />
183 failed. The SRAM memory has been cleared. Refer to the<br />
“Assembly Replacement and Post-Repair Procedures” chapter<br />
for battery replacement instructions See the “Preset State and<br />
Memory Allocation, n chapter in the <strong>HP</strong> 87533 <strong>Network</strong> Anulgm<br />
User’s <strong>Guide</strong> for more information about the SRAM memory.<br />
BATTERY LOW! STORE SAVE REGS TO DISK<br />
Error Number The battery protection of the non-volatile SRAM memory is in<br />
184 danger of failing. If this occurs, all of the instrument state<br />
registers stored in SRAM memory will be lost. Save these states<br />
to a disk and refer to the “Assembly Replacement and<br />
Post-Repair Procedures” chapter for battery replacement<br />
instructions. See the “Preset State and Memory Allocation,”<br />
chapter in the <strong>HP</strong> <strong>8753E</strong> <strong>Network</strong> Anulgzer User’s <strong>Guide</strong> for<br />
more information about the SRAM memory.<br />
CALIBRATION ABORTED<br />
Error Number You have changed the active channel during a calibration so the<br />
74 calibration in progress was terminated. Make sure the<br />
appropriate channel is active and restart the calibration.<br />
1 O-50 <strong>Service</strong> Ksy Menus and Error Messages
CALIBRATION REQUIRED<br />
Error Number A calibration set could not be found that matched the current<br />
63 stimulus state or measurement parameter. You will have to<br />
perform a new calibration.<br />
CORRECTION CONSTANTS NOT STORED<br />
Error Number A store operation to the EEPROM was not successful. You must<br />
3 change the position of the jumper on the A9 CPU assembly.<br />
Refer to the “A9 CC Jumper Position Procedure” in the<br />
“Adjustments and Correction Constants” chapter.<br />
CORRECTION TURNED OFF<br />
Error Number Critical parameters in your current instrument state do not<br />
66 match the parameters for the calibration set, therefore<br />
correction has been turned off. The critical instrument state<br />
parameters are sweep type, start frequency, frequency span,<br />
and number of points<br />
CURRENT PARAMETER NOT IN CAL SET<br />
Error Number Correction is not valid for your selected measurement<br />
64 parameter. Either change the measurement parameters or<br />
perform a new calibration.<br />
DEADLOCK<br />
Error Number A fatal hrmware error occurred before instrument preset<br />
111 completed.<br />
<strong>Service</strong> Key Menus and Error Messages 1 O-51
DEVICE:noton,notconnect, wrong addrs<br />
Error Number The device at the selected address cannot be accessedbythe<br />
119 analyzer. Verify that the device is switched on, and check the<br />
<strong>HP</strong>-IB connection between the analyzer and the device. Ensure<br />
that the device address recognized by the analyzer matches the<br />
<strong>HP</strong>-IB address set on the device itself.<br />
DISK HARDWARE PROBLEM<br />
Error Number The disk drive is not responding correctly. Refer to the disk<br />
39 drive operating manual.<br />
DISK MESSAGE LENGTH ERROR<br />
Error Number The analyzer and the external disk drive aren’t communicating<br />
190 properly. Check the <strong>HP</strong>43 connection and then try substituting<br />
another disk drive to isolate the problem instrument.<br />
DISK:noton,not connected, wrong addrs<br />
Error Number The disk cannot be accessed by the analyzer. Verify power to<br />
38 the disk drive, and check the <strong>HP</strong>-B3 connection between the<br />
analyzer and the disk drive. Ensure that the disk drive address<br />
recognized by the analyzer matches the <strong>HP</strong>-IB address set on<br />
the disk drive itself.<br />
1 O-52 <strong>Service</strong> Key Menus and Error Messages
DISK READ/WRITE ERROR<br />
Error Number There may be a problem with your disk. Try a new floppy disk.<br />
189 If a new floppy disk does not eliminate the error, suspect<br />
hardware problems.<br />
INITIALIZATION FAILED<br />
Error Number The disk initialization failed, probably because the disk is<br />
47 damaged.<br />
INSUFFICIENTMEMORY,PURMTRCAL OFF<br />
Error Number There is not enough memory space for the power meter<br />
154 calibration array. Increase the available memory by clearing one<br />
or more save/recall registers, or by reducing the number of<br />
points<br />
NO CALIBRATION CURRENTLY I N PROGRESS<br />
Error Number The ~~~~~~~~~~~; softkey is not valid unless a<br />
_ _i .,.,.,.,.,.,.,.,...,.,......,.,.,.,.,.,.,.,.,. _ _ _ _ i.,i . . . . . . . . i . . . . . . . _<br />
69 calibration is already in progress. Start a new calibration.<br />
NOTENOUGHSPACEONDISKFORSTORE<br />
Error Number The store operation will overflow the available disk space.<br />
44 Insert a new disk or purge files to create free disk space.<br />
<strong>Service</strong> Key Menus and Error Messages 1 O-53
NO FILE(S) FOUND ONDISK<br />
Error Number No files of the type created by an analyzer store operation were<br />
45 found on the disk. If you requested a specific hle title, that hle<br />
was not found on the disk.<br />
NO IF FOUND: CHECK R INPUT LEVEL<br />
Error Number The first IF signal was not detected during pretune. Check the<br />
5 front panel R channel jumper. If there is no visible problem<br />
with the jumper, refer to the “Source Troubleshooting” chapter.<br />
NO PHASE LOCK: CHECK R INPUT LEVEL<br />
Error Number The tist IF signal was detected at pretune, but phase lock could<br />
7 not be acquired. Refer to the “Source Troubleshooting” chapter.<br />
NO SPACE FOR NEW CAL. CLEAR REGISTERS<br />
Error Number You cannot store a calibration set due to insufficient memory.<br />
70 You can free more memory by clearing a saved instrument state<br />
from an internal register (which may also delete an associated<br />
calibration set, if all the instrument states using the calibration<br />
kit have been deleted.) You can store the saved instrument state<br />
and calibration set to a disk before clearing them. After deleting<br />
the instrument states, press w to run the memory packer.<br />
1 O-54 <strong>Service</strong> Key Menus and Error Messages
NOT ALLOWED DURING POWER METER CAL<br />
Error Number When the analyzer is performing a power meter calibration, the<br />
198 <strong>HP</strong>-IB bus is unavailable for other functions such as printing or<br />
plotting.<br />
OVER LOAD ON INPUT A, POWER REDUCED<br />
Error Number See error number 57.<br />
58<br />
OVER LOAD ON INPUT B, POWER REDUCED<br />
Error Number See error number 57.<br />
59<br />
OVER LOAD ON INPUT R, POWER REDUCED<br />
Error Number You have exceeded approximately + 14 dBm at one of the test<br />
57 ports, The RF output power is automatically reduced to<br />
-85 dBm. The annotation PJL appears in the left margin of the<br />
display to indicate that the power trip function has been<br />
activated. When this occurs, reset the power to a lower level,<br />
aen toggle the ~~~-~~~~~:~~~~~~ softkey to sMtch on Q,e<br />
_ . . ..i . . . . _ . . . . . . _ .,.,. .~ _,_ L,,,>>>B ,.,.: .,.,. _ _ i _ z.:.z.:.:.u.<br />
power again.<br />
PARALLEL PORT NOT AVAILABLE FOR GPIO<br />
Error Number You have dellned the parallel port as COPY for sequencing in<br />
165 the <strong>HP</strong>-IB menu. ‘lb access the parallel port for general purpose<br />
I/O (GPIO), set the selection to [GPIO].<br />
<strong>Service</strong> Key Menus and Error Messages lo-55
PARALLEL PORT NOT AVAILABLE FOR COPY<br />
Error Number You have dellned the parallel port as general purpose I/O (GPIO)<br />
167 for sequencing. The definition was made under the (Local key<br />
menus. To access the pamIle port for copy, set the selection to<br />
~~~~:~~:.~~<br />
. . . . . . . . . i I:: ,.,,, .~~.~~~~,;~;. .” -<br />
PHASE LOCK CAL FAILED<br />
Error Number An internal phase lock calibration routine is automatically<br />
4 executed at power-on, preset, and any time a loss of phase lock<br />
is detected. This message indicates that phase lock calibration<br />
was initiated and the first IF detected, but a problem prevented<br />
the calibration from completing successfully. Refer to Chapter<br />
3, “Adjustments and Correction Constants” and execute pretune<br />
correction (test 48).<br />
This message may appear if you connect a mixer between the<br />
RF’ output and R input before turning on frequency offset mode.<br />
Ignore it: it will go away when you turn on frequency offset.<br />
This message may also appear if you turn on frequency offset<br />
mode before you define the offset.<br />
PHASE LOCK LOST<br />
Error Number Phase lock was acquired but then lost. Refer to the “Source<br />
8 Troubleshooting” chapter.<br />
1 O-56 <strong>Service</strong> Key Menus and Error Messages
POSSIBLE FALSE LOCK<br />
Error Number Phase lock has been achieved, but the source may be phase<br />
6 locked to the wrong harmonic of the synthesizer. Perform the<br />
source pretune correction routine documented in the<br />
“Adjustments and Correction Constants” chapter.<br />
POWER METER INVALID<br />
Error Number The power meter indicates an out-of-range condition. Check the<br />
116 test setup.<br />
POWER METER NOT SETTLED<br />
Error Number Sequential power meter readings are not consistent. Verify that<br />
118 the equipment is set up correctly. If so, preset the instrument<br />
and restart the operation.<br />
POWER SUPPLY HOT!<br />
Error Number The temperature sensors on the A8 post-regulator assembly<br />
21 have detected an over-temperature condition. The power<br />
supplies regulated on the post-regulator have been shut down.<br />
Refer to the “Power Supply Troubleshooting” chapter.<br />
POWER SUPPLY SHUT DOWN!<br />
Error Number One or more supplies on the A8 post-regulator assembly have<br />
22 been shut down due to an over-current, over-voltage, or<br />
under-voltage condition. Refer to the “Power Supply<br />
Troubleshooting” chapter.<br />
<strong>Service</strong> Key Menus and Error Messages 1 O-57
POWER UNLEVELED<br />
Error Number There is either a hardware failure in the source or you have<br />
179 attempted to set the power level too high. Check to see if the<br />
power level you set is within specillcations. If it is, refer to the<br />
“Source Troubleshooting” chapter. You will only receive this<br />
message over the <strong>HP</strong>-IB. On the analyzer, P? is displayed.<br />
PRINTER: error<br />
Error Number The parallel port printer is malfunctioning. The analyzer cannot<br />
175 complete the copy function.<br />
PRINTER: not handshaking<br />
Error Number The printer at the parallel port is not responding.<br />
177<br />
PRINTER: noton, not connected, wrongaddrs<br />
Error Number The printer does not respond to control. Verify power to the<br />
24 printer, and check the <strong>HP</strong>-IB connection between the analyzer<br />
and the printer. Ensure that the printer address recognized by<br />
the analyzer matches the <strong>HP</strong>-B3 address set on the printer itself.<br />
PROBE POWER SHUT DOWN!<br />
Error Number The analyzer biasing supplies to the <strong>HP</strong> 85024A external probe<br />
23 are shut down due to excessive current. Troubleshoot the<br />
probe, and refer to the “Power Supply Troubleshooting” chapter.<br />
1 O-56 <strong>Service</strong> Key Menus and Error Messages
PWR MTR: NOT ON/CONNECTED OR WRONG ADDRS<br />
Error Number The power meter cannot be accessed by the analyzer. Verify<br />
117 that the power meter address and model number set in the<br />
analyzer match the address and model number of the actual<br />
power meter.<br />
SAVE FAILED. INSUFFICIENT MEMORY<br />
Error Number You cannot store an instrument state in an internal register due<br />
151 to insufficient memory. Increase the available memory by<br />
clearing one or more save/recall registers and pressing m, or<br />
by storing files to a disk.<br />
SELFTFST #n FAILED<br />
<strong>Service</strong> Error Internal test #n has failed. Several internal test routines are<br />
Number 112 executed at instrument preset. The analyzer reports the first<br />
failme detected. Refer to the internal tests and the<br />
self-diagnose feature descriptions earlier in this chapter.<br />
SOURCEPOWERTLJRNElDOFF, RESET UNDER POWERMENU<br />
Information You have exceeded the maximum power level at one of the<br />
Message inputs and power has been automatically reduced. The<br />
annotation P+ indicates that power trip has been activated.<br />
When this occurs, reset the power and then press LMenu) &J@<br />
.~~~~~:.~~~~~~~~~~.<br />
. . . . . . ;.;,.,.,.,; . . . . . . . . .:: . . .. . . . . . . . . . . . . . . . .::::. . . . . . . . . . . . . . . . . . .<br />
,,......... . . . . . .;... . . . . . . . . . . . . . . . . . .<br />
t to sdtc., on the power. This message<br />
follows error numbers 57, 58, and 59.<br />
<strong>Service</strong> Key Menus and Error Messages lo-59
SWEEP MODE CHANGED TO CW TIME SWEEP<br />
Error Number If you select external source auto or manuai instrument mode<br />
187 and you do not also select CW mode, the anaIyzer is<br />
automatically switched to CW.<br />
TEST ABORTED<br />
Error Number You have prematurely stopped a service test.<br />
113<br />
TROUBLE! CHECK SETUP AND START OVER<br />
<strong>Service</strong> Error Your equipment setup for the adjustment procedure in progress<br />
Number 115 is not correct. Check the setup diagram and instructions in the<br />
“Adjustments and Correction Constants” chapter. Start the<br />
procedure again.<br />
WRONG DISK FORMAT, INITIALIZE DISK<br />
Error Number You have attempted to store, load, or read hle titles, but your<br />
77 disk format does not conform to the Logical Interchange Format<br />
(LIF). You must initialize the disk before reading or writing to it.<br />
lo-60 <strong>Service</strong> Key Menus and Error Massages
Error lkrms<br />
The analyzer generates and stores factors in internal arrays when a<br />
measurement error-correction (measurement calibration) is performed. These<br />
factors are known by the following terms:<br />
� error terms<br />
� E-terms<br />
� measurement calibration coefficients<br />
11<br />
The analyzer creates error terms by measuring well-deflned calibration devices<br />
over the frequency range of interest and comparing the measured data with the<br />
ideal model for the devices The differences represent systematic (repeatable)<br />
errors of the analyzer system. The resulting calibration coefficients are good<br />
representations of the systematic error sources. For details on the various levels<br />
of error-correction, refer to the “Optimizmg Measurement Results” chapter of<br />
the <strong>HP</strong> <strong>8753E</strong> <strong>Network</strong> Anulger User’s <strong>Guide</strong>. For details on the theory of<br />
error-correction, refer to the “Application and Operation Concepts” chapter of<br />
the <strong>HP</strong> <strong>8753E</strong> <strong>Network</strong> Anulgm User’s <strong>Guide</strong>.<br />
Error YLlxms Can Also Serve a Diagnostic Purpose<br />
Specific parts of the analyzer and its accessories directly contribute to the<br />
magnitude and shape of the error terms Since we know this correlation and we<br />
know what typical error terms look like, we can examine error terms to monitor<br />
system performance (preventive maintenance) or to identify faulty components<br />
in the system (troubleshooting).<br />
� Preventive Maintenance: A stable, repeatable system should generate<br />
repeatable error terms over long time interval% for example, six months<br />
If you make a hardcopy record (print or plot) of the error terms, you can<br />
periodically compare current error terms with the record. A sudden shift in<br />
error terms reflects a sudden shift in systematic errors, and may indicate<br />
the need for further troubleshooting. A long-term trend often reflects drift,<br />
Error Terms 11-l
connector and cable wear, or gradual degradation, indicating the need for<br />
further investigation and preventive maintenance. Yet, the system may still<br />
conform to specifications. The cure is often as simple as cleaning and gaging<br />
connectors or inspecting cables.<br />
� Troubleshooting: If a subtle failme or mild performance problem is<br />
suspected, the magnitude of the error terms should be compared against<br />
values generated previously with the same instrument and calibration kit.<br />
This comparison will produce the most precise view of the problem.<br />
However, if previously generated values are not available, compare the<br />
current values to the typical values listed in Table 11-2, and shown graphically<br />
on the plots in this chapter. If the magnitude exceeds its limit, inspect the<br />
corresponding system component. If the condition causes system verification<br />
to fail, replace the component.<br />
Consider the following while troubleshooting:<br />
� All parts of the system, including cables and calibration devices, can<br />
contribute to systematic errors and impact the error terms.<br />
� Connectors must be clean, gaged, and within specification for error term<br />
analysis to be meaningful.<br />
� Avoid unnecessary bending and flexing of the cables following measurement<br />
calibration, minimizing cable instability errors.<br />
� Use good connection techniques during the measurement calibration.<br />
The connector interface must be repeatable. Refer to the “Principles<br />
of Microwave Connector Care” section in the “<strong>Service</strong> Equipment and<br />
<strong>Analyzer</strong> Options” chapter for information on connection techniques and on<br />
cleaning and gaging connectors.<br />
� Use error term analysis to troubleshoot minor, subtle performance problems.<br />
Refer to the “Start Troubleshooting Here” chapter if a blatant failme or<br />
gross measurement error is evident.<br />
� It is often worthwhile to perform the procedure twice (using two distinct<br />
measurement calibrations) to establish the degree of repeatability. If the<br />
results do not seem repeatable, check all connectors and cables.<br />
1 l-2 Error Terms
FuU Two-Port Error-Correction Procedure<br />
Note This is the most accurate error-correction procedure. Since the<br />
analyzer takes both forward and reverse sweeps, this procedure<br />
takes more time than the other correction procedures.<br />
1. Set any measurement parameters that you want for the device<br />
measurement: power, format, number of points, IF bandwidth.<br />
2. To access the measurement correction menus, press:<br />
3. If your calibration kit is different than the kit specified under the<br />
‘T ..,..,:,. :
FOR I SOLAT ION<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
ag,<br />
APC-7<br />
* 24 INCH<br />
LOAD LOAD<br />
* DIRECT CONNECTrON<br />
FOR TRANSMISSION<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
FOR REFLECT I ON<br />
<strong>HP</strong> <strong>8753E</strong><br />
NETWORK ANALYZER<br />
TEST<br />
PORT 2<br />
Figure 11-l. Standard Connections for Full Two-Port Error-Correction<br />
114 Error Terms
6. To measure the standard, when the displayed trace has settled, press:<br />
7.<br />
8.<br />
9.<br />
10.<br />
11.<br />
12.<br />
13.<br />
14.<br />
The analyzer underlines the Bi&$i. softkey after it measures the standard.<br />
.- .._...............<br />
Disconnect the open, and connect a short circuit to PORT 1.<br />
To measure the device, when the displayed trace has settled, press:<br />
: s.. ::::::z.: . . . . . . . ..i .::::...::.r<br />
The analyzer underlines the ~~~~~~ softkey after it measures the standard.<br />
Disconnect the short, and connect an impedance-matched load to PORT 1.<br />
lb measure the standard, when the displayed trace has settled, press:<br />
y ::. . . p .vy<<br />
The analyzer tmderlines the :&&I& softkey after it measures the standard.<br />
Repeat the open-short-load measurement descried above, but connect the<br />
devices h turn to PORT<br />
. . . . . . . . . ..:.. . . . . .::.:... . ::. :: .i i. i ::.:.:... :,. .<br />
2, md use the ~~~~~~~ jj&#&$$ t .) &&!j$<br />
: .-.... :Ai_...<br />
. . . . . . .:. . . . . . ..~.........-......~.....~............~~........... . . . .<br />
9 ;,.,..,,......;;;._,.~.~~~., ___ ?<br />
md ~~~~~ 2. ““““““. :#$s’ ....“‘...’ softkeys<br />
lb compute the reflection correction coefficients, press:<br />
f&n portion of the come&ion, press: ~~~~~~~~~~~~,<br />
‘lb start the transmis<br />
Make a “through” connection between the points where you will connect<br />
your device under test as shown in F’igure 11-l.<br />
Note Include any adapters or cables that you will have in the device<br />
measurement. That is, connect the standard device where you<br />
will connect your device under test.<br />
ErrorTerms 11-5
The analyzer displays the corrected measurement trace. The analyzer<br />
also shows the notation Cor at the left of the screen, indicating that<br />
error-correction is on.<br />
Note You can save or store the measurement correction to use for<br />
later measurements Use the menus under @JEGi$ or refer<br />
to “Printing, Plotting, and Saving Measurement Results” located<br />
in the <strong>HP</strong> 87533 <strong>Network</strong> Anulgger User’s cui&e for procedures.<br />
18. This completes the full two-port correction procedure. You can connect and<br />
measure your device under test.<br />
calibration<br />
Coellleient<br />
WYrEsi<br />
‘lhble 11-l. Calibration CoefKcient ‘lkrms and lksts<br />
calibratioll lhbE<br />
-POand<br />
Isolation*<br />
l-pert<br />
2-pod<br />
xkst<br />
NUDlbC?r<br />
1 &i or% Ex (ED) ED EDF 32<br />
2 ET (Ed ES ESF 33<br />
3 ER ERF 34<br />
4 EXF 36<br />
6 ELF 36<br />
6 ETF 37<br />
7 JbR 33<br />
3 ‘%R 30<br />
0 ERR 40<br />
10 EXR 41<br />
11 ELR 42<br />
12 &l?R 43<br />
Kenning oflirst subscript: D-directivity; S-source match, R-reflection tracking; X-crosstalk;<br />
L-load match; T-transmission tracking.<br />
bleaning of second mhcripk F-forward; R-reverse.<br />
t Response and Isolation cal yields: EX or & if a transmiwion parameter (621, 612) or ED or ER if a<br />
Hlection parameter (%I, 622).<br />
1 One-path, 2-port cal duplicates array8 1 to 6 in 8lT8yB 7 to 12.<br />
Error Terms 1 l-7
Error Term Inspection<br />
Note<br />
i ,,i p”. ..:.,::.. : 1 . . . . . . . .<br />
If the correction is not active, press [call ‘$EJWZ$@# tixU .<br />
The analyzer copies the first calibration measurement trace for the selected<br />
error term into memory and then displays it. Table 11-l lists the test<br />
numbers<br />
2. Press @GiXZj and adjust the scale and reference to study the error term<br />
trace.<br />
3. Press (TFctn) and use the marker functions to determine the error term<br />
magnitude.<br />
4. Compare the displayed measurement trace to the trace shown in the<br />
following “Error Term descriptions” section, and to previously measured<br />
data. If data is not available from previous measurements, refer to the<br />
typical uncorrected performance specifications listed in lhble 11-2.<br />
5. Make a hardcopy of the measurement results:<br />
a. Connect a printing or plotting peripheral to the analyzer.<br />
b. press LLocal) ~~~~~~~~~~~~,; ~~~~~~~~~~~~ and seIect the<br />
i.. *; ..A.... i . . . . . . . . . . 1.... . . . . . . . ./<br />
appropriate peripheral to verify that the <strong>HP</strong>-IR address is set correctly on<br />
the analyzer.<br />
., . . .../<br />
C. Press (-1 a,& aen &00x either !p&$& ..-.-.... ; . . . . . . . ;; . . . . . . ..n...... .<br />
. . . or . . . ~~~~~.<br />
..__.................<br />
- . . _ ~ ,._ . . . . . . . :
If Error Terms Seem Worse than Typical Values<br />
1. Perform a system verification to verify that the system still conforms to<br />
specifications.<br />
2. If system verification fails, refer to “Start Troubleshooting Here. n<br />
Uncorrected Performance<br />
The following table shows typical performance without error-correction. RF<br />
cables are not used except as noted. Related error terms should be within these<br />
values.<br />
DilWtiVi~<br />
Source Match<br />
had Match<br />
Reflection Tracking*<br />
Tranamisaion Tracking*<br />
Croestallr<br />
able 11-2. Uncorrected System Performance<br />
*Deviation from nominal trace wxo8s the frequency range.<br />
Frequency Jlange (GE@<br />
o.ooo3 to 3.0 3.0 to 6.0<br />
SodB 26 dB<br />
16 dB 14 dB<br />
16dB 14 dB<br />
fl.6 dB +0.6 dl3, -2.6 dB<br />
f1.6 dB +0.6 dB, -2.6 dB<br />
OodB SodB<br />
ErrorTerms 114
Error ‘I&m Descriptions<br />
The error term descriptions in this section include the following information:<br />
� significance of each error term<br />
� typical results following a full 2-port error-correction<br />
� guidelines to interpret each error term<br />
The same description applies to both the forward (F’) and reverse (R) terms.<br />
11-10 ErrorTerms
Directivity (EDF and EDR)<br />
Description<br />
Directivity is a measure of any detected power that is reflected when a load<br />
is attached to the test port. These are the uncorrected forward and reverse<br />
directivity error terms of the system. The directivity error of the test port<br />
is determined by measuring the reflection (Sll, S22) of the load during the<br />
error-correction procedure.<br />
S-cant System Components<br />
w load used in the error-correction (calibration)<br />
� test port connectors<br />
� test port cables<br />
Affected Measurements<br />
Low reflection device measurements are most affected by directivity errors.<br />
HI d<br />
i i i i i i i i i I<br />
(4 04 sg632s<br />
Figure 11-2. Typical EDF/EDR without and with Cables<br />
Error Terms 1 l-1 1
Source Match (ESF and ESR)<br />
Description<br />
Source match is a measure of test port connector match, as well as the match<br />
between all components from the source to the test port. These are the forward<br />
and reverse uncorrected source match terms of the driven port.<br />
Signifkant System Components<br />
w load calibration kit device<br />
w open calibration kit device<br />
� short calibration kit device<br />
� bridge<br />
� test port connectors<br />
� bias tees<br />
w step attenuator<br />
� transfer switch<br />
� test port cables<br />
Affected Measurements<br />
Reflection and transmission measurements of highly reflective devices are most<br />
affected by source match errors.<br />
11-12 ErrorTerms<br />
Figure 11-3. Typical ESF/ESB without and with Cables<br />
sg633s
Reflection Tracking (ERF and ERR)<br />
Description<br />
Reflection tracking is the difference between the frequency response of the<br />
reference path (R path) and the frequency response of the reflection test path<br />
(A or B input path).<br />
Significant System Components<br />
� open calibration kit device<br />
� short calibration kit device<br />
� R signal path if large variation in both F,RF’ and ERR<br />
� A or B input paths if only one term is affected<br />
Affected Measurements<br />
All reflection measurements (high or low return loss) are affected by the<br />
reflection tracking errors.<br />
Figure 11-4. Typical EIWERR without and with Cables<br />
Error Terms 11-13
Isolation (Crosstalk, EXF and EXE)<br />
Description<br />
Isolation is a measure of the leakage between the test ports and the signal<br />
paths The isolation error terms are characterized by measuring transmission<br />
(S21, S12) with loads attached to both ports during the error-correction<br />
procedure. Since these terms are low in magnitude, they are usually noisy<br />
(not very repeatable). The error term magnitude changes dramatically with<br />
IF bandwidth: a 10 Hz IF bandwidth must be used in order to lower the noise<br />
floor beyond the crosstalk specification. Using averaging will also reduce the<br />
peak-to-peak noise in this error term.<br />
Significant System Components<br />
w sampler crosstalk<br />
Affected Measurements<br />
Transmission measurements, (primarily where the measured signal level is very<br />
low), are affected by isolation errors. For example, transmission measurements<br />
where the insertion loss of the device under test is large.<br />
Figure 11-5.<br />
Typical EXF/EXR with 10 Hz Bandwidth and with 3 Id& Bandwidth<br />
11.14 Error Terms<br />
sg638s
Load Match (ELF and ELR)<br />
Description<br />
Load match is a measure of the impedance match of the test port that<br />
terminates the output of a 2-port device. Load match error terms are<br />
characterized by measuring the reflection (Sll, S22) responses of a “through”<br />
configuration during the calibration procedure.<br />
SignWant System Components<br />
� “through” cable<br />
� cable connectors<br />
� test port connectors<br />
Affected Measurements<br />
All transmission and reflection measurements of a low insertion loss two-port<br />
devices are most affected by load match errors. Transmission measurements of<br />
lossy devices are also affected.<br />
BTRRT<br />
sg6277d<br />
Figure 11-6. Typical ELF/ELE<br />
Error Terms 11-15
Transmission Tracking (ETF and ETE)<br />
Description<br />
Transmission tracking is the difference between the frequency response of the<br />
reference path (including R input) and the transmission test path (including<br />
A or B input) while measuring transmission. The response of the test port cables<br />
is included. These terms are characterized by measuring the transmission (S21,<br />
S12) of the “through” configuration during the error-correction procedure.<br />
Significant System Components<br />
� R signal path (if both ETF and ETR are bad)<br />
� A or B input paths<br />
� “through” cable<br />
Affected Measurements<br />
All transmission measurements are affected by transmission tracking errors.<br />
11-16 Error Terms<br />
sg6278d<br />
Figure 11-7. Typical ETF/ETR
Theory of Operation<br />
This chapter is divided into two major sections:<br />
� “How the <strong>HP</strong> <strong>8753E</strong> Works” gives a general description of the <strong>HP</strong> <strong>8753E</strong><br />
network analyzer operation.<br />
� “A Close Look at the <strong>Analyzer</strong>’s Functional Groups” provides more detailed<br />
operating theory for each of the analyzer’s functional groups.<br />
How the <strong>HP</strong> <strong>8753E</strong> Works<br />
12<br />
<strong>Network</strong> analyzers measure the reflection and transmission characteristics of<br />
devices and networks. A network analyzer test system consists of the following:<br />
� source<br />
� signal-separation devices<br />
� receiver<br />
� display<br />
The analyzer applies a signal that is either transmitted through the device under<br />
test, or reflected from its input, and then compares it with the incident signal<br />
generated by the swept RF source. The signals are then applied to a receiver for<br />
measurement, signal processing, and display.<br />
The <strong>HP</strong> <strong>8753E</strong> vector network analyzer integrates a high resolution synthesized<br />
RF source, test set, and a dual channel three-input receiver to measure and<br />
display magnitude, phase, and group delay of transmitted and reflected power.<br />
The <strong>HP</strong> <strong>8753E</strong> Option 010 has the additional capability of transforming<br />
measured data from the frequency domain to the time domain. Figure 12-1<br />
is a simplified block diagram of the network analyzer system. A detailed<br />
block diagram of the analyzer is located at the end of Chapter 4, “Start<br />
Troubleshooting Here. n<br />
Theory of Operation 12-l
- c<br />
\<br />
30kHz to 3 or 66HL 30kHr to 3 or MHZ R<br />
I<br />
---a -<br />
SYNTHESIZED TEST RECE I VER DISPLAY<br />
SOURCE AC<br />
SET<br />
piiq<br />
El-<br />
sg623Bd<br />
Figure 12-1. Simplirred Block Diagram of the <strong>Network</strong> <strong>Analyzer</strong> System<br />
The Built-In Synthesized Source<br />
The analyzer’s built-in synthesized source produces a swept RF signal in the<br />
range of 30 kHz to 3.0 GHz. The <strong>HP</strong> <strong>8753E</strong> Option 006 is able to generate<br />
signals up to 6 GHz. The source output power is leveled by an internal ALC<br />
(automatic leveling control) circuit. lb achieve frequency accuracy and phase<br />
measuring capability, the analyzer is phase locked to a highly stable crystal<br />
oscillator.<br />
For this purpose, a portion of the transmitted signal is routed to the R channel<br />
input of the receiver, where it is sampled by the phase detection loop and fed<br />
back to the source.<br />
The Source Step Attenuator<br />
The 70 dB, electro-mechanical, step attenuator contained in the source has very<br />
low loss. It is used to adjust the power level to the device under test without<br />
changing the level of the incident power in the reference path. The user sets<br />
the attenuation levels via the front panel softkeys.<br />
12-2 Theory of Operation
The Built-In lkst Set<br />
The <strong>HP</strong> <strong>8753E</strong> features a built-in test set that provides the signal separation<br />
capability for the device under test, as well as to the signal-separation devices.<br />
The signal separation devices are needed to separate the incident signal from<br />
the transmitted and reflected signals. The incident signal is applied to the R<br />
channel input via an external jumper cable on the front panel. Meanwhile,<br />
the transmitted and reflected signals are internally routed from the test port<br />
couplers to the inputs of the A and B sampler/mixers in the receiver. Port 1 is<br />
connected to the A input and port 2 is connected to the B input.<br />
The test set contains the hardware required to make simultaneous transmission<br />
and reflection measurements in both the forward and reverse directions. A<br />
solid-state transfer switch in the built-in test set allows reverse measurements to<br />
be made without changing the connections to the device under test.<br />
The Receiver Block<br />
The receiver block contains three sampler/mixers for the R, A and B inputs. The<br />
signals are sampled, and down-converted to produce a 4 kHz IF’ (intermediate<br />
frequency). A multiplexer sequentially directs each of the three IF signals to<br />
the ADC (analog to digital converter) where it is converted from an analog to<br />
a digital signal to be measured and processed for viewing on the display. Both<br />
amplitude and phase information are measured simultaneously, regardless of<br />
what is displayed on the analyzer.<br />
The Microprocessor<br />
A microprocessor takes the raw data and performs all the required error<br />
correction, trace math, formatting, scaling, averaging, and marker operations,<br />
according to the instructions from the front panel or over <strong>HP</strong>-IB. The formatted<br />
data is then displayed.<br />
Required Peripheral Equipment<br />
In addition to the analyzer, a system requires calibration standards for vector<br />
accuracy enhancement, and cables for interconnections.<br />
Theory of Operation 123
A Close Look at the <strong>Analyzer</strong>’s Functional Groups<br />
The operation of the analyzer is most logically described in five functional<br />
groups. Each group consists of several major assemblies, and performs a distinct<br />
function in the instrument. Some assemblies are related to more than one<br />
group, and in fact all the groups are to some extent interrelated and affect each<br />
other’s performance.<br />
Power Supply. The power supply functional group consists of the A8 post<br />
regulator and the Al5 preregulator. It supplies power to the other assemblies<br />
in the instrument.<br />
Digital Control. The digital control group consists of the Al front panel and<br />
A2 front panel processor, the A9 CPU, the Al6 rear panel, the Al8 display<br />
and the A19 graphics system processor (GSP). The A10 digital IF assembly is<br />
also related to this group. These assemblies combine to provide digital control<br />
for the analyzer.<br />
Source. The source group consists of the A3 source, A7 pulse generator, All<br />
phase lock, Al2 reference, Al3 fractional-N (analog), and Al4 fractional-N<br />
(digital) assemblies. The A4 sampler is also related since it is part of the<br />
source phase lock loop. The source supplies a phase-locked RF signal to the<br />
device under test.<br />
Signal Separation. The signal separation group performs the function of an<br />
S-parameter test set, dividing the source signal into a reference path and a<br />
test path, and providing connections to the device under test. It consists of<br />
the A24 transfer switch, the A21 test port 1 coupler, and the A22 test port 2<br />
coupler.<br />
Receiver. The receiver group consists of the A4/A5/A6 sampler/mixers and<br />
the A10 digital IF. The Al2 reference assembly and the A9 CPU are also<br />
related. The receiver measures and processes input signals for display.<br />
The following pages describe the operation of each of the functional groups.<br />
124 Theory of Operation
Power Supply Theory<br />
The power supply functional group consists of the Al5 preregulator and the<br />
A8 post regulator. These two assemblies comprise a switching power supply<br />
that provides regulated DC voltages to power all assemblies in the analyzer. The<br />
Al5 preregulator is enclosed in a casting at the rear of the instrument behind<br />
the display. It is connected to the A8 post regulator by a wire bus A15Wl.<br />
Figure 12-2 is a simplified block diagram of the power supply group.<br />
O F F D U R I N G 2’ N O R M A L O P E R A T I O N<br />
\<br />
;ON D U R I N G<br />
N O R M A L O P E R A T I O N<br />
L A L L O N D U R I N G<br />
N O R M A L OPERAlION<br />
sg6105e<br />
Figure 12-2. Power Supply Functional Group, Simplified Block Diagram<br />
Al5 Preregulator<br />
The Al5 preregulator steps down and recti6es the line voltage. It provides a<br />
fully regulated +5 V digital supply, and several preregulated voltages that go to<br />
the A8 post regulator assembly for additional regulation.<br />
The Al5 preregulator assembly includes the line power module, a 60 kHz<br />
switching preregulator, and overvoltage protection for the +5 V digital supply.<br />
It provides LEDs, visible from the rear of the instrument, to indicate either<br />
normal or shutdown status.<br />
Theory of Operation 12-5
Line Power Module<br />
The line power module includes the line power switch, voltage selector switch,<br />
and main fuse. The line power switch is activated from the front panel. The<br />
voltage selector switch, accessible at the rear panel, adapts the analyzer to local<br />
line voltages of approximately 115 V or 230 V (with 350 VA maximum). The<br />
main fuse, which protects the input side of the preregulator against drawing too<br />
much line current, is also accessible at the rear panel. Refer to the<br />
<strong>HP</strong> <strong>8753E</strong> <strong>Network</strong> Anulgzer lhstalhttin and Quick Start <strong>Guide</strong> for line voltage<br />
tolerances and other power considerations.<br />
Preregulated Voltages<br />
The switching preregulator converts the line voltage to several DC voltages. The<br />
regulated +5 V digital supply goes directly to the motherboard. The following<br />
parGaIly regulated voltages are routed through A15Wl to the A8 post regulator<br />
for llnal regulation:<br />
+7OV +25V +18V -18V +8V -8V<br />
Regulated + 6 V Digital Supply<br />
The + 5 VD supply is regulated by the control circuitry in the Al5 preregulator.<br />
It goes directly to the motherboard, and from there to all assemblies requiring<br />
a low noise digital supply. A + 5 V sense line returns from the motherboard to<br />
the Al5 preregulator. The +5 V CPU is derived from the +5 VD in the A8 post<br />
regulator and goes directly to the A19 graphics system processor.<br />
In order for the preregulator to function, the +5 V digital supply must be<br />
loaded by one or more assemblies, and the + 5 V sense line must be working. If<br />
not, the other preregulated voltages will not be correct.<br />
Shutdown Indications: the Green LED and Red LED<br />
The green LED is on in normal operation. It is off when line power is not<br />
connected, not switched on, or set too low, or if the line fuse has blown.<br />
The red LED, which is off in normal operation, lights to indicate a fault in<br />
the +5 V supply. This may be an over/under line voltage, over line current,<br />
or overtemperature condition. Refer to the troubleshooting chapters for more<br />
information.<br />
12-6 Theory of Operation
A8 Post Regulator<br />
The A8 post regulator lllters and regulates the DC voltages received from the<br />
Al5 preregulator. It provides fusing and shutdown circuitry for individual<br />
voltage supplies. It distributes regulated constant voltages to individual<br />
assemblies throughout the instnunent. It includes the overtemperature<br />
shutdown circuit, the variable fan speed circuit, and the air flow detector. Nine<br />
green LEDs provide status indications for the individual voltage supplies<br />
Refer to the Power Supply Block Diagram located at the end of Chapter 5,<br />
“Power Supply Troubleshooting”, to see the voltages provided by the A8 post<br />
regulator.<br />
Voltage Indications: the Green LEDs<br />
The nine green LEDs along the top edge of the A8 assembly are on in normal<br />
operation, to indicate the correct voltage is present in each supply. If they are<br />
off or flashing, a problem is indicated. The troubleshooting procedures later in<br />
this chapter detail the steps to trace the cause of the problem.<br />
Shutdown Circuit<br />
The shutdown circuit is triggered by overcurrent, overvoltage, undervoltage, or<br />
overtemperature. It protects the instrument by causing the regulated voltage<br />
supplies to be shut down. It also sends status messages to the A9 CPU to trigger<br />
warning messages on the analyzer display. The voltages that are not shut down<br />
are the +5 VD and +5 VCPU digital supplies from the preregulator, the fan<br />
supplies, the probe power supplies, and the display supplies. The shutdown<br />
circuit can be disabled momentarily for troubleshooting purposes by using a<br />
jumper to connect the SDIS line (A8TP4) to ground.<br />
Variable Fan Circuit and Air Flow Detector<br />
The fan power is derived directly from the + 18 V and -18 V supplies from<br />
the Al5 preregulator. The fan is not fused, so that it will continue to provide<br />
airflow and cooling when the instrument is otherwise disabled. If overheating<br />
occurs, the main instrument supplies are shut down and the fan runs at full<br />
speed. An overtemperature status message is sent to the A9 CPU to initiate a<br />
warning message on the analyzer display. The fan also nms at full speed if the<br />
air flow detector senses a low output of air from the fan. (Pull speed is normal<br />
at initial power on.)<br />
Theory of Operation 12-7
Display Power<br />
The A8 assembly supplies +5 VCPU to the A19 GSP through the motherboard.<br />
The GSP converts a portion of the +5 VCPU to 3.3 V to drive the display and<br />
LVDS (low voltage differential signaling) logic The A19 GSP also controls and<br />
supplies power to the A27 backlight inverter. The voltages generated by the<br />
inverter are then routed to the display. Display power is not connected to the<br />
protective shutdown circuitry so that the Al8 display assemblies can operate<br />
during troubleshooting when other supplies do not work.<br />
Note If blanking pulses from the A19 GSP are not present, then<br />
+3.3 V will not be sent to the display.<br />
Probe Power<br />
The + 18 V and -18 V supplies are post regulated to + 15 V and -12.6 V<br />
to provide a power source at the front panel for an external RF probe or<br />
millimeter modules.<br />
Digital Control Theory<br />
The digital control functional group consists of the following assemblies:<br />
H Al front panel<br />
� A2 front panel processor<br />
� A9 CPU<br />
� A10 digital IF<br />
� Al6 rear panel<br />
� Al8 display<br />
� A19 GSP<br />
w A27 Inverter<br />
These assemblies combine to provide digital control for the entire analyzer.<br />
They provide math processing functions, as well as communications between<br />
the analyzer and an external controller and/or peripherals Figure 12-3 is a<br />
simplified block diagram of the digital control functional group.<br />
124 Theory of Operation
L-_--I<br />
7 --_<br />
(<br />
IT<br />
Pie 12-3. Digital Control Group, Simplified Block Diagram<br />
-J<br />
sg6107e<br />
Theory of Operation 12-9
Al Front Panel<br />
The A1 front panel assembly provides user interface with the analyzer. It<br />
includes the keyboard for local user inputs, and the front panel LEDs that<br />
indicate instrument status The RPG (rotary pulse generator) is not electrically<br />
connected to the front panel, but provides user inputs directly to the front<br />
panel processor.<br />
A2 Front Panel Processor<br />
The A2 front panel processor detects and decodes user inputs from the front<br />
panel and the RPG, and transmits them to the CPU. It has the capability to<br />
interrupt the CPU to provide information updates. It controls the front panel<br />
LEDs that provide status information to the user.<br />
The A2 also contains the LVDS (low voltage differential signaling) receivers<br />
which connect to the graphics processor. The received video signals are routed<br />
to the Al8 display.<br />
A9 CPU/A10 Digital IF<br />
The A9 CPU assembly contains the main CPU (central processing unit), the<br />
digital signal processor, memory storage, and interconnect port interfaces<br />
The main CPU is the master controller for the analyzer, including the other<br />
dedicated microprocessors The memory includes EEPROM, DRAM, flash ROM,<br />
SRAM and boot ROM.<br />
Data from the receiver is serially clocked into the A9 CPU assembly from<br />
the A10 digital IF’. The data taking sequence is triggered either from the<br />
Al4 fractional-N assembly, externally from the rear panel, or by software on the<br />
A9 assembly.<br />
MdlCPU<br />
The main CPU is a 32-bit microprocessor that maintains digital control over the<br />
entire instrument through the instrument bus The main CPU receives external<br />
control information from the front panel or <strong>HP</strong>-IB, and performs processing<br />
and formatting operations on the raw data in the main RAM. It controls the<br />
digital signaI processor, the front panel processor, the display processor, and<br />
the interconnect port interfaces. In addition, when the analyzer is in the<br />
system controller mode, the main CPU controls peripheral devices through the<br />
peripheral port interfaces<br />
12-10 Thsoryof Operation
The main CPU has a dedicated flash ROM that contains the operating system for<br />
instrument control. Front panel settings are stored in SRAM, with a battery<br />
providing at least 5 years of backup storage when external power is off.<br />
Main RAM<br />
The main RAM (random access memory) is shared memory for the CPU and the<br />
digital signal processor. It stores the raw data received from the digital signal<br />
processor, while additional calculations are performed on it by the CPU. The<br />
CPU reads the resulting formatted data from the main RAM and converts it to<br />
GSP commands. It writes these commands to the GSP for output to the analyzer<br />
display.<br />
EEPROM<br />
EEPROM (electrically-erasable programmable read only memory) contains<br />
factory set correction constants unique to each instrument. These constants<br />
correct for hardware variations to maintain the highest measurement accuracy.<br />
The correction constants can be updated by executing the routines in Chapter 3,<br />
“Adjustments and Correction Constants. n<br />
Digital Signal Processor<br />
The digital signal processor receives the digitized data from the A10 digital<br />
IF. It computes discrete Fourier transforms to extract the complex phase and<br />
magnitude data from the 4 kHz IF signal. The resulting raw data is written into<br />
the main RAM.<br />
Al8 Display<br />
The Al8 display is an 8.4 inch LCD with associated drive circuitry. It receives a<br />
+3.3 V power supply from the A19 GSP, along with the voltage generated from<br />
the A27 backlight inverter. It receives the following signals from the A19 GSP:<br />
� digital TTL horizontal sync<br />
w digital TTL vertical sync<br />
� blanking<br />
w data clock<br />
� digital ‘ITL red video<br />
� digitalTI’Lgreen video<br />
� digital ‘ITL blue video<br />
Theory of Operation 12-11
A19 GSP<br />
The A19 graphics system processor is the main interface between the A9 CPU<br />
and the Al8 display. The CPU (A9) converts the formatted data to GSP<br />
commands and writes it to the GSP. The GSP processes the data to obtain the<br />
necessary video signals, which are then used for the following purposes:<br />
� The video signals are used to produce VGA compatible RGB output signals,<br />
which are routed to the Al6 rear panel.<br />
w The video signals are converted by an LVDS (low voltage differential signaling)<br />
driver which translates the signals to low level differential signals to help<br />
eliminate radiated emissions The converted video signals are then routed to<br />
the A2 assembly, where they are received and sent to the Al8 display.<br />
The A19 assembly receives the +5 VCPU which is used for processing and<br />
supplying power to the A27 backlight inverter (+ 5 VCPU) and the Al8 display<br />
(3.3 v).<br />
A27 Inverter<br />
The AZ7 backlight inverter assembly supplies the ac voltage for the backlight<br />
tube in the Al8 display assembly. This assembly takes the + 5 VCPU and<br />
converts it to approximately 380 Vat with 5 ma of current at 40 kHz. There are<br />
two control lines:<br />
� Digital ON/OFF<br />
� Analog Brightness<br />
0 100% intensity is 0 V<br />
0 50% intensity is 4.5 V<br />
Al6 Bear Panel<br />
The Al6 rear panel includes the following interfaces:<br />
TEST SET I./O INTERCONNECT. This provides control signals and power to<br />
operate duplexer test adapters<br />
EXT RET’. This allows for a frequency reference signal input that can phase<br />
lock the analyzer to an external frequency standard for increased frequency<br />
accuracy.<br />
The analyzer automatically enables the external frequency reference feature<br />
when a signal is connected to this input. When the signal is removed, the<br />
analyzer automatically switches back to its internal frequency reference.<br />
12-12 Theoryof Operation
10 MHZ PRECISION REFERENCE. (Option lD5) This output is connected<br />
to the EXT REF (described above) to improve the frequency accuracy of the<br />
analyzer.<br />
AUX INPUT. This allows for a dc or ac voltage input from an external signal<br />
source, such as a detector or function generator, which you can then measure,<br />
using the S-parameter menu. (You can also use this connector as an analog<br />
output in service routines.)<br />
EXT AM. This allows for an external analog signal input that is applied to the<br />
ALC circuitry of the analyzer’s source. This input analog signal amplitude<br />
modulates the RF output signal.<br />
EXT TRIG. This allows connection of an external negative TI’L-compatible<br />
signal that will trigger a measurement sweep. The trigger can be set to<br />
external through softkey functions.<br />
TEST SEQ. This outputs a TI’L signal that can be programmed in a test<br />
sequence to be high or low, or pulse (10 pseconds) high or low at the end of a<br />
sweep for a robotic part handler interface.<br />
LIMIT TEST. This outputs a TI’L signal of the limit test results as follows:<br />
Pass: TrLhigh<br />
Fail: TrLlow<br />
VGA OUTPUT. This provides a video output of the analyzer display that is<br />
capable of running a PC VGA monitor.<br />
Theory of Operation 12-13
Source Theory Overview<br />
The source produces a highly stable and accurate RF output signal by phase<br />
locking a YIG oscillator to a harmonic of the synthesized VCO (voltage controlled<br />
oscillator). The source output produces a CW or swept signal between 300 kHz<br />
and 3 GHz (or 300 kHz and 6 GHz for Option 006) with a maximum leveled<br />
power of + 10 dBm. The source’s built-in 70 dR step attenuator allows the<br />
power to go as low as -85 deem.<br />
The full frequency range of the source is produced in 14 subsweeps, one in<br />
super low band, two in low band, and eleven in high band. The high band<br />
frequencies (16 MHz to 3 GHz) or (16 MHz to 6 GHz for Option 006) are achieved<br />
by harmonic mixing, with a different harmonic number for each subsweep. The<br />
low band frequencies (300 kHz to 16 MHz) are down-converted by fundamental<br />
mixing. The super low band frequencies (10 kHz to 300 kHz) are sent directly<br />
from the Al2 reference board to the output of the A3 source assembly. This<br />
band is not phased locked nor does it use the ALC. It is the basic amplified<br />
output of the fractional-N synthesizer.<br />
The source functional group consists of the individual assemblies described<br />
below.<br />
A14/A13 Fractional-N<br />
These two assemblies comprise the synthesizer. The 30 to 60 MHz VCO in<br />
the Al4 assembly generates the stable LO frequencies for fundamental and<br />
harmonic mixing.<br />
Al2 Reference<br />
This assembly provides stable reference frequencies to the rest of the<br />
instrument by dividing down the output of a 40 MHz crystal oscillator. In low<br />
band operation, the output of the fractional-N synthesizer is mixed down in the<br />
Al2 reference assembly. (The 2nd LO signal from the Al2 assembly is explained<br />
in Receiver Theory.) The Al2 is also the origin of the super low band portion of<br />
the 87533 source.<br />
12-14 Theory of Operation
A7 Pulse Generator<br />
A step recovery diode in the pulse generator produces a comb of harmonic<br />
multiples of the VCO output. These harmonics provide the high band LO (local<br />
oscillator) input to the samplers. In low band and super low band the operation<br />
the pulse generator is turned off.<br />
All Phase Lock<br />
This assembly compares the f&t IF (derived from the source output in the<br />
A4 sampler) to a stable reference, and generates an error voltage that is<br />
integrated into the drive for the A3 source assembly.<br />
A3 Source<br />
This assembly includes a 3.0 to 6.8 GHz YIG oscillator and a 3.8 GHz cavity<br />
oscillator. The outputs of these oscillators are mixed to produce the RF output<br />
signal. In Option 006 (30 kHz to 6 GHz) the frequencies 3.0 to 6.0 GHz are no<br />
longer a mixed product, but are the direct output of the YIG Oscillator. The<br />
signal tracks the stable output of the synthesizer. The ALC (automatic leveling<br />
control) circuitry is also in the A3 assembly.<br />
Source Super Low Band Operation<br />
The Super Low Band Frequency Range is 10 kHz to 300 kHz. These frequencies<br />
are generated by the Al2 Reference Board. They are the amplified output of<br />
the fractional-N synthesizer. This output is not phase locked and is not subject<br />
to ALC control. Refer to ‘lhble 12-1.<br />
‘able 12-1. Super Low Band Subsweep Frequencies<br />
I 4o.oto43.3 ~0.010to 0.300 ~0.010to 0.300 I<br />
Theory of Operation 12-15
Source Low Band Operation<br />
The low band frequency range is 300 kHz to 16 MHz. These frequencies are<br />
generated by locking the A3 source to a reference signal. The reference signal<br />
is synthesized by mixing down the fundamental output of the fractional-N VCO<br />
with a 40 MHz crystal reference signal. Low band operation differs from high<br />
band in these respects: The reference frequency for the All phase lock is not<br />
a 6xed 1 MHz signal, but varies with the frequency of the fractional-N VCO<br />
signal. The sampler diodes are biased on to pass the signal through to the mixer.<br />
The 1st IF signal from the A4 sampler is not fixed but is identical to the source<br />
output signal and sweeps with it. The following steps outline the low band<br />
sweep sequence, illustrated in Figure 12-4.<br />
1. A signal (FN LO) is generated by the fractional-N VCO. The VCO in the<br />
Al4 Fractional-N assembly generates a CW or swept signal that is 40 MHz<br />
greater than the start frequency. The signal is divided down to 100 kHz and<br />
phase locked in the Al3 assembly, as in high band operation.<br />
2. The fractional-N VCO signal is mixed with 40 MHZ to produce a<br />
reference signal. The signal (F’N LO) from the Fractional-N VCO goes to the<br />
Al2 reference assembly, where it is mixed with the 40 MHz VCXO (voltage<br />
controlled crystal oscillator). The resulting signal is the reference to the<br />
phase comparator in the All assembly.<br />
3. The A3 source is pretuned. The source output is fed to the A4 sampler.<br />
The pretuned DAC in the All phase lock assembly sets the A3 source to a<br />
frequency 1 to 6 MHz above the start frequency. This signal (source output)<br />
goes to the A4 R input sampler/mixer assembly.<br />
4. The signal from the source is fed back (1st IF’) to the phase comparator.<br />
The source output signal passes directly through the sampler in the A4<br />
assembly, because the sampler is biased on. The signal (1st IF+) is fed back<br />
unaltered to the phase comparator in the All phase lock assembly. The other<br />
input to the phase comparator is the heterodyned reference signal from the<br />
Al2 assembly. Any frequency difference between these two signals produces<br />
a proportional error voltage.<br />
5. A tuning signal (YO DRIVE) tunes the source and phase lock is achieved.<br />
The error voltage is used to drive the A3 source YIG oscillator to bring the<br />
YIG closer to the reference frequency. The loop process continues until the<br />
source frequency and the reference frequency are the same, and phase lock<br />
is achieved.<br />
12-16 Theory of Operation
6. A synthesized sub sweep is generated. The source tracks the<br />
synthesizer. When lock is achieved at the start frequency, the synthesizer<br />
starts to sweep. This changes the phase lock reference frequency, and causes<br />
the source to track at a difference frequency 40 MHz below the synthesizer.<br />
1<br />
Pigure 12-4. Low Band Operation of the Source<br />
-<br />
Theory of Operation 12-17
The full low band is produced in two sub sweeps, to allow addition IF sltering<br />
below 3 MHz. At the transition between subsweeps, the source is pretuned<br />
and then relocks. ‘Ihble 12-2 lists the low band subsweep frequencies at the<br />
fractional-N VCO and the RF output.<br />
12-18 TheoryofOperation<br />
‘able 12-Z. Low Band Subsweep Frequencies<br />
t
Source High Band Operation<br />
The high band frequency range is 16 MHz to 3.0 GHz or 16 MHz to 6.0 GHz with<br />
Option 006. These frequencies are generated in subsweeps by phase-locking the<br />
A3 source signal to harmonic multiples of the fractional-N VCO. The high band<br />
subsweep sequence, ilhrstrated in F’igure 12-5, follows these steps:<br />
1. A signal (HI OUT) is generated by the fractional-N VCQ. The VCO in<br />
the Al4 fractional-N assembly generates a CW or swept signal in the range<br />
of 30 to 60 MHz. This signal is synthesized and phase locked to a 100 kHz<br />
reference signal from the Al2 reference assembly. The signal from the<br />
fractional-N VCO is divided by 1 or 2, and goes to the pulse generator.<br />
2. A comb of harmonics (1st LO) is produced iu the A7 pulse generator.<br />
The divided down signal from the fractional-N VCO drives a step recovery<br />
diode (SRD) in the A7 pulse generator assembly. The SRD multiplies<br />
the fundamental signal from the fractional-N into a comb of harmonic<br />
frequencies The harmonics are used as the 1st LO (local oscillator) signal to<br />
the samplers One of the harmonic signals is 1 MHz below the start signal set<br />
from the front panel.<br />
3. The A3 source is pretuued. The source output is fed to the A4 sampler.<br />
The pretune DAC in the All phase lock assembly sets the A3 source to a first<br />
approximation frequency (1 to 6 MHz higher than the start frequency). This<br />
signal (RF OUT) goes to the A4 R input sampler/mixer assembly.<br />
4. The synthesizer sigual and the source signal are combined by the<br />
sampler. A difference frequency is generated. In the A4 sampler, the 1st<br />
LO signal from the pulse generator is combined with the source output signal.<br />
The IF (intermediate frequency) produced is a first approximation of 1 MHz.<br />
This signal (1st IF’) is routed back to the A11 phase lock assembly.<br />
5. The difference frequency (1st IF’) from the A4 sampler is compared to a<br />
reference. The 1st IF feedback signal from the A4 is filtered and applied to<br />
a phase comparator circuit in the A11 phase lock assembly. The other input<br />
to the phase comparator is a crystal controlled 1 MHz signal from the Al2<br />
reference assembly. Any frequency difference between these two signals<br />
produces a proportional error voltage.<br />
6. A tuuiug signal (PO DRIVE) tunes the source and phase lock is achieved.<br />
The error voltage is used to drive the A3 source YIG oscillator, in order to<br />
bring it closer to the required frequency. The loop process continues until<br />
the 1st IF feedback signal to the phase comparator is equal to the 1 MHz<br />
reference signal, and phase lock is achieved.<br />
Theory of Operation 12-18
7. A synthesized subsweep is generated by A13/A14. The A3 source tracks<br />
the synthesizer. When the source is phase locked to the synthesizer at the<br />
start frequency, the synthesizer starts to sweep. The phase locked loop forces<br />
the source to track the synthesizer, maintaining a constant 1 MHz 1st IF<br />
signal.<br />
The full high band sweep is generated in a series of subsweeps, by phase<br />
locking the A3 source signal to harmonic multiples of the fractional-N VCO.<br />
The 16 to 31 MHz subsweep is produced by a one half harmonic, using<br />
the divide-by-2 circuit on the Al4 assembly. At the transitions between<br />
subsweeps, the source is prettmed and then relocks lkble 12-3 lists the high<br />
band subsweep frequencies from the fractional-N VCO and the source output.<br />
A13/14<br />
FRACTIONAL-N<br />
12-20 Theoryof Operation<br />
Figure 12-5. High Band Operation of the Source<br />
- -<br />
T O 3GHz<br />
ag6231d
lhble 12-3. High Band Subsweep Frequencies<br />
F’ractional-N (BlJ3z)<br />
3ot.060<br />
3Oto60<br />
3Oto60<br />
4Oto60<br />
35.4to 59.2<br />
32.8to 59.4<br />
36.7t.o 59.5<br />
33.0 to 60.6<br />
31.5 to 58.8<br />
Jhrmonic source output (bfEz)<br />
l/2 16to31<br />
1 31to 61<br />
2 61to 121<br />
3 121t.o 178<br />
6 178t.0206<br />
0 206to536<br />
15 536to 893<br />
27 803t.o 1607<br />
51 1607to3ooo<br />
option 666<br />
37.Ot.o 59.5 83 3ooot.o4060<br />
4o.oto 59.4 101 4060to6ooo<br />
1<br />
Theoryof Operation 12-21
Source Operation in other Modes/Features<br />
Resides the normal network analyzer mode, the <strong>HP</strong> 87533 has extra modes and<br />
features to make additional types of measurements The following describes<br />
the key differences in how the analyzer operates to achieve these new<br />
measurements<br />
Frequency Offset<br />
The analyzer can measure frequency-translating devices with the frequency<br />
offset feature.<br />
The receiver operates normally. However, the source is pretuned to a different<br />
frequency by an offset entered by the user. The device under test will translate<br />
this frequency back to the frequency the receiver expects. Otherwise, phase<br />
locking and source operation occur as usual.<br />
HarmonicAnalysis(Option002)<br />
The analyzer can measure the 2nd or 3rd harmonic of the fundamental<br />
source frequency, on a swept or CW basis, with the harmonic analysis feature<br />
(optional).<br />
To make this measurement, the reference frequency (normally 1 MHz) from the<br />
Al2 reference assembly to the All phase lock assembly is divided by 1, 2, or 3.<br />
See F’igure 12-6.<br />
The fractional-N assemblies are also tuned so that the correct harmonic (comb<br />
tooth) of the 1st LO is 0.500 or 0.333 MHz below the source frequency instead<br />
of the usual 1.000 MHz. ‘l’he analyzer pretunes the A3 source normally,<br />
then phase locks the 1st IF to the new reference frequency to sweep the<br />
fundamental source frequency in the usual way. The key difference is that the<br />
1st IF (output from the R sampler) due to the fundamental and used for phase<br />
locking is now 0.500 or 0.333 MHz instead of 1.000 MHz.<br />
Since the chosen VCO harmonic and the source differ by 0.500 or 0.333 MHz,<br />
then another VCO harmonic, 2 or 3 times higher in frequency, will be exactly<br />
1.000 MHz away from the 2nd or 3rd harmonic of the source frequency. The<br />
samplers, then, will also down-convert these harmonics to yield the desired<br />
components in the 1st IF at 1.000 MHz. Narrow bandpass flters in the receiver<br />
eliminate all but the 1.000 MHz signals; these pass through to be processed and<br />
displayed.<br />
12-22 Theoryof Operation
A13/14<br />
FRACTIONAL-N<br />
A12<br />
REFERENCE<br />
@vcxo<br />
40MHz<br />
$ REFERENCE<br />
HARMONIC FREQ (MHz)<br />
1 1.000<br />
0.500<br />
:<br />
0.333<br />
1ST LO<br />
Ad<br />
SOURCE<br />
3.0 to<br />
6.8GHz<br />
YIG OSC<br />
Figure 12-6. Harmonic Analysis<br />
1 1ST IF<br />
3GHz TO<br />
-=<br />
sg6232d<br />
External Source Mode<br />
In external source mode, the analyzer phase locks its receiver to an external<br />
signal source. This source must be CW (not swept), but it does not need to be<br />
synthesized. The user must enter the source frequency into the analyzer. (The<br />
analyzer’s internal source output is not used.)<br />
To accomplish this, the phase lock loop is reconnected so that the tuning voltage<br />
from the A11 phase lock assembly controls the VCO of the Al4 fractional-N<br />
assembly and not the A3 source. See Figure 12-7. The VCO’s output still drives<br />
the 1st LO of the samplers and down-converts the RF signal supplied by the<br />
external source. The resulting 1st IF is fed back to the A11 phase lock assembly,<br />
Theory of Operation 12-23
compared to the 1.000 MHz reference, and used to generate a tuning voltage as<br />
usual. However, the tuning voltage controls the VCO to lock on to the external<br />
source, keeping the 1st IF at exactly 1.000 MHz.<br />
The analyzer normally goes through a pretune-acquire-track sequence to achieve<br />
phase lock. In external source mode, the fractional-N VCO prettmes as a<br />
closed-loop synthesizer referenced to the 100 kHz signal from the Al2 reference<br />
assembly. Then, to acquire or track, a switch causes the VCO to be tuned by the<br />
All phase lock assembly instead. (Refer to the Overall Block Diagram at the<br />
end of Chapter 4, “Start Troubleshooting Here.“)<br />
1A13/14<br />
FRACTIONAL-N<br />
30 to 60 MHz<br />
12-24 Theory of Operation<br />
Figure 12-7. External Source Mode<br />
IST IF<br />
- -<br />
sg6235d
Tuned Receiver Mode<br />
In tuned receiver mode, the analyzer is a synthesized, swept, narrow-band<br />
receiver only. The external signal source must be synthesized and<br />
reference-locked to the analyzer.<br />
To achieve this, the analyzer’s source and phase lock circuits are completely<br />
unused. See Figure 12-8. The fractional-N synthesizer is tuned so that one of its<br />
harmonics (1st LO) down-converts the RF input to the samplers (In contrast to<br />
external source mode, the analyzer does not phase lock at all. However, the 1st<br />
Lo is synthesized.)<br />
The analyzer can function as a swept tuned receiver, similar to a spectrum<br />
analyzer, but the samplers create spurious signals at certain frequencies, which<br />
limit the accuracy of such measurements<br />
A13/14<br />
FRACTIONAL-N<br />
Figure 12-8. Tuned Receiver Mode<br />
1ST LO<br />
I<br />
A4 (RI<br />
SAMPLER<br />
MIXER I. I-!<br />
-5<br />
1ST I F<br />
sg6234d<br />
Theory of Operation 12-26
Signal Separation<br />
The Built-In I’kst Set<br />
F’igure 12-9 shows a simplified block diagram of the analyzer’s built-in test set.<br />
A21 and A22 Test Port Cmplers<br />
The analyzer’s test port couplers are used to separate signals incident to,<br />
reflected from, and transmitted from the device under test. Each test port<br />
coupler has a coupling coefficient factor of 16 dD.<br />
A23 LED kont Panel<br />
The LED front panel board indicates whether the source power is incident on<br />
the analyzer’s test port 1 or test port 2. The analyzer’s source power is directed<br />
to test port 1 when making a forward transmission/reflection measurement.<br />
Similarly, source power is incident at test port 2 when making a reverse<br />
transmission/reflection measurement.<br />
A24 Transfer Switch<br />
The A3 source output power is directed to either the analyzer’s test port 1 or<br />
test port 2 via a low loss solid state transfer switch. With this switch, all four<br />
S-parameters can be updated continuously (for example: the data obtained from<br />
a full 2-port calibration). In addition, the transfer switch provides termination<br />
for the inactive test port in order to minimize the crosstalk between the source<br />
and receiver sampler.<br />
A26 ‘l&t Set Interface<br />
The test set interface board provides biasing for active devices under test with<br />
an external dc voltage. This dc voltage is applied directly to the test port center<br />
pm. In addition, the test set interface board provides the drive signal for the<br />
A24 forward/reverse transfer switch.<br />
12-26 Theoryof Operation
FROM A3<br />
A24<br />
TRANSFER<br />
SW I TCH<br />
FRONT PANEL<br />
A21 TEST PORT<br />
rCOUPLER<br />
Figure 12-9. SimplifM Block Diagram of the Built-in ‘Ilest Set<br />
B!As CONNECT<br />
PORT 1<br />
BiAS CONNECT<br />
PORT 2<br />
5962364<br />
Theory of Operation 12-27
Receiver Theory<br />
The receiver functional group consists of the following assemblies:<br />
A4 sampler/mixer<br />
A5 sampler/mixer<br />
A6 sampler/mixer<br />
A10 digital IF<br />
These assemblies combine with the A9 CPU (described in Digital Control Theory)<br />
to measure and process input signals into digital information for display on the<br />
analyzer. Figure 12-10 is a simplijied block diagram of the receiver functional<br />
group. The A12 reference assembly is also included in the illustration to show<br />
how the 2nd LO signal is derived.<br />
Figure 12-10. Receiver Functional Group, Siiplilled Block Diagram<br />
12-28 Theory of Operation
A4/AS/A6 Sampler/Mixer<br />
The A4, A5, and A6 sampler/mixers all down-convert the RF input signals<br />
to fixed 4 kHz 2nd IF signals with amplitude and phase corresponding to the<br />
RF’ input. The A5 and A6 sampler/mixer assemblies both include an 8 dB gain<br />
preamplifier in front of the sampler. This improves the noise figure performance<br />
of the analyzer’s receiver channels A and B.<br />
The Sampler Circuit in High Band<br />
In high band operation, the sampling rate of the samplers is controlled by<br />
the 1st LO from the A7 pulse generator assembly. The 1st LO is a comb of<br />
harmonics produced by a step recovery diode driven by the fractional-N VCO<br />
fundamental signal. One of the harmonic signals is 1 MHz below the start<br />
frequency set at the front panel. The 1st LO is combined in the samplers<br />
with the RF input signal from the source. In the Option 006, samplers are<br />
additionally capable of recognizing RF input signals from 3 to 6 GHz. The mixing<br />
products are flltered, so that the only remaining response is the difference<br />
between the source frequency and the harmonic 1 MHz below it. This fixed<br />
1MHzsignalisthelstIF.RartofthelstIFsignalfromtheRsamplerisfed<br />
back to the All phase lock assembly.<br />
The hnpler Circuit in Low Band or Super Low Band<br />
In low band or super low band the sampler diodes are biased continuously on,<br />
so that the RF input signal passes through them unchanged. Thus the 1st IF<br />
is identical to the RF output signal from the source (300 kHz to 16 MHz for<br />
lowband; 10 to 300 kHz for super lowband), and sweeps with it. Part of the 1st<br />
IF signal from the R sampler is fed back to the All phase lock assembly.<br />
(Refer to “Source Theory Overview” for information on high band and low band<br />
operation of the source.)<br />
The 2nd LO Signal<br />
The 2nd LO is obtained from the Al2 reference assembly. In high band, the 2nd<br />
LO is llxed at 996 kHz. This is produced by feeding the 39.34 MHz output of a<br />
phase-locked oscillator in the Al2 assembly through a divide-by-40 circuit.<br />
In low band, the 2nd Lo is a variable frequency produced by mixing the output<br />
of the fractional-N VCG with a fixed 39.996 MHz signal in the Al2 assembly.<br />
The 2nd Lo covers the range of 0.014 to 16.004 MHz in two subsweeps that<br />
correspond with the source subsweeps These subsweeps are 0.304 to 3.304 MHz<br />
and 3.304 to 16.004 MHz.<br />
Theory of Operation 12-29
The Mixer Circuit<br />
The 1st IF and the 2nd Lo are combined in the mixer circuit. The resulting<br />
difference frequency (the 2nd IF) is a constant 4 kHz in both bands, as<br />
lhble 12-4 shows<br />
Band<br />
Super Low<br />
LOW<br />
High<br />
A10 Digital IF<br />
‘able 12-4. Mixer Frequencies<br />
1st IF 2nd L43<br />
0.010 to 0.300 MHZ 0.014 to 0.304 MHZ<br />
0.300tAJ 16.0 MHZ 0.304 to 16.004 MI-h<br />
1.ooo MHZ 0.996 MHz<br />
2nd IF<br />
4.0 HI!4<br />
4.0 HI2<br />
4.0 kHz<br />
The three 4 kHz 2nd IF signaIs from the sampler/mixer assemblies are input<br />
to the A10 digital IF assembly. These signals are sampled at a 16 kHz rate. A<br />
fourth input is the analog bus, which can monitor either an external input at<br />
the rear panel AUX IN connector, or one of 31 internal nodes. A multiplexer<br />
sequentially directs each of the signals to the ADC (analog-to-digital converter).<br />
Here they are converted to digital form and sent to the A9 CPU assembly for<br />
processing. Refer to “Digital Control Theory” for more information on signal<br />
processing.<br />
12-30 Theoryof Operation
Replaceable Parts<br />
This chapter contains information for ordering replacement parts for the<br />
<strong>HP</strong> <strong>8753E</strong> network analyzer. Replaceable parts include the following:<br />
� major assemblies<br />
fl cables<br />
� chassis hardware<br />
13<br />
In general, parts of major assemblies are not listed. Refer to lhble 13-1 at the<br />
back of this chapter to help interpret part descriptions in the replaceable parts<br />
lists that follow.<br />
Replaceable Parts 13-l
Replacing an Assembly<br />
The following steps show the sequence to replace an assembly in an <strong>HP</strong> <strong>8753E</strong><br />
network analyzer.<br />
1. Identify the faulty group. Refer to Chapter 4, “Start Troubleshooting Here.”<br />
Follow up with the appropriate troubleshooting chapter that identifies the<br />
faulty assembly.<br />
2. Order a replacement assembly. Refer to Chapter 13, “Replaceable Parts”<br />
3. Replace the faulty assembly and determine what adjustments are necessary.<br />
Refer to Chapter 14, “Assembly Replacement and Post-Repair Procedures”<br />
4. Perform the necessary adjustments. Refer to Chapter 3, “Adjustments and<br />
Correction Constants n<br />
5. Perform the necessary performance tests Refer to Chapter 2, “System<br />
VeriGcation and Performance Tests. n<br />
13-2 Replaceable Parts
Rebuilt-Exchange Assemblies<br />
Under the rebuilt-exchange assembly program, certain factory-repaired<br />
and tested modules (assemblies) are available on a trade-in basis These<br />
assemblies are offered for lower cost than a new assembly, but meet all factory<br />
specifications required of a new assembly.<br />
The defective assembly must be returned for credit under the terms of the<br />
rebuilt-exchange assembly program. Any spare assembly stock desired should be<br />
ordered using the new assembly part number. F’igure 13-1 illustrates the module<br />
exchange procedure. “Major Assemblies, Top” and “Major Assemblies, Bottom”<br />
list all major assemblies, including those that can be replaced on an exchange<br />
basis<br />
Ordering Information<br />
To order a part listed in the replaceable parts lists, quote the Hewlett-Packard<br />
part number, indicate the quantity required, and address the order to the<br />
nearest Hewlett-Packard office.<br />
To order a part that is not listed in the replaceable parts lists, include the<br />
instrument model number, complete instrument serial number, the description<br />
and function of the part, and the number of parts required. Address the order<br />
to the nearest Hewlett-Packard office.<br />
Replaceable Parts 133
The module exchange program described here is a<br />
method of keeping your Hewlett-Packard instrument<br />
Locate defective module<br />
using troubleshooting<br />
procedures in this<br />
manual.<br />
1<br />
Is Q replacement<br />
module on hand?<br />
1<br />
NO<br />
Order restored-exchange<br />
module from <strong>HP</strong>. Refer<br />
to the replaceable parts<br />
section for port numbers.<br />
134 Replaceable Parts<br />
Install the replacement<br />
module. Keep the defectfve<br />
module for return<br />
to <strong>HP</strong>.<br />
module from <strong>HP</strong>. Refer<br />
to the replaceable ports<br />
section for part numbers.<br />
fast, efficient, economical<br />
r service.<br />
Figure 13-1. Module Exchange Procedure<br />
B<br />
Restored-exchange modules are<br />
shipped mdividually in boxes like<br />
this. In addition to the circuit<br />
module, the box contains:<br />
Exchange assembly failure repor<br />
Return address label<br />
Open box carefully-it will be<br />
used to return defective module<br />
to <strong>HP</strong>. Complete failure report.<br />
Place it and defective module<br />
in box. Be sure to remove<br />
enclosed return address label.<br />
Seal box with tape. Inside<br />
U.S.A.*, stick preprinted return<br />
address label over label already<br />
on box, and return box to <strong>HP</strong>.<br />
Outside U.S.A., do not use oddress<br />
label; instead address box<br />
to the nearest <strong>HP</strong> office.<br />
sg613d
Replaceable Part Listings<br />
The following pages list the replacement part numbers and descriptions for<br />
the <strong>HP</strong> <strong>8753E</strong> <strong>Network</strong> <strong>Analyzer</strong>. Illustrations with reference designators<br />
are provided to help identify and locate the part needed. The parts lists are<br />
organized into the following categories:<br />
� Major Assemblies, Top<br />
w Major Assemblies, Bottom<br />
� Cables, Top<br />
� Cables, Bottom<br />
� Cables, Front<br />
� Cables, Rear<br />
� Cables, Source<br />
� Front Panel, Outside<br />
� Front Panel, Inside<br />
� Rear Panel<br />
� Rear Panel, Option lD5<br />
� Hardware, Top<br />
� Hardware, Bottom<br />
� Hardware, kont<br />
� Hardware, Test Set Deck<br />
� Hardware, Disk Drive Support<br />
� Hardware, Memory Deck<br />
� Hardware, Preregulator<br />
� Chassis Parts, Outside<br />
� Chassis Parts, Inside<br />
� Miscellaneous<br />
Replawable Parts 13-5
M@or Assemblies, Top<br />
Ref. option <strong>HP</strong>Part Qty Description<br />
-i3.<br />
NUdM?r<br />
Al NOT SHOWN (see -Front Psnel Assembly, Inside”)<br />
A2 NOT SHOWN (see ‘Front Panel Aeanbly, Inside”)<br />
All 0876s-60231 1 ASSY-SCWRCE 3 OH2<br />
A3 087~6Q2sl 1 ASSY-SOURCB 3 ffirz (RRBUIIX-EXCRANGE)<br />
A3 006 08763-60146 1 ASSY-SCURCE 6 GHz<br />
A3 006 087~69146 1 ASSY-SOURCE 6 GIiz (REBUIIT-RXCBANGE)<br />
The following parts apply to instruments with serial numbem gnster than US37S9xxxx or W,<br />
and to instruments having all three samplers replaced.<br />
A4 087~6oalY7 1 ASSY-SAMPLERR (REBUIIZEXCBANGE: 08753-69007)<br />
A6 087~&woS 1 ASSY-SABWLER A (RBBUIIZ-KKCBANGE 0876%3@008)<br />
A6 087~6oBoS 1 ASY-SAMPLER B (RRBUIWEXCRANGIk 0876MOQOS)<br />
The following parta apply to instruments with serial numbers in the form of US37SOxxxx or Jp3802mmr.<br />
If all three samplera are being replaced, we the part numbers listed above.<br />
A4 087~6ooo4 1 ASSY-SAMPLER R (RRBLJILr-ExCIiANffE 0876M3ooo4)<br />
A6 08753-60169 1 ASSY-SAbfPLER A (REBUIUI-EXCHANGFk 08763-60169)<br />
A6 08763-60160 1 ASSY-SAbXPLER B (RRBUJIT-RXCIiANGEz 0876%60160)<br />
A7 08763-60164 1 RD AWY-PLJISE QENERAlOB<br />
A7 0876%69164 1 BDASSY-PUISE GRNERAlOR (RERuR3-EKCHANGE)<br />
A8* 087~6osM 1 BD ASSY-m RBGIJMlOR<br />
A10 087~6ooo6 1 BD ASSY-DIMIXL IF<br />
All 0876%60162 1 BDASSY-PHASEILXK<br />
Al2 08763-00367 1 BDASSY-RBFERKNCE<br />
AlS 0876s-60013 1 BD ASSY-FRAC N ANAILX<br />
Al4 08763-60068 1 BD ASSY-F’RAC N DIWl!A.L<br />
Al6 087~60008 1 ASaY-PRERRQ ULAlVB<br />
Al6 08763-6Qoo8 1 ASSY-PRERBGULATOB (REBUIIZFXCBAN~B)<br />
Al6 NOT SHOWN (me “Bear Panel Awembly”)<br />
Al7 NOT SHOWN (see 7%866i6 parts, Imiide”)<br />
A18 1 NOT SBOWN (see ‘Wont Panel Assembly, Inside”)<br />
AlQ 0876%30271 1 BDASBY-QRAPBI~ PROOBWOR (under lrheet metal cover)<br />
As0 08720-60190 1 ASSY-DISKDRIVB<br />
A27 1 NOT SBOWN (see “Front fine1 Aaembly, Inaide”)<br />
A26 lD6 NCT SHOWN (see ‘Rear Panel Assembly, Option IDS”)<br />
Bl NIX SHOWN (see “Rear Panel Assembly”)<br />
EtPQ NOT SHOWN (ee “Front Panel Assembly, tide”)<br />
� For fuse part numbela on the AS pbst Regulator, refer to ‘Miscellaneous” in ulis chapter.<br />
134 Replaceable Parts
A15\<br />
A20 -<br />
A4'<br />
A10 A8 All A12<br />
Major Assemblies, ‘hp<br />
Al3<br />
/ Al4<br />
/<br />
sg654e<br />
Replaceable Parts 13-7
Major Assemblies, Bottom<br />
Bt?f. OptlOll lwA3I-t. Qw Description<br />
big.<br />
NlUllbOr<br />
A9 087~6os16 1 cmJREPAlBKlT<br />
A0 os76343os16 1 CPU REPAIR KlT (REBUIfX-EXCBANGE)<br />
CPU FAN 606S8776 1 &-+CPUFANl<br />
AoBTl 14204SS8 1 BAmERY-LITBIUM 3V 12AI-I<br />
A21 6087-7007 1 AmY-TE8TFQBTccuPLER<br />
A21 6@8743007 1 ASBY-TEST PCBT COUPLER (BEBrn-EXCBANGE)<br />
A21 076 5087-7008 1 ASBY-TEsTPcBTcouPLER<br />
A21 076 60874008 1 ASSY-TWT PCBT COUPLER (BFiBUIl2=EXCBANffE)<br />
A!22 6087-7007 1 ASSY-TEST FCRT COUFLEE<br />
A22 60874007 1 AMY-TEST Par COUPLER (BEBlJIUr-EXCHANGE)<br />
A22 076 6087-7008 1 AWY-TEwFQKrcaJPLEu<br />
A22 076 60874008 1 ASSY-TEST PCBT COUFLEFl (BEBtllIMXCHANGE)<br />
Ass 087~60146 1 BDASY-LED FRONTPANEL<br />
As4 50867630 1 AWY-TRAN8FEB8wlTcFl<br />
A24 608m36sQ 1 AMY-TRANSFEB SWllXX @EBUII.SEXCBANGE)<br />
A26 0876%60280 1 BD AESY-m m INTEFtFACE<br />
1 Remove the backing from the heat transfer area before re-assembly.<br />
134 Replaceable Parts
CPU<br />
Fan\<br />
A24,<br />
Ai A23 A21<br />
Major Assemblies, Bottom<br />
, A9BTl<br />
sg6126e<br />
Replaceable Parts 13-8
1<br />
Ref.<br />
De&.<br />
Cables, Tlbp<br />
A16Wl 18W<br />
Wl<br />
w2<br />
ws<br />
w4<br />
W6<br />
W6<br />
w7<br />
W8<br />
WO<br />
WlO<br />
Wll<br />
Wl.2<br />
WlS<br />
W24<br />
W26<br />
w21<br />
w20<br />
-r<br />
SR<br />
8R<br />
8R<br />
SB<br />
F<br />
F<br />
F<br />
F<br />
F<br />
F<br />
F<br />
F<br />
F<br />
SR<br />
F<br />
148<br />
348<br />
mart<br />
Number<br />
1400-0249<br />
(part of A16)<br />
08763-20286<br />
08753-20201<br />
08753-20286<br />
08753-20336<br />
087~60027<br />
0876%30027<br />
087~60027<br />
087~6oL320<br />
8l21MO21<br />
087~6oo20<br />
08763-60029<br />
087~6oo2o<br />
0876%60026<br />
087~20291<br />
8l20-6026<br />
SEC6876<br />
8l24MSSO<br />
-<br />
QQ<br />
-<br />
1<br />
CABLE TIE (16Wl to CHAWIS)<br />
* nW Wire Bundle (n is the number of wires in the bundle)<br />
nR Bibon Cable (n is the number of wires in the ribbon)<br />
F Flexible C!eax Cable<br />
SE Semi-Blgld Coax Cable<br />
13-10 ReplaceableParts<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1-<br />
Description<br />
PREI.EQULATOR (A16) to POKl’ RJtGULA’lOiZ (A8J2) and<br />
bfOTHERBOARD (A17JS)<br />
SOUECE A88Y (ASW4) to TBANSFER SWI’RX (A24)<br />
Fp (It CBANNEL IN) to SAMPLEB-B (A4)<br />
TMT FORT 1 COUPLER (A21) to SAI@LEIt-A (AS)<br />
TEST PORT 2 COUPLER (A22) to SAMPLEBB (A6)<br />
MMFLER-R (A4) to PUISE GJZNEMlUB (A7)<br />
SAMPLE%A (A5) to PUME GENERATUE (A7)<br />
SAMPLER-B (A6) to PUISE QENERATOR (A7)<br />
PHASE ILICK (AlLIl) to SAMPLEEM (A4)<br />
FlZAGN D1GlTA.L (A14Jl) to PUUE GENERAlOR (A7)<br />
F&W-N DIQITAL (A14J2) toREFERENCE (Awl)<br />
FZAC-N DIGlTAL (A14JS) to FFtAGN ANAMG (AlSJl)<br />
FBAGN ANAIBG (AlSJ2) toREFERENCE (Al2J2)<br />
RFZEEENCFi(Al2JS)toRP(EXTEEF)<br />
60uRcEAs8Y(As)toFp(RcHANNEL0uT)<br />
6ouRcE ASSY (A3) to BEFERENCE (Al2J4)<br />
MOTHEREOAFtD (A17J12) to EEAB PANEL VGA OUT<br />
MOTHERBOARD (A17Jll) to CPU (AOJS)
w4 ’<br />
w3 ’<br />
w2 ’<br />
w5 ’<br />
W6 ’<br />
w7 ’<br />
Cables, lbp<br />
/<br />
W26<br />
, WI2<br />
/ WI1<br />
. WI0<br />
' w9<br />
' W8<br />
sg656e<br />
Replaceable Parts 13.11
pd.<br />
D-k!.<br />
1<br />
A21Wl<br />
Cables, Bottom<br />
1w<br />
lIPPart<br />
Number<br />
140&0611<br />
8120-6483<br />
G -1<br />
1<br />
CABLE CLAMP<br />
De43cription<br />
QRAYWIUSTESFPCET~CCUP~(A~~)~~TE~TSET<br />
INTERFACE (A26TPl)<br />
A22Wl 1w<br />
8l2@648S 1 GRAYWIRE~FTX~T~C~UF’LER(A~~)~~T~BT~ET<br />
INTEWACE (A26TP2)<br />
A24Wl SW 86047~MOM 1 TBAN8FER mvrmH (A24) to TEST SF2 INTElPAcE (A26JS)<br />
Wl SR 08763-20286 1 SOURCE AWY (ASW4) to TRANSFER 8WI’DX (k&i)<br />
w20 s4Ft 8l20-6890 1 CFVPIG (AOJ7) to MCTHEKBC ARD (A17Jll)<br />
WSl SR 08762-20102 1 TlmFmT1CCupLw(A21)toTRANsFEB~(A24)<br />
ws2 8Il 08766-20101 1 TmT POET 2 CouPm (A22) to TRANSFER SwrIcH (A24)<br />
W33 4w 08766-60221 1 LED (A23Jl) to TmT SFX IIwElzFACE (A26J2)<br />
ws7 26R 812~8670 1 DI8K DRIVE (A20) to CPU/PIG (ASJS)<br />
W38 4oIl 8120-6882 1- TEST SJZT INTEIBACE (A26Jl) to MCTHKIBCARD (A17J2)<br />
� nW Wire Bundle (m b the number of wires in the bundle)<br />
aI Ribbon Cable (n is the number of wires in the ribbon)<br />
SR Semi-Rigid Coax Cable<br />
13-12 Replawabls Partr
w32,<br />
w33'<br />
W38<br />
\ I I<br />
A22kl ill AilWl<br />
Cables, Bottom<br />
,wzo<br />
/ ,<br />
.\A137<br />
Replaceable Parts 13-13
Cables, Front<br />
Bof.<br />
wig.<br />
Type* opt <strong>HP</strong>art<br />
Number<br />
etJr Demription<br />
AlWl SOB 8ECM429 1 FP KEYBOARD (AlJl) to FP INTERFACE (A2~2)<br />
BPGlWl 6B (part. of BPGl) 1 BF’Q to FE’ JNTFXFACE (A2J6)<br />
Wl SE 08762-20286 1 EOUBCE ASSY (ASW4) to !l’BANSF’EB SWllKH (A24)<br />
w2 SE 08753-20201 1 FP (B CHANNEL IN) to SAMPLE&B (A4)<br />
ws SE 08762-20286 1 TEST PORT 1 COUPLEB (A21) to SAMPLBB-A (AS)<br />
w4 SE 08763-20287 1 TEST FORT 2 CXWF’LEB (A22) to SAMPLE&B (A6)<br />
w17 SOB 8l20-84.31 1 FP INTEBFACE (A2Jl) to MUMEBBABD (A17Jl)<br />
Wl8 SW 08711-6ooS7 1 FTINTEBFACFi(A2J4)toFP(PBOBEPOWEB)<br />
WlO SW 08711-6ooS7 1 F’P INTERFACE (A2JS) to FP (PROBE POWFiB)<br />
W22 6B 8120-8408 1 FP INTBBFACB (A2J7) to JNmBTEB (A27)<br />
W2S SlB 8l2M4OO 1 FP INTEBFACX (A2J6) to DISPLAY (A18)<br />
W24 SE 08763-20220 1 SOuBcxASsY(AS)toFP(BcxANNFLOUT)<br />
W26 SE 087zG20008 1 FF(BCHANNELOUT)toFP(BCHANNFLIN)<br />
* nW Wire Bundle (n b the number of wire8 in the bundle)<br />
nB Bibbon Cable (n is the number of wires in the ribbon)<br />
SE Semi-Bigid Cvax Cable<br />
13-14 Replaceable Parts
w22 /<br />
W23<br />
I<br />
AIWI<br />
\<br />
RPGIWI<br />
hbles, Front<br />
sg658e<br />
ReplaceableParts 13-15
Bof.<br />
-&f.<br />
BlWl<br />
WlS<br />
w21<br />
W27<br />
W28<br />
Wm<br />
W3O<br />
WS6<br />
WS6<br />
Cables, Rear<br />
<strong>HP</strong>Fart<br />
Nnmbor<br />
(part of Bl)<br />
0876%60026<br />
8X20-6876<br />
8l2CM407<br />
86047-6ooo5<br />
86047-6ooo6<br />
8l2M468<br />
8l2IMS79<br />
G -1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
Deucription<br />
FAN (Bl) to MOTHERBOARD (A17J6)<br />
BFTEBENCE (Al2JS) to BP @XT BEF’)<br />
MOTBEBBOARD (A17Jl2) to Rp (VGA OUT)<br />
BF’ INTERFACE (AMJ4) to MOTHERBO ARD (A17J6)<br />
RF’ INTERFXCE (AMJlO) to BP (POBT 1 FUSE)<br />
RP JNTERFACE (A16Jll) to RP (POBT 2 FUSB)<br />
EtF INTERFACE (AMJS) to HIQH~lLlTY FBBQ BBF (A26Jl)<br />
CFWFIG (AQJl) to MOTHEF@OABD (A17J7)<br />
* nW<br />
8l2N3S82 1- CFTJ/PIQ (AQJ2) to MOTHEEBO ABD (A17J8)<br />
Wire Bundle (A in the number of wires in the bundle)<br />
nB Ribbon Cable (n is the number of wirea in the ribbon)<br />
F Flexible Coax Cable<br />
13-l 6 Replaceable Parts
i<br />
w30<br />
\ ’<br />
w21<br />
W36<br />
\<br />
w35<br />
Cables, Rear<br />
sg6113e<br />
ReplaceableParts 13-17
Cables, Source<br />
Ref. Type* opt lxPP8l-t QQ Description<br />
-ig. Number<br />
AsA2Wl 1OR os76s-6oos4 1 EYC (ASAS) to AIL (A3AZJ.3)<br />
A3A4Wl 4W os76s-6oos6 1 CAm CSC (ASA4) to AU (ASA2J2)<br />
AsWl SR 08753-20107 1 Fxo (AsA3) to SCURCE ASSY (A3)<br />
Asw2 SR 0876%200% 1 CAm CSC (ASA4) to SCURCE ASSY (A3)<br />
ASWS SR 0876.520106 1 SCURCE ASSY (A3) to AlTENUA’ItIR (ASA6)<br />
A3w4 SR 0876%20111 1 ATIENUAl0R (ASA6) to Wl<br />
ASWS 1OR 6002-0701 1 AIL (ASA2Jl) to AlTBNUA’ltIR (ASA6)<br />
s nW Wire Bundle (n ia the number of wirea in the bundle)<br />
nR Rttbon Cable (n is the number of wirea in the ribbon)<br />
SR Semi-R&id Coax Cable<br />
13-18 Replaceable Parts
A3A4Wl<br />
BACK<br />
I<br />
A3W3<br />
A3W4<br />
\<br />
FRONT<br />
Cables, Source<br />
sg662e<br />
Replaceable Parts 13-l 9
Ref. OptlOll<br />
-ig.<br />
Front Panel Assembly, Outside<br />
1<br />
-k<br />
1 076<br />
2<br />
2 076<br />
EmPart Qw Description<br />
Number<br />
03763-30163 1 ovERlAY, ILnvER PRONT PANEL<br />
03763-30170 1 ovERLAY, LOWE61 PRONT PANEL<br />
03763aon24 1 FPREPAlRKlTsTDl<br />
037~go926 1 F’PREPADZKIT#0761<br />
1610-0033 1 GRouND Porn<br />
206o-ooo6 1 NtJTHExlAa2<br />
2190-0067 1 wA3HERLK.266ID<br />
0376340016 1 LINEBUTION<br />
03763-30211 1 OVERLAY, UPPER FRONT PANEL<br />
1 Comes with gasket, upper and lower overlays.<br />
13-20 Rsplawable Parts
Front Panel Assembly, Outside<br />
sg663e<br />
ReplaceablsParts 13-21
1<br />
2<br />
Ref.<br />
mk!.<br />
A18<br />
3<br />
4<br />
6<br />
7<br />
5<br />
0<br />
LO<br />
11<br />
I2<br />
13<br />
14<br />
14<br />
16<br />
16<br />
hl<br />
!I2<br />
LlWl<br />
427<br />
w17<br />
W22<br />
W2S<br />
Front Panel Assembly, Inside<br />
-<br />
cm-1<br />
2tm<br />
Km<br />
5B<br />
3lB<br />
lDT<br />
<strong>HP</strong>&l-t<br />
NWllblEr<br />
o872lMool2<br />
2oao-0686<br />
08763-60326<br />
lOOO-0006<br />
0872luNxlo4<br />
08768-00136<br />
08763-20300<br />
lo&w1864<br />
JM4oe4ooo3<br />
0872o-4oo10<br />
0616-0430<br />
0515-0306<br />
140&1430<br />
0616-0372<br />
087l2-60036<br />
206OG144<br />
08763-00112<br />
0624-0828<br />
08720-60127<br />
08753-60311<br />
812~8430<br />
onw3068<br />
8-1<br />
8l2&8408<br />
812&8409<br />
1<br />
1<br />
1<br />
4<br />
1<br />
1<br />
DISPLAY HOLD DOWN<br />
DISPLAY LAMP<br />
I4mREPLAcmfENTAssY<br />
DISPLAY GLASS<br />
GROUNDlNG C&IF’S<br />
FILLEBPLATEl<br />
FRCNT PANEL<br />
1 RR3 (INCLUDES CABLE AND HARDWARE)<br />
1 RPG KNOB<br />
1 FLUBBEB KFXPAD<br />
8 SCBBW SM 3.0 6CWPNTX<br />
4 SCREW SMM 3.0 14cWPNTx<br />
2 CABLE CLG<br />
3 SCREW SrdM 3.0 8cwPNTx<br />
2 CABLE ASSY, PBOBE POWEFt<br />
2 NUT, HEX 3/E32<br />
1 PLATE, PBOBE POWEB<br />
2 SCREW, TAFTING<br />
1 BD ASSY-F’RONT PANEL<br />
1 BD ABSY-FXONT PANEL INTEBF’ACE<br />
1 All’OA2<br />
1 ASSY-WVERlER<br />
1 A2TOA17<br />
1 CABLE-m lNTF (AzJ7) to IrwEmER (A27)<br />
1- CABLE-FT lNTF (AZJS) to DISPLAY (Al8)<br />
1 Not shown. F&places A18 and display glass for Option 1DT. Order new grounding clips when replacing<br />
filler plate.<br />
! Order with A2 and LCD hold down.<br />
13-22 Replaceable Parts
(4 Places)<br />
Front Panel Assembly, Inside<br />
(4 Places) (2 Places) WI7 sg6122e<br />
Replaceable Partr 13-23
1<br />
2<br />
Ref.<br />
Ddg.<br />
3 (AM)<br />
4<br />
6<br />
6<br />
7<br />
7<br />
s<br />
0<br />
0<br />
10<br />
11<br />
l2<br />
18<br />
14<br />
16<br />
16<br />
16<br />
17<br />
17<br />
18<br />
LO<br />
Rear Panel Assembly<br />
34R<br />
lD6<br />
13-24 ReplaceableParts<br />
EPFart<br />
Number<br />
8l2&6407<br />
86047~0ooo5<br />
0872CM30138<br />
08763-60026<br />
08416-60036<br />
1261-2942<br />
2loo-oo84<br />
1251-7812<br />
0516-0370<br />
306@1192<br />
0516-0372<br />
08-1<br />
3160-0281<br />
6960-0410<br />
21oo-o102<br />
206o-oo36<br />
o4oo-0271<br />
2110-0047<br />
140&0112<br />
0o@oo27<br />
-<br />
QQ<br />
Ikx3cripison<br />
-<br />
1 BP INTEBFACE (A16J4) TO MB (A17J6) (W27)<br />
2 FUSEIFARNESGASSEMBIX<br />
1 BD ASSY-BEAB PANEL INTEBFACE (A16)<br />
1 AWY-EXTERNAL IimJmENcE CABLE (W13)<br />
1 ASSY-FAN<br />
4 FASIENEBCONNBPLOCK<br />
2 WASHER LK .l&MlDlO<br />
2 NUT STDF .327L 632<br />
4 F~CONNBPLOCK<br />
4 SCREW SbfM35Xl6 CWFWTX<br />
4 FLATWASHER<br />
10 scREwsMM3.ox8 CWFNTX<br />
1 REABPANELSHEETMFXAL<br />
1 FAN GUABD<br />
1 HOLE PLUG<br />
1 EIOLF, PLUG<br />
8 WASHER LK .472ID<br />
8 NUT BEX 15/32-32<br />
1 ERObfMlW SN.6-616ID<br />
2 FUSE<br />
2 FUSE CAP<br />
2 HOLE PLUGS<br />
- [we “Rear Panel Assembly, Option IDS”)
(8 Places)<br />
9 15<br />
13<br />
0<br />
PART OF FAN<br />
es)<br />
Rear Panel Assembly<br />
sg665e<br />
ReplaceableParts 13-25
Rear Panel Assembly, Option lD6<br />
Ref. OptlOll <strong>HP</strong>Rut<br />
Number<br />
wig.<br />
1 lD6 126&1860<br />
2 ID6 0516-0374<br />
3 IDS 3OW1646<br />
4 lD6 2l@O-OO6S<br />
6 lD6 206&0064<br />
6 lD6 0516-0430<br />
7 lD6 08763-00078<br />
8 6otw0027<br />
A26 ID6 08763-60168<br />
W30 lD6 81206468<br />
13.26 ReplaceableParts<br />
1 ADAFTER-CQAX<br />
Description<br />
1 ScBFm-MAcHINEM3.ox1ocW-PN-TX<br />
1 WASHEEF’LAT.606IDNY<br />
1 WA8HERMCK.606ID<br />
1 NUT-SPEc~1/228<br />
1 SCBEW-MACHINEM~.OX~CW-PN-TX<br />
1 BRACKET-OSCBD<br />
2 HOIXPLUGS<br />
1 BDASSY-EIGHtYFABILlTYF’BJCQREiF<br />
1 EPINTEBFACE(AlBJS)to~GE~~FBEQREF(A26Jl)
Rear Panel Assembly, Option lD5<br />
sg666e<br />
Replawable Parts 13-27
Hardware, lbp<br />
1<br />
2<br />
3<br />
Ref.<br />
D&g.<br />
4<br />
5<br />
6<br />
7<br />
8<br />
0<br />
10<br />
11<br />
12<br />
13<br />
14<br />
15<br />
OptlOll HFPart<br />
Nnmber<br />
061C27OQ<br />
08753-40014<br />
08763-20062<br />
0516-2035<br />
0516-0468<br />
08753-00107<br />
05X-0374<br />
0616-0377<br />
0516-0374<br />
08753-00129<br />
08753-00113<br />
0515-0374<br />
06X-0374<br />
08763mO40<br />
0516-1400<br />
13-28 Replaceable Parts<br />
cm Descriptiox~<br />
2 SCBEW-~M3.OxlOCW-FLTX<br />
1 STABlLrzER-PCBOARD<br />
1 STABlLlzER CAP<br />
1 SCBEW-bfACHNEM3.Ox16PGF‘LTX<br />
2 SCBEW-MACBJNE?d3.5x8CW-PN-TX<br />
1 AIRFIDWCOVER<br />
2 3CBEW-MACHINEIK3.ox1oCW-PN-TX<br />
2 SCREW-MACHINE M3.6xlOCW-PN-TX<br />
2 SCREW-MACBINEM~.OXI~CW-PN-TX<br />
1 GSF' COVER<br />
1 BBACKFXdOUFtCE(SCUBCESl'BAP)<br />
6 SCREW-- bs3.ox1oCW-m-TX<br />
16 SCIGW-b%MBlNE Bi3.OxlOCW-PN-TX<br />
1 CLlPPlJWER GROUND<br />
3 3CBEWXACHINEM3.5x8pOF‘LTX
(4 Places)<br />
(2 Places)<br />
(6 Places) \ /<br />
(15 Places)<br />
(2 Places)<br />
Hardware, lbp<br />
\ 1<br />
12 Places)<br />
sg6111e<br />
Replaceable Parts 13-29
Hardware, Bottom<br />
1330 Replawable Parts<br />
lIPRut<br />
Number<br />
0516-0468<br />
0616-0430<br />
05150667<br />
0516-0430<br />
0515-1400<br />
0516-0375<br />
05X-0468<br />
etJr Dwcription<br />
4 3CREw-IUCHINEM3.6x8CW-PN-Tx<br />
8 SCRFM-MACHINE M3.0~6 CW-F'N-TX<br />
2 3CRJSW-MACHINEIK~.OXZ~CW-PN-TX<br />
5 SCREW-MACHINEM~.OX~CW-PN-TX<br />
3 SCREW-MACHINE~ M3.6x8PcwLTx<br />
8 3CREW-MACHINEM3.Ox16CW-PN-TX<br />
4 8CREW-MACHINEM3.Oxl6CW-PN-TX
sgbb0e<br />
(L Places) (3 Places)<br />
6<br />
(2 PLacesI x 5<br />
(3 Places)<br />
(3 Places)<br />
Replaceable Parts 13-3 1
Hardware, Front<br />
Ref. option <strong>HP</strong>- Qw Desdptioll<br />
Ddg. Nnmber<br />
1 06180665 1 SMM 3.0x14 CWFNTX<br />
2 03763-00137 1 BRACKEl’-CABLERJPPCRl<br />
3 1260-1251 2 ADAFTERFEMALE-SMA<br />
4 0616-1946 1 SCRJ!X’-MAcEIINEM3.Ox6F’GFLTx<br />
1332 Replaceable Parts
sg669e<br />
Hardware, Front<br />
I2 Places)<br />
Replaceable Parts 1333
Hardware, Test Set Deck<br />
OptlOll <strong>HP</strong>Part<br />
Nnmber<br />
13-34 Replaceable Parts<br />
08753-20206<br />
08753-40013<br />
08763-20293<br />
08763-00127<br />
0516-1046<br />
0516-0376<br />
0616-0430<br />
0616-0667<br />
0616-0430<br />
G<br />
- 8<br />
Description<br />
SHOULDER SCREW<br />
8 GUIDE WASHER<br />
8 FXESURESFRING<br />
1 CHAsslEmsET<br />
1 SCREW-~ M3.Ox 6 FGFTrTX<br />
2 SCREW-MACHlNE I&3.0x 16 CW-F'N-TX<br />
1 SCREW-- M3.0~ 6 CW-FN-TX<br />
2 SCREW-MACHINE &43.0x26 CW-PN-TX<br />
5- SCXEW-MACHINE M3.Ox 6 CW-FN-TX
(5 Places)<br />
Hardware, ‘l&t Set Deck<br />
(2 Places)<br />
I<br />
(8 Places)<br />
A<br />
\<br />
sg670e<br />
Replaceable Partr 13-35
Hardware, Disk Drive Support<br />
Bof. OptiOll EPFart etJr Demription<br />
D&it.<br />
Nnmbor<br />
1 0616-1048 4 SCBEW-M 2.6X4 sCXXJST BEAD, BBX.<br />
2 08720-00021 1 DISXDFtIVEiBRACXFd<br />
2 08763-00162 1 DISKDlUVEBRACICd<br />
3 0616-0274 4 SCREWS -- M 3.0x10 CWPNTX<br />
1 Your analyzer may use either pin 08720-00021 or p/n 08753-00152. <strong>Analyzer</strong>s manufactured<br />
prior to February 1999 use p/n 0872040021. kuxlyzers manufactured after February 1900, or<br />
that have been repaired or upgraded with <strong>Service</strong> Kit p/n 08720-40190, use p/n 08753-40152.<br />
Contact Hewlett-Packard if you need help identifying replacement parts for your analyzer.<br />
13-36 Replaceable Parts
(4 Places) Q<br />
G--,, (4 Places)<br />
Hardware, Disk Drive Support<br />
Replaceable Parts 13-37
Hardware, Memory Deck<br />
llef. OptlOll lIPF8l-t Qm De8criptlom<br />
Dd3.<br />
Number<br />
1 0515-0468 4 3cBEw-MACHINE M2.6xSCW-PIGTX<br />
2 0616-0433 2 GCREW-MACHINE WLOX 6 cw-PN-TX<br />
8 0616-0676 1 Ecmzw-m bB.ox14cw-PN-TX<br />
4 08763-00128 1 DECJGMEtdORY<br />
1338 Replaceable Parts<br />
‘0 Places)
Replaceable Partr 1339
Hardware, Preregulator<br />
Ref. Option lwF&rt QQ Description<br />
D-&f.<br />
Number<br />
1 2110-0730 1 FUSE 3A 260V NON-TIblF, DELAY (CSAAJL)<br />
1 21104666 1 FUSE 3.16A 260V NON-TIME DELAY (IEC)<br />
2 08i’63-00066 1 BRACKFFF-PBEBEGULATOR<br />
3 0515-1400 2 SCREW-MACHINE M&6x8 CW-FLTX<br />
Al6 0876s-6ooo8 1 PBEBEGULAlXIR-ASSY<br />
Al6 037~6ooo3 1 PlumEGuLAToR-AWY (imBLJm-EXCHANQE)<br />
1340 ReplaceableParts
IL-<br />
Hardware, Preregulator<br />
Al5<br />
sg673e<br />
ReplaceableParts 1341
Chassis parts, Outside<br />
Ref.<br />
D-k!.<br />
Option EPmrt<br />
Numbez<br />
etJr Description<br />
1 6041-0176 1 TIUMSTRIP<br />
2 08720-00078 1 COvEI-mP<br />
3 6041-0188 4 BEABsrAmxmF<br />
4 0515-1402 4 SCBEWS?dM3.68PCPNTX<br />
6 6041-0187 2 BBABCAP-SIDESTBAP<br />
6 06181384 4 SCREW SMM 5.0 10 PCFIZ'X<br />
7 0872O-OOOS1 2 SIDEGTRAP<br />
8 0872~OOOSO 2 COVEIMIDE<br />
0 6041-0186 2 FBONTCAP-SIDESTBAP<br />
10 08720-00070 2 COVEE-B(yIToM<br />
11 1460-1345 2 FaoTELEvAmR<br />
12 6041-0167 4 FQOT<br />
13 087~80066 1 LABELzCAUTIONWABNINQ<br />
14 OS76HO174 1 LABELzUXA!lTONDIAGBA?d<br />
16 0876S-40016 1 LINEBUTlDN<br />
16 6180-8600 1 MYLARlJwuLAmR<br />
1342 ReplaceableParts
(4 Places) (4 Places)<br />
(Underside)<br />
0 @<br />
14<br />
P<br />
(4 Places)<br />
Chassis parts, Outside<br />
5<br />
/” (2 Places)<br />
6<br />
2(4 Places)<br />
A (2 Places)<br />
A<br />
--CT<br />
(2 Plac ES)<br />
-@<br />
Places)<br />
sQ57Le<br />
Replaceable Parts 1343
Chassis Parts, Inside<br />
OptiOll <strong>HP</strong>Part.<br />
Number<br />
6022-llQ0<br />
6021-6808<br />
03753-60614<br />
0616-2036<br />
0616-04SO<br />
08720-ooow<br />
1460-1673<br />
0872o-ooo77<br />
-<br />
etJr<br />
0515-1400 1 3MMS.6x8PCFIXX<br />
0876%60270 1- BDM-MOTHERBOARD<br />
1. Part of CABDCAGJVMOTEDZRasaembly (item S).<br />
1344 ReplaceableParts<br />
1<br />
1<br />
1<br />
16<br />
1<br />
1<br />
1<br />
1<br />
FRONTPANELFRAME<br />
REARFRAME<br />
AssY-cARDcAQ~oTHER<br />
scREwaMM4.ox7PcFIxx<br />
BCREWMS.Ox6CWPNTX*<br />
lNslJLAmR smli*<br />
SPRINGEXl'ENSION.13SOD<br />
SWllVHEOD*<br />
Demxiption<br />
1
Chassis Parts, Inside<br />
(16 Places)<br />
sg675e<br />
ReplaceableParts 1345
Miscellaneous<br />
<strong>HP</strong>8753TOOLKrrindudesthefdlow2ng:<br />
RFCARLEINPUTR<br />
Demxiption<br />
ExTENDERBoARDAwEMBLY-BECEIVEB<br />
ExTENDERBoARDAwEMBIx-SOURCE<br />
EXTENDERRQARDASSEMBIX-CARDCAGE<br />
ADAPTER3dALEsMBlDMALEsb5<br />
ADAPTER-bfALETYPENTOFEMALF,SMA<br />
CABLE ASSEMBIX<br />
BAQ-ANTBLUTC 18x16<br />
service ‘Ibols<br />
Documentation<br />
087~6002S<br />
OS76%2002S<br />
aS76S-60010<br />
oS76S-6oo20<br />
087~60166<br />
l26o-0660<br />
l2wl260<br />
6061-1022<br />
8222-1132<br />
<strong>HP</strong>S76SEEKAMPLEPROGRAMDISKtl oS76S-1oL32S<br />
<strong>HP</strong>S76SEEKAMPLEPROGRAMDlSK#2 oS76%loo2o<br />
WS76SESKRVICECXJlDE oS76iwoS74<br />
<strong>HP</strong>S76SEOPTIONO11SERVICEMJIDE oS76S-oo404<br />
<strong>HP</strong>S76SEMANUALSETindvdeeulsfdlosoing: OS76MOS66<br />
EPS76SEIWIBPROGRA?dMINQANDrnMMAND REFERKNCEGUIDE 087~SoSed<br />
<strong>HP</strong>S76SE<strong>HP</strong>RASICPROGRAMMINC3RXAMPLMtXlIDE oS76mo413<br />
HpS763EUsEB'S~~E(~ndudes~~~erena$~~~~ 087~SOS67<br />
<strong>HP</strong>S76SEINSTALhWO N/QUICKSlARTWJIDE oS76HoS6o<br />
<strong>HP</strong>S76SESY6I‘EM VERlFICATIONANDPERFORMANCRTEGIs oS76moSe4<br />
BpS753EO~ONO11~~8ETi~~tkef~~~ oS76S-90370<br />
EPS76SEEF-lBPlW3 RAMMINQANDmMMAND REFERRNCRCXJIDE 0876%eoS66<br />
<strong>HP</strong>S76SEEPRASICPROGRAMMIN~EXAWLE5WIDE 08753-90418<br />
IIpS763EOpTIONO11U~SQuIDE(Cndudas~~~~llBT6s~rs) 087~SOS71<br />
<strong>HP</strong>S76SEOPTIONOlllN~ ON/QUICKS'HRTMJIDE oS76SaS72<br />
BpS753EOpTIONO11~~vEBIFlcATONANDpEBFoBMANcETFsTB OS76WOSO6<br />
upgrwk Kite<br />
HARMONR3MEA8uBEMENTUPGRADEKlT s76SEUoPToo2<br />
6OHzUPGRADEKlTFoR<strong>HP</strong>S76SE 8753RU0PT006<br />
6GHzUPGRADEKlTFVR<strong>HP</strong>S76SEOPTIONOll 876SELJOPT611<br />
TlMEDOMAlNUPGRADEKlT 876SEUOPTOlO<br />
FlRMB?AREUPGRADEKlT s76SEUoPTooo<br />
l3IQH-sTABlLlTY FBEQuENcY REPERENcERETRoFlTKlT 876SRUOFTlD6<br />
1346 Replaceable Parts
FXMALEIiHBCONNFXXUR<br />
PEMALETBTSETI/O<br />
FEbfALEPARALLELPORT<br />
RHS2CONNEC'NIR<br />
7-mmTESTPORlB<br />
Description<br />
Protective Cape for Conneetor~<br />
PEMALETYPBNTESTPORTS(OPTIONS011AND076)<br />
FUSEO.6A l26VNON-TJbfEDELAYO.26xO.27<br />
FUSEO.76A l26VNON-TIMEDELAYO.26xO.27<br />
FUSE lA l26VNON-TIMRDELAYO.26xO.27<br />
FUSE 2A l26VNON-TIME DRLAYO.26xO.27<br />
FUSE4A E?SVNON-TMEDELAYO.26xO.27<br />
HF-lB CABLE, lM (3.3 Fr)<br />
IIp-ISCABLE,2BI(6.6FT)<br />
Hf-IB CABLE,4M(13.2 FlyI<br />
<strong>HP</strong>-E? CABLE, 0.6M(l.6FI9<br />
ADJUSTABLE ANTWSTICWRISFBTRAP<br />
6FTGROUNDlNGCORDfawrktsh-ap<br />
F~esnsedontheA8PbstRegdator<br />
<strong>HP</strong>-IBcablea<br />
ESDsllpplies<br />
2x4Fl'ANTMiWICTABLEMATWlTH16FTGROUNDWlRE<br />
ANTlsTATIc HEEL STRAP for we cm am4iuotivf3jioors<br />
<strong>HP</strong>S76SEKEYBOARDOVERLAYfurtx&rnuZ k4?gmwd<br />
RAcKM0uNTKlTwlTH0uTIiANDLEs<br />
RACKMOUNTKlTWlTHlLUUDLES<br />
FRoNTHANDLE<br />
FUX'PYDISKS,3.6INCHDOUBIJMIDEZD(boxof10)<br />
l262-46W<br />
l262-46OO<br />
1262-4607<br />
1401-0240<br />
211O-OLM6<br />
2110-0424<br />
211@0047<br />
2110-0426<br />
BPlOS33A<br />
<strong>HP</strong>lOS2SB<br />
WlW33C<br />
0300-1367<br />
OSOO-OOSO<br />
o200-0707<br />
Replaceable Parts 1347
able 13-1.<br />
Reference Designations, Abbreviations, and Options<br />
REFEBENCE DESIGNATIONS<br />
A ....................................... ..as#embl y<br />
B ..................................... ..fan;moto r<br />
J....... electrical connector (stationary portion); jack<br />
.......................... rotary puke generator<br />
W..................... cable; transmkion path; wire<br />
ABBREVIATIONS<br />
A ........................................ ..ampe re<br />
......................... automatic level control<br />
ASSY .................................... ..assemb ly<br />
AUX .................................... ..a uxilhuy<br />
BD ........................................... board<br />
COAX ...................................... coaxial<br />
CPU ......................... central processing unit<br />
CW .......................... conical washer (screws)<br />
D ......................................... diameter<br />
.......................... electro6t8tic diecharge<br />
....................................... external<br />
EYO .................................. YIQwcillatm<br />
FL ................................ ilathead (screws)<br />
Fp ..................................... front panel<br />
FBAGN ............................... .fractional N<br />
FREQ ................................... frequency<br />
QHZ ...................................... glgaheriz<br />
.................................... hexagonal<br />
<strong>HP</strong> ................................ HewlettZaclcard<br />
<strong>HP</strong>-IB ................ Hewlett-Packard interface bun<br />
Hx .............................. hexrecess(mcrews)<br />
ID .................................. inside diameter<br />
IF ........................... intermediate frequency<br />
I/o .................................... input/output<br />
............................ llghbemitting diode<br />
1348 ReplaceableParts<br />
M......................................... ..mete m<br />
M ................................. metricha&vare<br />
..................................... megahertz<br />
mm ................................... ..millimete m<br />
MON ..................................... ..monito r<br />
NOM ...................................... nominal<br />
NY ......................................... ..nylon<br />
OD ................................ outside diameter<br />
opt ....................................... ..optao n<br />
...................................... wcillator<br />
PN ...................................... ..panhe ad<br />
PC .............................. patchlock(acrews)<br />
PC .................................. printedciEuit<br />
PIff ...................... peripheral interface group<br />
PN ................................ panhead(Bcrewa)<br />
...................................... reference<br />
REPL .................................. replacement<br />
RP ...................................... rear panel<br />
SH ....................... ..mAce t head cap (mcmws)<br />
............................ lmxn?cear(-#)<br />
ic ...................................... ..quant~ ty<br />
V ............................................. volt<br />
.................................. wire formed<br />
WI0 ...................................... ..withou t<br />
YIQ ............................. yttrium-iron garnet<br />
OPI’IONS<br />
DO!?, ......................... harmonica measurement<br />
006............................ ..6QHzperformanc e<br />
010 .................................... time domain<br />
011 ..................................... w/o test set<br />
076 ................................ ..76ohmteat= t<br />
ID6 ........................... 10 Mfizpreci8ion ref
14<br />
Assembly Replacement and Post-Repair<br />
Procedures<br />
This chapter contains procedures for removing and replacing the major<br />
assemblies of the <strong>HP</strong> <strong>8753E</strong> network analyzer. A table showing the<br />
corresponding post-repair procedures for each replaced assembly is located at<br />
the end of this chapter.<br />
Assembly Replasemeat and Post-Repair Procedures 14-l
Replacing an Assembly<br />
The following steps show the sequence to replace an assembly in an <strong>HP</strong> <strong>8753E</strong><br />
<strong>Network</strong> <strong>Analyzer</strong>.<br />
1. Identify the faulty group. Refer to Chapter 4, “Start Troubleshooting Here.”<br />
Follow up with the appropriate troubleshooting chapter that identifies the<br />
faulty assembly.<br />
2. Order a replacement assembly. Refer to Chapter 13, “Replaceable Parts.”<br />
3. Replace the faulty assembly and determine what adjustments are necessary.<br />
Refer to Chapter 14, “Assembly Replacement and Post-Repair Procedures”<br />
4. Perform the necessary adjustments Refer to Chapter 3, “Adjustments and<br />
Correction Constants n<br />
5. Perform the necessary performance tests. Refer to Chapter 2, “System<br />
Verification and Performance Tests m<br />
Warning These servicing instructions are for use by qualmed<br />
personnel only. lb avoid electrical shock, do not perform<br />
any servicing unless you are qualified to do so.<br />
Warning<br />
The opening of covers or removal of parts is likely to<br />
expose dangerous voltages. D~SCOMCC~ the instrument from<br />
all voltage sources while it is being opened.<br />
Warning The power cord is co~ected to internal capacitors that may<br />
remain live for 10 seconds after disconnecting the plug from<br />
its power supply.<br />
Caution Many of the assemblies in this instrument are very susceptible<br />
to damage from ESD (electrostatic discharge). Perform the<br />
following procedures only at a static-safe workstation and wear<br />
a grounding strap.<br />
14-2 Assembly Replacement and Post-Repair Procedures
Procedures described in this chapter<br />
The following pages describe assembly replacement procedures for the<br />
<strong>HP</strong> <strong>8753E</strong> assemblies listed below:<br />
w LineFuse<br />
� Covers<br />
w Front Panel Assembly<br />
w Front Panel Interface and Keypad Assemblies (Al, A2)<br />
� Display, Display Lamp, and Inverter Assemblies (Al& A27)<br />
� Rear Panel Assembly<br />
w Rear Panel Interface Board Assembly (Al6 )<br />
N A3 Source Assembly<br />
� A4, A5, A6 Samplers and A7 Pulse Generator<br />
� AS, AlO, All, A12, A13, Al4 Card Cage Boards<br />
� A9 CPU/PIG Board<br />
� A9BTl Battery<br />
w Al5 Preregulator<br />
� Al7 Motherboard Assembly<br />
� A19 Graphics Processor<br />
� A20 Disk Drive<br />
w A21, A22 Test Port Couplers<br />
� A23 LED Board<br />
w A24 Transfer Switch<br />
� A25 Test Set Interface<br />
� A26 High Stability Frequency Reference (Option lD5)<br />
� BlFhn<br />
Assembly Replacement and Post-Repair Procedures 14-3
Line Fuse<br />
Tools Required<br />
� small slot screwdriver<br />
Removal<br />
Warning For continued protection against fire hazard, replace fuse<br />
only with same type and rating (3 A 250 VAC). The use of<br />
other fuses or materials is prohibited.<br />
1. Disconnect the power cord.<br />
2. Use a small slot screwdriver to pry open the fuse holder.<br />
3. Replace the failed fuse with a 3 AF 250 V F fuse. See “Hardware,<br />
Preregulator” in Chapter 13 to find the part number.<br />
Replacement<br />
1. Simply replace the fuse holder.<br />
144 Assembly Replaoement and Post-Repair Procedures
FUSE IN USE<br />
‘INSERT SCREWDRIVER,<br />
PRY OPEN<br />
Line Fuse<br />
qg652d<br />
Assembly Replacement and Post-Repair Procedures 14-6
Covers<br />
Tools Required<br />
� T-10 TORX screwdriver<br />
� T-15 TORX screwdriver<br />
� T-20 TORX screwdriver<br />
� T-25 TORX screwdriver<br />
Removing the top cover<br />
1. Remove both upper rear feet (item 1) by loosening the attaching screws<br />
(item 2).<br />
2. Loosen the top cover screw (item 3).<br />
3. Slide cover off.<br />
Removing the side covers<br />
1. Remove the top cover.<br />
2. Remove the lower rear foot (item 4) that corresponds to the side cover you<br />
want to remove by loosening the attaching screw (item 5).<br />
3. Remove the handle assembly (item 6) by loosening the attaching screws<br />
(item 7).<br />
4. Slide cover off.<br />
Removing the bottom cover<br />
1. Remove both lower rear feet (item 4) by loosening the attaching screws<br />
(item 5).<br />
2. Loosen the bottom cover screw (item 8).<br />
3. Slide cover off.<br />
14-6 Assembly Replacement and Post-Repair Procedures
Covers<br />
sg677e<br />
Assambly Replacement and Post-Repair Procedures 14-7
Front Panel Assembly<br />
Tools Required<br />
� T-10 TORX screwdriver<br />
� T-15 TORX screwdriver<br />
� small slot screwdriver<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
� 5/16-inch open-end torque wrench (set to 10 in-lb)<br />
Removal<br />
1. Disconnect the power cord.<br />
2. Remove the front bottom feet (item 1).<br />
3. Remove all of the RF cables that are attached to the front panel (item 2).<br />
4. Remove the line button (item 6).<br />
5. Remove the trim strip (item 3) from the top edge of the front frame by<br />
prying under the strip with a small slot screwdriver.<br />
6. Remove the six screws (item 4) from the top and bottom edges of the frame.<br />
7. Slide the front panel over the test port connectors<br />
8. Disconnect the ribbon cable (item 5). The front panel is now free from the<br />
.<br />
mstrument.<br />
Replacement<br />
1. Reverse the order of the removal procedure.<br />
Note When reconnecting semirigid cables, it is recommended that the<br />
connections be torqued to 10 in-lb.<br />
14-8 Assembly Replacement and Post-Repair Procedures
Front Pctnel Assembly<br />
Asssmbly Replacement and Post-Repair Procedures 14-9
Front Panel Keyboard and Interface Assemblies<br />
(Al, A21<br />
Tools Required<br />
� T-10 TORX screwdriver<br />
� T-15 TORX screwdriver<br />
� small slot screwdriver<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
H 5/16-inch open-end torque wrench (set to 10 in-lb)<br />
Removal<br />
1. Remove the front panel assembly from the analyzer (refer to “Front Panel<br />
Assembly” in this chapter).<br />
2. DiSCOMeCt all cables from the front panel interface board (items 1, 2, 3, 4, 6,<br />
and 7).<br />
� Disconnect item 4 by pulling up on the comers of the connector base.<br />
This will release the cable for easy removal. Damage may occxr to the<br />
w-n-r (f this step is not followed.<br />
H Disconnect item 7 by sliding the ribbon cable away from its cable clamp.<br />
3. Remove the four screws (item 5), attaching the interface board (A2).<br />
4. Remove the nine screws from the Al front panel board to access and remove<br />
the rubber keypad.<br />
Replacement<br />
1. Reverse the order of the removal procedure.<br />
Caution Damage may result if the following step is not followed.<br />
2. To reconnect item 7, ensure that the ribbon cable is placed squarely into both<br />
of its cable clamps<br />
14-l 0 Assembly Replacement and Post-Repair Procedures
Front Panel Keyboard and Interface Assemblies<br />
sg680e<br />
Assambly Replasement and Post-Repair Procedures<br />
14-l 1
Display Lamp and Inverter Assemblies<br />
(AH, A27)<br />
Tools Required<br />
� T-8 TORX screwdriver<br />
� T-10 TORX screwdriver<br />
� T-15 TORX screwdriver<br />
� small slot screwdriver<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
� 5116~inch open-end torque wrench (set to 10 in-lb)<br />
Removal<br />
1. Remove the front panel assembly (refer to “Front Panel Assembly” in this<br />
chapter).<br />
2. Disconnect the cables (items 2, 3 and 4) from the Al assembly.<br />
3. Remove two screws (item 8) from the mounting plate (7) to remove the<br />
inverter (A27).<br />
4. Remove the three screws (item 1) that attach the mounting plate and display<br />
to the front panel.<br />
5. Remove the mounting plate and the display (A18) from the front panel.<br />
Note The bottom half of the following ffgure depicts the rear view of<br />
the Al8 assembly with the mounting plate removed. Use the<br />
location of the display lamp cable (item 4) to aid in orientation.<br />
6. Remove the three screws (item 5) from the outside of the display.<br />
7. Pull the lamp (item 6) out with a curving side motion, as shown.<br />
14-12 Assembly Replacement and Post-Repair Procedures
Replacement<br />
1. Reverse the order of the removal procedure.<br />
2. Be sure to route ribbon cable 2 through the cable clamp on the A2 assembly<br />
and the LCD mounting plate (item 7).<br />
Caution Be sure that cables are plugged in square and correct. Failure to<br />
do so will result in serious component damage.<br />
Caution Do not exceed 3 in-lb when replacing the self-tapping screws<br />
(item 8).<br />
Assembly Replacement and Post-Repair Procedures 14-13
Display Iamp and hverter Assemblies<br />
(3 Places)<br />
14-14 mmbly Replacement and Post-Repair Procedures<br />
shg6113e
Rear Panel Assembly<br />
Tools Required<br />
� T-10 TORX screwdriver<br />
� T-15 TORX screwdriver<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
Removal<br />
1. Disconnect the power cord and remove the top (item 1) and bottom covers<br />
(refer to “Covers” in this chapter).<br />
2. Remove the four rear standoffs (item 2).<br />
3. If the anaiyzer has option lD5, remove the BNC jumper from the high<br />
stability frequency reference (item 3).<br />
4. Remove the four screws (item 5) that attach the interface bracket to the<br />
rear panel.<br />
5. Remove the six screws (item 6) and (item 7), that attach the preregulator to<br />
the rear panel.<br />
6. Remove the six screws (item 8) from the rear frame: two from the top edge<br />
and four from the bottom edge.<br />
7. Remove the screw from the pc (item 9) board stabiiizer and remove the<br />
stabilizer.<br />
8. Lift the reference board (A12) from its motherboard connector and<br />
disconnect the flexible RF cable from its connector on Al2 (item 10)<br />
9. Identify the wiring harness leading to the VGA connector (item 4). Follow<br />
this harness back to its connection on the motherboard. The air flow cover,<br />
attached by two screws, wiII have to be removed to get to this connection.<br />
Disconnect the VGA wire harness at this point.<br />
14-l 6 Assembly Replawment and Post-Repair Procedures
Bear Panel Assembly<br />
10. Pull the rear panel away from the frame. Disconnect the ribbon cable<br />
(item 11) from the motherboard connector, pressing down and out on<br />
the connector locks. Disconnect the wiring harness (item 12) from the<br />
motherboard.<br />
Replacement<br />
1. Reverse the order of the removal procedure.<br />
I<br />
\ @I<br />
12 on Top)<br />
I4 on Bottom)<br />
(2 Places)<br />
(3 Places)<br />
I4 Places)<br />
(4 Places)<br />
sg682e<br />
Assembly Replacement and Post-Repair Procedures 14-17
Rear Panel Assembly<br />
14-18 Assembly Replacement and Post-Repair Procedures
Rear Panel Interface Board Assembly (A16)<br />
Tools Required<br />
� 9/16 hex nut driver<br />
� 3/16 hex nut driver<br />
� T-10 TORX screwdriver<br />
� T-15 TORX screwdriver<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
Removal<br />
1. Disconnect the power cord and remove the top and bottom covers (refer to<br />
“Covers” in this chapter).<br />
2. If the analyzer has option lD5, remove the high-stabiiity frequency reference<br />
jumper (item 1).<br />
3. Remove the hardware that attaches the seven BNC connectors to the rear<br />
panel (item 2).<br />
4. Remove the hardware that attaches the interface connector to the rear panel<br />
(item 3).<br />
5. Remove the rear panel from the analyzer (refer to “Rear Panel Assembly” in<br />
this chapter).<br />
6. If the analyzer has option lD5, disconnect the cable (item 4) from the rear<br />
panel interface board.<br />
7. Disconnect the ribbon cable (item 5) from the rear panel interface board.<br />
Replacement<br />
1. Reverse the order of the removal procedure.<br />
14-20 Assambly Replacement and Post-Repair Procedures
(7<br />
(2<br />
(Opt ID5 only)<br />
Rear Panel Interface Board Assembly<br />
only)<br />
sg604e<br />
Asssmbly Replasement and Post-Repair Procedures 14-21
A3 Source Assembly<br />
‘Ibols Required<br />
� T-15 TORX screwdriver<br />
� 5/16-inch open-end torque wrench (set to 10 in-lb)<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
Removal<br />
1. Disconnect the power cord and remove the top cover (refer to “Covers” in<br />
this chapter).<br />
2. Remove the source bracket (item 1) by removing four screws (It might be<br />
necessary to disconnect a flexible cable from the B sampler.)<br />
3. Disconnect the flexible cable W26.<br />
4. Disconnect the semirigid cable Wl.<br />
5. Lift the two retention clips (item 2) at the front and rear of the source<br />
assembly to an upright position.<br />
6. Move Wl to the side while lifting the source high enough to provide wrench<br />
clearance for W24. ‘lb lift the A3 source assembly, use the source bracket<br />
handle (item 3).<br />
7. Disconnect the semirigid cable W24.<br />
8. Remove the source assembly from the instrument.<br />
14-22 Assembly Replacement and Post-Repair Procedures
W2L<br />
W26<br />
w1 -<br />
,<br />
AwnMy Replacclment sad Post-Repair Procedures<br />
A3 Source Assembly<br />
. A3<br />
14-23
A3 Source Assembly<br />
Replacement<br />
1. Check the connector pins on the motherboard before reinstallation.<br />
2. Slide the edges of the sheet metal partition (item 4) into the guides at the<br />
sides of the source compartment. Press down on the module to ensure that it<br />
is well seated in the motherboard connector.<br />
3. Push down the retention clips Reconnect the two semirigid cables (Wl and<br />
W24) and one flexible cable (W26) to the source assembly.<br />
Note When reconnecting semirigid cables, it is recommended that the<br />
connections be torqued to 10 in-lb.<br />
4. Reinstall the source bracket.<br />
5. Reconnect the flexible cable to the B sampler.<br />
14-24 Assembty Replacement and PostRepair Procedures
A4, AS, A6 Samplers and A7 Pulse Generator<br />
!lbols Required<br />
� Needle-nose pliers<br />
w T-10 TORX screwdriver<br />
� 5/16-inch open-end torque wrench (set to 10 in-lb)<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
Removal<br />
1. Disconnect the power cord and remove the top cover (refer to “Covers” in<br />
this chapter).<br />
2. To remove the B sampler (A6), you must remove the source bracket (item 1).<br />
3. Disconnect all cables from the top of the sampler (A4/A5/A6) or pulse<br />
generator (A7).<br />
4. Remove the screws from the top of each sampler assembly. Extract the<br />
assembly from the slot.<br />
Note ‘lb remove the A (A5) or R (A4) sampler, lhst remove the cable<br />
on the B (A6) sampler.<br />
Note If you are removing the pulse generator (A7), the grounding<br />
clip, which rests on top of the assembly, will become loose once<br />
the four screws are removed. Be sure to replace the grounding<br />
clip when reinsMhng the pulse generator assembly.<br />
14-26 Assembly Replacement and Past-Repair Procedures
w5 ’<br />
(A4 t o A7)<br />
W6 ’<br />
IA5 t o A7)<br />
w7’<br />
(A6 to A7) \<br />
1<br />
\<br />
:I<br />
;1<br />
A4, A5, A6 Samplers and A7 Pulse Generator<br />
\<br />
A7<br />
/<br />
All<br />
/*I4<br />
1 W8<br />
(AIIJI t o AL)<br />
1 w9<br />
(AIIJI t o A7)<br />
Assembly Replacement and Post-Repair Procedures 14-27
A4, A5, A6 Samplers and A7 Pulse Generator<br />
Replacement<br />
1. Check the connector pins on the motherboard before reinstallation.<br />
2. Reverse the order of the removal procedure.<br />
Note � When reconnecting semirigid cables, it is recommended that<br />
the connections be torqued to 10 in-lb.<br />
� Be sure to route W8 and W9 as shown. No excess wire should<br />
be hanging in the All and Al4 board slots. Routing the wires<br />
in this manner will reduce noise and crosstalk.<br />
14-26 Assembly Replacement and Post-Repair Procedures
A8, AlO, A11, A12, A13, Al4 Card Cage Boards<br />
Tools Required<br />
� T-10 TORX screwdriver<br />
� T-15 TORX screwdriver<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
Removal<br />
1. DiscOMect the power cord and remove the top cover (refer to “Covers” in<br />
this chapter).<br />
2. Remove the screw from the pc board stabilizer and remove the stabilizer.<br />
3. Lift the two extractors located at each end of the board. Lift the board from<br />
the card cage slot, just enough to disconnect any flexible cables that may be<br />
connected to it.<br />
4. Remove the board from the card cage slot.<br />
Replacement<br />
1. Check the connector pins on the motherboard before reinstallation.<br />
2. Reverse the order of the removal procedure.<br />
Note De sure to route W8 and W9 as shown. No excess wire should<br />
be hanging in the All and Al4 board slots Routing the wires in<br />
this manner will reduce noise and crosstalk in the instrument.<br />
14-30 Assembly Replawmeat and Past-Repair Procedures
AS, AlO, All, A12, A13, Al4 Caxd Cage Boards<br />
W26 From Al2 A15Wl A10 A8 All A12 Al3<br />
/<br />
WI3<br />
(AlZJ3 T O<br />
REAR PANEL<br />
EXT REFi<br />
Al4<br />
W2b<br />
, (AIZJL T O A31<br />
WI2<br />
, (A13J2 T O A12J-B<br />
WI1<br />
, tA14J3 T O A13Jl)<br />
’ WI0<br />
(A14J2 T O A12Jl)<br />
----..<br />
%4J, T O A71<br />
1 W8<br />
fAllJ1 T O AL)<br />
sg609e<br />
Assembly Replacement and Post-Repair Procedures 14-31
A9 CPU Board<br />
Ibols Required<br />
� T-10 TORX screwdriver<br />
w T-15 TORX screwdriver<br />
w ESD (electrostatic discharge) grounding wrist strap<br />
Removal<br />
1. Disconnect the power cord.<br />
2. Remove the top and bottom covers (refer to “Covers” in this chapter).<br />
3. Remove the rear panel assembly, following steps 4 through 6 of “Rear Panel<br />
Assembly. n<br />
4. Turn the analyzer upside down.<br />
5. Pull the rear panel away from the frame as shown in the following 6gure.<br />
6. Disconnect the four ribbon cables (W20, W35, W36, and W37) from the CPU<br />
board (AS).<br />
7. Remove the three screws (item 2) that secure the CPU board (A9) to<br />
the deck. Slide the board towards the front of the instrument so that it<br />
disconnects from the three standoffs (item 3).<br />
8. Lift the board off of the standoffs<br />
Replacement<br />
1. Reverse the order of the removal procedure.<br />
2. Leave the bottom cover off in order to perform the post repair procedures<br />
located at the end of this chapter.<br />
14-32 Assembly Replacement and Post-Repair Prosedures
w37<br />
w20 \<br />
A9 CPU Board<br />
sg6112e<br />
Assembly Replacement and Post-Repair Procedures 14-33
A9 CPU Board<br />
14-34 Assembly Replasemeat and Post-Repair Procedures<br />
I,” VII - c -<br />
-A9<br />
sg690e
A9BTl Battery<br />
Tools Required<br />
� T-10 TORX screwdriver<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
� soldering iron with associated soldering tools<br />
Removal<br />
1. Remove the A9 CPU/PIG board (refer to “A9 CPU Board” in this chapter).<br />
2. Unsolder and remove AOBTl from the A9 CPU/PIG board.<br />
warning<br />
Replacement<br />
Battery A9BTl contains lithium. Do not incinerate or<br />
puncture this battery. Dispose of the discharged battery in<br />
a safe manner.<br />
DO NOT THROW BAlTERIES AWAY BUT<br />
COLLECT AS SMALL CHEMICAL WASTE.<br />
1. Make sure the new battery is inserted into the A9 board with the correct<br />
polarity.<br />
Warning Danger of explosion if battery is incorrectly replaced.<br />
Replace only with the same or equivalent type<br />
recommended.<br />
2. Solder the battery into place.<br />
3. Replace the A9 CPU/PIG board (refer to “A9 CPU Board” in this chapter).<br />
14-36 Assembly Replacement and Post-Repair Procedures
II II d #I<br />
0<br />
A9BTl Battery<br />
,A9<br />
,A9BTl<br />
sg691e<br />
Asssmbly Replacement and Post-Repair Procedures 14-37
A15 Preregulator<br />
Tools Required<br />
� T-10 TORX screwdriver<br />
� T-15 TORX screwdriver<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
Removal<br />
1. Remove the rear panel (refer to “Rear Panel Assembly” in this chapter).<br />
2. Remove the two remaining screws from the top of the rear frame.<br />
3. Disconnect the wire bundle (A15Wl) from A&J2 and A17J3.<br />
4. Remove the preregulator (A15) from the frame.<br />
Replacement<br />
1. Reverse the order of the removal procedure.<br />
Note � When reinsMing the preregulator (A15), make sure the three<br />
grommets (item 1) on A15Wl are seated in the two slots (item<br />
2) on the back side of the preregulator and the slot (item 3) in<br />
the card cage wall.<br />
� After reinsMing the preregulator (A15), be sure to set the<br />
line voltage selector to the appropriate setting, 115 V or<br />
230 V.<br />
14-36 Asssmbly Replacameat and Past-Repair Procedures
I b2<br />
Al5<br />
(2 Placed<br />
A8J2<br />
(3 Places)<br />
\<br />
A17J3<br />
Al5 Preregulator<br />
sg692e<br />
Assembly Replacement and Post-Repair Procedures 1448
Al7 Motherboard Assembly<br />
Tools Required<br />
� T-10 TORX screwdriver<br />
� T-15 TORX screwdriver<br />
� T-20 TORX screwdriver<br />
� smaII slot screwdriver<br />
� 2.5-mm hex-key driver<br />
� 5/16-inch open-end torque wrench (set to 10 in-lb)<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
Removal<br />
lb remove the Al7 motherboard assembly only, perform the following steps to<br />
remove all assemblies and cables that connect to the motherboard.<br />
1. Disconnect the power cord and remove the top, bottom, and side covers<br />
(refer to “Covers” in this chapter).<br />
2. Remove the front panel assembly (refer to “Front Panel Assembly” in this<br />
chapter).<br />
3. Remove the rear panel assembly (refer to “Rear Panel Assembly” in this<br />
chapter).<br />
4. Remove the preregulator (refer to “A15 Preregulator” in this chapter).<br />
5. Remove the graphics processor (refer to “A19 Graphics Processor” in this<br />
chapter).<br />
6. Remove the test set deck (item 3) by removing the three screws (item 4)<br />
from the bottom and four screws (item 5) from the side frames. For clarity,<br />
the Sgure on the next page does not show the assemblies attached to the<br />
test set deck.<br />
7. Remove the CPU board (refer to “A9 CPU Board” in this chapter).<br />
8. Remove the memory deck (item 1) by removing three screws (item 2) from<br />
the bottom and four screws (item 6) from the side frames<br />
1440 Assembly Replacement and Post-Repair Procedures
Al7 Motherboard Assembly<br />
9. Remove the source assembly (refer to “A3 Source Assembly” in this<br />
chapter).<br />
10. Remove the samplers and pulse generator (refer to “A4, A5, A6 Samplers<br />
and A7 Pulse Generator” in this chapter).<br />
11. Remove the card cage boards (refer to “A& AlO, All, A12, A13, Al4<br />
Card Cage Boards” in this chapter). Continue with step 12 to remove the<br />
motherboard, or step 13 to remove the motherboard/card cage assembly.<br />
12. To disconnect the motherboard (item 7), remove the 34 riv screws (item 8).<br />
Important: Do not misplace ang of these screws.<br />
v<br />
sg693e<br />
Assembly Replawmeat and Post-Repair Procedures 14-41
A 17 Motherboard Assembly<br />
lb remove the Al7 motherboard assembly along with the card cage, continue<br />
with the following step:<br />
13. Referring to the figure on the following page, remove the front frame (item<br />
1) and rear frame (item 6) by removing the attaching screws (item 7). At<br />
this point, only the motherboard/card cage assembly should remain. This<br />
whole assembly is replaceable.<br />
1442 Assembly Replacement and Post-Repair Procedures
Replacement<br />
1. Reverse the order of the removal procedure.<br />
A 17 Motherboard Assembly<br />
Aswmbly Replacement and Past-Repair Procedures 1443
A19 Graphics Processor<br />
Tools Required<br />
� T-10 TORX screwdriver<br />
� T-15 TORX screwdriver<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
Removal<br />
1. Disconnect the power cord.<br />
2. Remove the top cover (refer to “Covers” in this chapter) and front panel<br />
(refer to “Front Panel Assembly” in this chapter.)<br />
3. Remove the six screws (item 1) from the GSP cover (item 2) and lift off.<br />
4. Swing out the handles (item 3) and pull the GSP board (item 4) out of the<br />
analyzer.<br />
Replacement<br />
1. Check the connector pins on the motherboard before reinstaktion.<br />
2. Reverse the order of the removal procedure.<br />
1444 Assembly Replacement and Psi-Repair Procedures
(6 Plocesl<br />
Cc 2<br />
” P<br />
A19 Graphics Processor<br />
sg695e<br />
Awembly Replacement and Post-Repair Procedures 1446
A20 Disk Drive Assembly<br />
Tools Required<br />
w #2 ball-end hexdriver with long shaft<br />
� T-8 TORX screwdriver<br />
� T-10 TORX screwdriver<br />
� T-15 TORX screwdriver<br />
� T-20 TCRX screwdriver<br />
� small slot screwdriver<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
Required Diskette<br />
� 3.5” diskette, 1.44 MEl, formatted (DOS)<br />
Prelimiuary Instructions<br />
Prepare the new disk drive assembly for installation in the analyzer. The<br />
Installation Note included in the service kit provides details for this procedure.<br />
1. Disconnect the power cord and remove the top, bottom, and left side-covers<br />
(refer to “Covers” in this chapter).<br />
2. Turn the analyzer over, so that the bottom faces up.<br />
3. Disconnect the ribbon cable (item 1) that connects to the disk drive from its<br />
connector on the CPU board.<br />
4. Remove the four screws (item 2) that secure the disk-drive bracket to the<br />
side of the analyzer, and remove the complete disk drive assembly.<br />
Note Save the screws removed in this step for use later when<br />
installing the new disk drive bracket.<br />
5. Disconnect the ribbon cable from its connection on the disk drive.<br />
1446 Assembly Replacemeat and Post-Repair Procedures
A20 Disk Drive Assembly<br />
sg696e<br />
Assembly Replacement and Post-Repair Procedures 1447
A20 Disk Drive Assembly<br />
Install the replacement disk drive.<br />
1. Connect the existing ribbon cable to the replacement disk drive.<br />
Note Make sure that the disk drive connector-contacts touch the<br />
ribbon cable contact areas (the ribbon-cable contact areas must<br />
face the contacts in the disk drive connector). Also assure that<br />
the connector is properly locked.<br />
2. Slide the disk drive and bracket assembly into the analyzer.<br />
3. Route the ribbon cable through the side access hole. Avoid twisting the<br />
cable-duplicate the original folds made to the cable.<br />
4. Fasten the disk-drive bracket to the side of the analyzer frame, using the four<br />
screws saved in step 4 (immediately above).<br />
5. Remove the trim strip from the top of the front panel.<br />
6. Remove the screw from the top left comer of the front panel. This will allow<br />
access to one of the #2 hex screws of the disk-drive assembly.<br />
7. Aligu the disk drive with the front panel, and tighten the three screws that<br />
fasten the disk drive to the disk-drive bracket. Do not over-tighten.<br />
8. ReCOMeCt the ribbon cable to the CPU board.<br />
Note Make sure that the CPU connector-contacts touch the ribbon<br />
cable contact areas (the ribbon-cable contact areas must face<br />
the contacts in the CPU connector). Also assure that the<br />
connector is properly locked.<br />
Test the disk-eject function, and adjust if required.<br />
1. Insert a diskette into the drive.<br />
2. Eject the diskette from the drive.<br />
3. If the diskette does not eject properly, loosen and re-tighten the three screws<br />
that hold the disk drive to the disk-drive bracket:<br />
a. Loosen the two screws that are readily accessible.<br />
b. Loosen the upper-most front screw through the access hole in the top-left<br />
area of the front frame.<br />
14-46 Assambly Replacement and Post-Repair Procedures
c. Center the disk drive in the opening.<br />
d. Re-tighten all three screws.<br />
Reinstall the covers.<br />
1. Reinstall the remaining top front-panel screw in the left corner.<br />
2. Reinstall the trim strip.<br />
A20 Disk Drive Assembly<br />
3. Reinstall the covers. If needed, refer to “Covers” in this chapter for help in<br />
performing this task.<br />
Assembly Replacement and Past-Repair Prowdures 1449
A21, A22 Test Port Couplers<br />
Tools Required<br />
� T-10 TORX screwdriver<br />
� T-15 TORX screwdriver<br />
� small slot screwdriver<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
� 5/16-inch open-end torque wrench (set to 10 in-lb)<br />
Removal<br />
1. DiscOMeCt the power cord and remove the bottom cover (refer to “Covers”<br />
in this chapter).<br />
2. Disconnect the small bias wire from the test set interface board (A25).<br />
For coupler A2 1 disconnect the gray wire (A2 1 W 1).<br />
For coupler A22 disconnect the gray wire (A22Wl).<br />
3. Disconnect the two semirigid cables from the coupler assembly.<br />
For coupler A21 disconnect W3 and W31.<br />
For coupler A22 disconnect W4 and W32.<br />
4. Remove the four screws, washers, and pressure springs that secure the<br />
coupler to the test set deck. Remove the coupler.<br />
5. Remove the pressure springs<br />
Replacement<br />
1. Reverse the order of the removal procedure.<br />
Note � If you’re instalhng a new coupler, the gold lead on the<br />
feedthru capacitor (item 1) must be curt@&@ bent at<br />
90 degrees to prevent it from shorting to the bottom cover.<br />
� When reconnecting semirigid cables, it is recommended that<br />
the connections be torqued to 10 in-lb.<br />
14-50 Assembly Replacement and Past-Repair Procedures
A21, A22 ‘I&t Port Couplers<br />
w32 A22Wl w31 w21 AZIWI<br />
I3<br />
\ u:l<br />
w3 1<br />
L-<br />
sg697e<br />
Assembly Replacement and Post-Repair Procedures 14-51
A23 LED Board<br />
Tools Required<br />
� T-10 TORX screwdriver<br />
� T-15 TORX screwdriver<br />
� small slot screwdriver<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
� 5/16-inch open-end torque wrench (set to 10 in-lb)<br />
Removal<br />
1. Disconnect the power cord and remove the bottom cover (refer to “Covers”<br />
in this chapter).<br />
2. Remove the front panel (refer to “Front Panel Assembly” in this chapter).<br />
3. Remove the A22 test port coupler (refer to “A21, A22 Test Port Couplers” in<br />
this chapter).<br />
4. Disconnect W33 from the LED board (A23).<br />
5. Remove the screw (item 1) from the front of the test set deck.<br />
6. Remove the LED board (A23).<br />
Replacement<br />
1. Reverse the order of the removal procedure.<br />
1452 Assembly Replacement and Pest-Repair Procedures
I II II III ’ +~Z I II<br />
0<br />
A>3<br />
A23 LED Board<br />
sg698e<br />
Assambly Replacement and Post-Repair Procedures 14-53
A24 Transfer Switch<br />
Tools Required<br />
� T-10 TORX screwdriver<br />
� T-15 TORX screwdriver<br />
� 5/16-inch open-end torque wrench (set to 10 in-lb)<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
Removal<br />
1. Disconnect the power cord and remove the bottom cover (refer to “Covers”<br />
in this chapter).<br />
2. Disconnect A24Wl from 53 on the test set interface board (A25).<br />
3. Disconnect the three semirigid cables (Wl, W31, and W32) from the transfer<br />
switch (Az4).<br />
4. Remove the two screws (item 1) that secure the transfer switch.<br />
Replacement<br />
1. Reverse the order of the removal procedure.<br />
Note When reconnecting semirigid cables, it is recommended that the<br />
connections be torqued to 10 in-lb.<br />
14-64 Assembly Replacement and Post-Repair Procedures
A24 Transfer Switch<br />
w32 w31 J3 A2LWl<br />
(2 Places)<br />
sg699e<br />
Assembly Replasement and Post-Repair Prosedures 14-55
A25 Test Set Interface<br />
Tools Required<br />
� T-10 TORX screwdriver<br />
m T-15 TORX screwdriver<br />
� 5/164nch open-end torque wrench (set to 10 in-lb)<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
Removal<br />
1. DiscOMeCt the power cord and remove the bottom cover (refer to “Covers”<br />
in this chapter).<br />
2. Disconnect all cables and wires (A21W1, A22W1, W33, and W34) from the<br />
test set interface board (A25).<br />
3. Remove the five screws (item 1) that secure the test set interface board.<br />
Replacement<br />
1. Reverse the order of the removal procedure.<br />
14-56 Assembly Rsplasement and Post-Repair Procadures
(5 Places)<br />
w34 A24Wl<br />
lb A25 0 IIIIIIlI<br />
I - I IIA ,411 I<br />
A22Wl w33 AZIWI<br />
A25 lkst Set Interface<br />
I<br />
sg6100e<br />
Assambly Replacement and Post-Repair Procedures 14-57
A26 High Stability Frequency Reference (Option lD5)<br />
Assembly<br />
!bols Required<br />
� T-10 TORX screwdriver<br />
� T-15 TORX screwdriver<br />
� Q/16-inch hex-nut driver<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
Removal<br />
1. Remove the rear panel (refer to “Rear Panel Assembly” in this chapter).<br />
2. Disconnect W30 from the high stability frequency reference board (A26).<br />
3. Remove the BNC connector nut and washer from the u 10 MI-Ix PRECISION<br />
REFERENCE” connector (item 1) on the rear panel.<br />
4. Remove the screw (item 4) that attaches the lD5 assembly to the rear panel.<br />
5. Remove the screw (item 2) that secures the high stability frequency<br />
reference board (A26) to the bracket.<br />
6. Slide the board out of the bracket. Be careful not to lose the plastic spacer<br />
washer (item 3) that is on the BNC connector as the board is being removed.<br />
Replacement<br />
1. Reverse the order of the removal procedure.<br />
Note Before reinserting the high stability frequency reference board<br />
(A26) into the bracket, be sure the plastic spacer washer<br />
(item 3) is on the BNC connector.<br />
M-58 Assembly Replacement and Post-Repair Procedures
A26 High Stability Frequency Reference (Option lD5) Assembly<br />
INSIDE<br />
0<br />
OUTSIDE<br />
- w30<br />
sg6101e<br />
Assembly Replacement and Post-Repair Procedures 14-59
Bl Fan Assembly<br />
Tools Required<br />
� 2.5-mm hex-key driver<br />
� T-10 TORX screwdriver<br />
� T-15 TORX screwdriver<br />
� ESD (electrostatic discharge) grounding wrist strap<br />
Removal<br />
1. Remove the rear panel (refer to “Rear Panel Assembly” in this chapter).<br />
2. Remove the four screws (item 1) that secure the fan and fan cover to the<br />
rear panel.<br />
Replacement<br />
1. Reverse the order of the removal procedure.<br />
Note The fan should be installed so that the direction of the air Bow<br />
is away from the instrument. There is an arrow on the fan<br />
chassis indicating the air flow direction.<br />
14-60 Assembly Replacement and Post-Repair Procedures
(4 PLACES)<br />
Bl Fhn Assembly<br />
hg628d<br />
Assembly Replacement and Pest-Repair Procedures 14-61
Post-Repair Procedures for <strong>HP</strong> <strong>8753E</strong><br />
The following table lists the additional service procedures which you must<br />
perform to ensure that the instrument is working correctly, following the<br />
replacement of an assembly. These procedures can be located in either<br />
Chapter 2 or Chapter 3.<br />
l3yfbrm the procedures in the order that th,eg are listed in the table<br />
‘Jhble 14 1. Belated <strong>Service</strong> Procedures<br />
Replaced Alyjlwtallentd W?l%C&iOll<br />
-1Y clbrection constants (ch. 3) (a. 2)<br />
Al Front Panel None SWViCK?lbStO<br />
Keyboard service lbt 23<br />
A2 Pront Panel None SeIViWWO<br />
hterf~ service lbt 23<br />
service l&t 12<br />
lbtS66-80<br />
A3 source A9 Switch Positions lbst Port Output Frequency Range<br />
sourceDefcc(%st44) &Accuracy<br />
Pretune Default CC (l&t 46) lkst Port Output Power Accumcy<br />
Anal~BuscC(‘Ibst46) lbst Port Output Power Range aud<br />
Source Pretune CC (l&t 48) b-m<br />
RF Output Power CC (l&t 47) lbst Port Output/Input Hanuonics<br />
Sampler Maguitude and Phase CC (lb& 53) (Option 002 only)<br />
Cavity OBciUstor Frequency CC (J&t 54)<br />
Source Spur Avoidance Tracking<br />
EEPROM Backup Disk<br />
MIAS/A6 Samplers A9 Switch Positions Miuimu~~ R Channel Level<br />
Sampler Magnitude and Phase CC (‘l&t 53) (if R sampler replaced)<br />
IF Amplifier CC (Test 51) lbtPorLcrosetallr<br />
EEPROM Backup Disk 7&t Port Input Prequency Response<br />
A7 Pulse Generator A9 Switch Positions l&t Port Input Frequency Response<br />
Sampler Magnitude and Phase CC (‘l&t 63) l&t Port Frequency Range and<br />
EEPROM Backup Disk<br />
A8 Post Regulator A9 Switch Positions SenriCeMO<br />
Cavity oscibtor Frequency CC (lbt 54) Check A8 test point voltagea<br />
Source 8purAvoidance Tracking<br />
EEPROM Backup Disk
R@M%3d<br />
AS&Xllbl~<br />
49 CPU<br />
FXPROM Backup<br />
)isk Available)<br />
‘able 14-l. Related <strong>Service</strong> Procedures (2 of 3)<br />
A4snstments/<br />
Correction cons~ts (oh. 8)<br />
A9 Switch Positions<br />
Load Pirmware<br />
CC Retrieval<br />
Serial Number CC (Test 55)<br />
Option Number CC (!Ibst 66)<br />
Operator’s Check<br />
service T&t, 21<br />
servi~W22<br />
V&cation<br />
P- 2)<br />
49 CPU A9 Switch Positions l&t Port Output Frequency Range<br />
EEPROM Backup Load Fhmware and Accuracy<br />
)isk Not Available) Serial Number CC (Test 66) l&t Port Output Power Accuracy<br />
Option Number CC (‘Rx& 60) ‘l&t Port Output Power Range and<br />
SourceDefCC(Jbt44) Linearity<br />
Pretune Default CC (lbt 46) !kst Port Receiver Dynamic Accuracy<br />
AnabgBusCC(‘Ibt40) l&t Port Input Frequency Response<br />
Cal Kit Default (Test 57)<br />
Source Pretune CC (!Ibst 48)<br />
RF Output Power Cc (Tbst 47)<br />
Sampler Maguitude and Phase CC (lbt 53)<br />
ADCLinearityCC(Test62)<br />
lF Amplifier Cc (lbt 51)<br />
Cavity O&llator Frequency CC (lb& 54)<br />
EEF’ROM Backup Disk<br />
LlO Digital IF A9 Switch Positions l&t Port Input Noise Ploor Level<br />
AnalogBwccW46)<br />
Test Port CTc&alk<br />
Sampler Magnitude and Phase CC (‘lbt 53) System Trace Noise<br />
AM: Linearity CC (!kst 52)<br />
IF AmpWer CC (Ylbst 51)<br />
EEPROM Backup Disk<br />
Lll Phase Lock A9 Switch Positions<br />
Anal~BusCC(‘Ibst46)<br />
Pretune Default CC (lbst 46)<br />
Source Pretune CC (l&t 48)<br />
EXPROM Backup Disk<br />
L12 Reference A9 Switch Positions<br />
HighLowBand%3nsition<br />
Fresuency Accuracy<br />
EEPROM Backup Disk<br />
Minimum R channel Level<br />
lkst Port Output Prequency Range<br />
ad-<br />
7&t Port Output Prequency Range<br />
ad-<br />
Assembly Replacsment and Post-Repair Procedures 14-63
gepLacea<br />
As!3embly<br />
Al3 Fractional-N<br />
(Analog)<br />
A14 Fractional-N<br />
(Digital)<br />
Al6 Preregulator<br />
Al6 Rear Panel<br />
Interface<br />
A17 Motherboard<br />
‘able 14-1. Related <strong>Service</strong> Procedures (3 of 3)<br />
A@wtments/<br />
correction Constants (ch. 2)<br />
A9 Switch Positions<br />
Fractional-N Spur and<br />
FM Sideband<br />
EEFROM Backup Disk<br />
A9 Switch Positions<br />
Fractional-N Frequency Range<br />
Fractional-N Spur Avoidance<br />
andFMSideband<br />
EEPROM Backup Disk<br />
None<br />
None<br />
None<br />
Verilicatlon<br />
(Q. 2)<br />
l&t Port Output Frequency Range<br />
andAccuracy<br />
!I& Port Output Frequency Range<br />
and-<br />
Self-l&t<br />
Internal l&t 13,<br />
Rear Panel<br />
Observation of Display<br />
lksk306-80<br />
A18 Display None Ob6ervation of Display<br />
lkSW66-SO<br />
A19 Graphics System None Observation of Display<br />
Processor lkStS69-SO<br />
A20 Disk Drive none none<br />
A21 l&t Port Coupler RF Output Power CC (‘lbst 47) lbtPortcn#ratallr<br />
Sampler Maguitude and Phase CC (‘l&t 53) ‘l&t Port Frequency Response<br />
A2!2 ‘Test Port Coupler Sampler Magnitude and Phase CC (Test 53) Bst Port crosstalk<br />
� lkst Port Frequency Response<br />
A23BdAssyLED none Self-lbt (Chapter 4)<br />
A24 Transfer Switch none Test Port croestalk<br />
A26 l&t Set Interface none Self-l&t (Chapter 4)<br />
A26Highstabilit.y Frequency Acauacy ment Tkst Port Frequency Range<br />
Frequency Reference (Option lD5) =dAccuracg<br />
* Hewlett-Packard verifies source output performance on port 1 only. Port 2 source output<br />
performance is typical.<br />
M-64 Assembly Replacement and Post-Repair Procedures
Safety and Licensing<br />
Notice<br />
15<br />
The information contained in this document is subject to change without notice.<br />
Hewlett-Packard makes no warranty of any kind with regard to this material,<br />
including but not limited to, the implied warranties of merchantability and<br />
fitness for a particular purpose. Hewlett-Packard shall not be liable for errors<br />
contained herein or for incidental or consequential damages in connection with<br />
the furnishing, performance, or use of this material.<br />
Certillcation<br />
Hewlett-Packard Company certihes that this product met its published<br />
specifications at the time of shipment from the factory. Hewlett-Packard further<br />
certihes that its calibration measurements are traceable to the United States<br />
National Institute of Standards and ‘Rxhnology, to the extent allowed by<br />
the Institute’s calibration facility, and to the calibration facilities of other<br />
International Standards Organization members<br />
Safety and licensing 16-l
Warranty<br />
This Hewlett-Packard instrument product is warranted against defects in<br />
material and workmanship for a period of three years from date of shipment.<br />
During the warranty period, Hewlett-Packard Company will, at its option, either<br />
repair or replace products which prove to be defective.<br />
For warranty service or repair, this product must be returned to a service<br />
facility designated by Hewlett-Packard. Buyer shall prepay shipping charges to<br />
Hewlett-Packard and Hewlett-Packard shall pay shipping charges to return the<br />
product to Buyer. However, Buyer shall pay all shipping charges, duties, and<br />
taxes for products returned to Hewlett-Packard from another country.<br />
Hewlett-Packard warrants that its software and Rrmware designated by<br />
Hewlett-Packard for use with an instrument will execute its programming<br />
instructions when properly installed on that instrrmtent. Hewlett-Packard does<br />
not warrant that the operation of the instrument, or software, or firmware will<br />
be uninterrupted or error-free.<br />
LIMITATION OF WARRANTY<br />
The foregoing warranty shall not apply to defects resulting from improper or<br />
inadequate maintenance by Buyer, Buyer-supplied software or interfacing,<br />
unauthorized modification or misuse, operation outside of the environmental<br />
specihcations for the product, or improper site preparation or maintenance.<br />
NOOTHER WARRANTY IS EXPRESSED OR IMPLIED. HEWLETT-<br />
PACKARD SPECIFICALLY DISCMIMS THE IMPLIED WARRANTIES OF<br />
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.<br />
EXCLUSIVE REMEDIES<br />
THE REMEDIES PROVIDED HEREIN ARE BUYER’S SOLE AND EXCLUSIVE<br />
REMEDIES. HEWLETT-PACKARD SHALL NOT BE LIABLE FOR ANY DIRECT,<br />
INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES,<br />
WHETHER BASED ON CONTRACT, TORT, OR ANY OTHER LEGAL THEORY<br />
Assistance<br />
Product muiwnce agreements and other customer assistance agremuMs are<br />
available for Hewlett-ltcckard products.<br />
Fbr any assistance, contact gour nearest Hewlett-Rzckurd Sales and semrice<br />
O?<br />
15-2 Safety and Licensing
Instrument Support Center<br />
HewlettPnckard Company<br />
Kw 4o3-0301<br />
Hcodqnsrtere<br />
Hewlettpackard S.A.<br />
160, Route du NanM’Avril<br />
1217 Meyrin 2Meneva<br />
swi~rlnnd<br />
(4122) 7S9.8111<br />
Great Britain<br />
Hewlett-Packard Ltd.<br />
E&dale Rand, Winnersh Triangle<br />
wokinghm, Berkrhlre RQ416D2<br />
Headqnarters<br />
HewlettZackard Company<br />
3496DeerCreekRoad<br />
plrlo Alto, California, USA<br />
94304-1316<br />
(416) 867-6927<br />
JIlppn<br />
HewlettGnckard Japan, Ltd.<br />
91 --alo, Hachioji<br />
lbkyo 192, Japan<br />
(81426) a2111<br />
Ohlna HewlettPackard Company<br />
3SEfeiSanHuanXlRoad<br />
shumg Yu ml<br />
Hai Dian District<br />
Beijing, china<br />
(36 1) 2566333<br />
Hewlett-Packard Sales and <strong>Service</strong> Oifices<br />
UNITEDsrATEs<br />
BUllOmAN HELD OPBE4!l’IONS<br />
Prsnce<br />
Hewlett-Packard France<br />
1 Avenue Du Canada<br />
Zone D’Activite De Courtaboeuf<br />
F-91947 Lea Ulia Cedex<br />
France<br />
(331)t5@826069<br />
INTElEON FIELD OPBBATIONB<br />
Alwtnliilb<br />
Hewlett-Packard Aust&ia Ltd.<br />
31-41 Joseph Street<br />
Blackbum, Victoria 3130<br />
(613) 896-2896<br />
Q--W<br />
Hewlett-Packard GmbH<br />
Hewlett-Packard Straae<br />
61362 F&d Hombug v.d.H<br />
Qe-Y<br />
(49 6172) 16-o<br />
HewlettPackard (Canada) Ltd.<br />
17690 South <strong>Service</strong> Bond<br />
Tram-CanadaHlghway<br />
Kirkland, Quebec H9J 2x8 Dian<br />
KS-4232<br />
singppore<br />
lhdWOJl<br />
Hewlettpackard Singapore (Pte.) Ltd. Hewlett-Packard lkiwan<br />
169 Beach Road 8th Floor, H-P Building<br />
#2soo Gateway west 327Fl1IIsingNorthEoad<br />
slnJ@pore 0718 Tkipei, lkiwan<br />
(ss) 291~9088 (336 2) 7l2-0404<br />
Safety and Licensing 15-3
Shipment for <strong>Service</strong><br />
If you are sending the instrument to Hewlett-Packard for service, ship the<br />
analyzer to the nearest <strong>HP</strong> service center for repair, including a description of<br />
any failed test and any error message. Ship the analyzer using the original or<br />
comparable antistatic packaging materials.<br />
154 Safety and licensing
Safety Symbols<br />
The following safety symbols are used throughout this manual. Familiarize<br />
yourself<br />
.<br />
with each of the symbols and its meaning before operating this<br />
mstrument.<br />
Caution Caution denotes a hazard. It calls attention to a procedure<br />
that, if not correctly performed or adhered to, would result in<br />
damage to or destruction of the instrument. Do not proceed<br />
beyond a caution note until the indicated conditions are fully<br />
understood and met.<br />
Warning<br />
Rbrning denotes a hazard. It calls attention to a procedure<br />
which, if not correctly performed or adhered to, could<br />
result in injury or loss of life. Do not proceed beyond<br />
a warning note until the indicated conditions are fkdly<br />
understood and met.<br />
Instrument Markings<br />
A! The instruction documentation symbol. The product is marked with<br />
this symbol when it is necessary for the user to refer to the instructions in the<br />
documentation.<br />
“CE” The CE mark is a registered trademark of the European Community. (If<br />
accompanied by a year, it is when the design was proven.)<br />
“ISMl-A” This is a symbol of an Industrial Scientific and Medical Group 1 Class<br />
A product.<br />
“CSA” The CSA mark is a registered trademark of the Canadian Standards<br />
Association.<br />
Safety and Licensing 15-5
Safety Considerations<br />
Note This instrument has been designed and tested in accordance<br />
with IEC Publication 1010, Safety Requirements for Electronics<br />
Measuring Apparatus, and has been supplied in a safe condition.<br />
This instruction documentation contains information and<br />
warnings which must be followed by the user to ensure safe<br />
operation and to maintain the instrument in a safe condition.<br />
Safety Earth Ground<br />
Warning This is a Safety Class I product (provided with a protective<br />
txwtbhg ground incorporated in the power cord). The mains<br />
plug shall only be inserted in a socket outlet provided<br />
with a protective earth contact. Any interruption of the<br />
protective conductor, inside or outside the instrument,<br />
is likely to make the instrument dangerous. Intentional<br />
interruption is prohibited.<br />
Warning Always use the three-prong AC power cord supplied with<br />
this product. Failure to ensure adequate earth groundiug by<br />
not using this cord may cause product damage.<br />
Before Applying Power<br />
Caution Before switching on this instrument, make sure that the<br />
analyzer line voltage selector switch is set to the voltage of the<br />
power supply and the correct fuse is installed.<br />
Caution If this product is to be energized via an autotransformer make<br />
sure the common terminal is connected to the neutral (grounded<br />
side of the mains supply).<br />
16-6 Safety and licensing
Servicing<br />
w-tit No operator serviceable parts inside. Refer servicing to<br />
qualified personnel. ‘Ib prevent electrical shock, do not<br />
remove covers.<br />
warning<br />
Warning<br />
These servicing instructions are for use by qualified<br />
personnel only. ‘Ib avoid electrical shock, do not perform<br />
any servicing unless you are qualified to do so.<br />
The opening of covers or removal of parts is likely to<br />
expose dangerous voltages. Disconnect the instrument from<br />
all voltage sources while it is being opened.<br />
w-g Adjustments described in this document may be performed<br />
with power supplied to the product while protective covers<br />
are removed. Energy available at many points may, if<br />
contacted, result in personal injury.<br />
Warning The power cord is connected to internal capacitors that may<br />
remain live for 10 seconds after disco~ecting the plug from<br />
its power supply.<br />
Warning<br />
For continued protection against fire hazard replace line<br />
fuse only with same type and rating (F 3AI25OV). The use of<br />
other fuses or material is prohibited.<br />
Safety and licensing 15-7
General<br />
Warning ‘Ib prevent electrical shock, disconnect the <strong>HP</strong> <strong>8753E</strong> from<br />
mains before cleaning. Use a dry cloth or one slightly<br />
dampened with water to clean the external case parts. Do<br />
not attempt to clean internally.<br />
Warning<br />
If this product is not used as specified, the protection<br />
provided by the equipment could be impaired. This product<br />
must be used in a normal condition (in which all means for<br />
protection are intact) only.<br />
Caution This product is designed for use in InsMlation Category II and<br />
Pollution Degree 2 per IEC 1010 and 664 respectively.<br />
Caution VENTILATION REQUIREMENTS: When inskUng the product in<br />
a cabinet, the convection into and out of the product must not<br />
be restricted. The ambient temperature (outside the cabinet)<br />
must be less than the maximum operating temperature of the<br />
product by 4O C for every 100 watts dissipated in the cabinet.<br />
If the total power dissipated in the cabinet is greater that 800<br />
watts, then forced convection must be used.<br />
warning<br />
16-8 Safety and licensing<br />
Install the instrument according to the enclosure protection<br />
provided. This instrument does not protect against the<br />
ingress of water. This instrument protects agains finger<br />
access to hazardous parts within the enclosure.
Compliance with German FFZ Emissions Requirements<br />
This network analyzer complies with German FIZ 526/527 Radiated Emissions<br />
and Conducted Emission requirements.<br />
Compliance with German Noise Requirements<br />
This is to declare that this instrument is in conformance with the German<br />
Regulation on Noise Declaration for Machines (Laermangabe nach der<br />
Maschinenlaernuerordung -3. GSGV Deutschland).<br />
Acoustic Noise EmissionlGeraeuschemission<br />
Operator Position<br />
Normal Operation<br />
Lpa
Index<br />
1<br />
100 kHz pulses, 7-16<br />
10 MHz HI OUT Waveform from<br />
A14J1, 7-26<br />
10 MHz precision reference<br />
assembly replacement, 14-58<br />
part numbers, 13-26<br />
1st Lo signal at sampler/mixer, 8-14<br />
2<br />
25 MHz HI OUT Waveform from<br />
A14J1, 7-27<br />
2nd IF (4 kHz) signal locations, 8-11<br />
2nd LO locations, 8-14<br />
2ND LO waveforms, 7-21<br />
4<br />
4 kHz signal check, 8-11<br />
4 MHz reference signal, 7-20<br />
4 MHZ REF’ signal check, 8-7<br />
6<br />
+5 v digital supply<br />
theory of operation, 12-6<br />
6<br />
60 MHz HI OUT Waveform from<br />
A14J1, 7-27<br />
8<br />
<strong>8753E</strong><br />
theory of operation, 12-1<br />
A<br />
A10 assembly signals required, 8-8<br />
A10 check by substitution or signal<br />
examination, 8-8<br />
A10 digital IF, 12-30<br />
digital control, 12-10<br />
A10 Digital IF, lo-33<br />
All input signals, 7-36<br />
All Input S&n&, 7-36<br />
All phase lock, 10-34<br />
source, 12-15<br />
All phase lock and A3 source check,<br />
7-8<br />
All phase lock check, 7-35<br />
Al2 digital control signals check,<br />
7-23<br />
Al2 reference, 10-40<br />
source, 12-14<br />
Al2 reference check, 7-13<br />
A13/A14 Fractional-N Check, 7-24<br />
Al3 frac-N analog<br />
source, 12-14<br />
Al4 Divide-by-N Circuit Check, 7-29<br />
Al4 frac-N digital<br />
source, 12-14<br />
Al4 fractional-N (digital), 10-43<br />
Al4 generated digital control signals,<br />
7-31<br />
A14to-A13 digital control signals<br />
check, 7-29<br />
Al4 VCO exercise, 7-27<br />
Al5 preregulator<br />
Index-l
theory of operation, 12-5<br />
Al5 preregulator check, 5-9<br />
A15Wl plug detail, 5-10<br />
Al6 rear panel<br />
digital control, 12-12<br />
Al8 display<br />
digital control, 12-11<br />
power, 12-8<br />
A19 GSP<br />
digital control, 12-12<br />
Al/A2 front panel troubleshooting,<br />
6-13<br />
Al front panel<br />
digital control, 12-10<br />
A21 test port coupler, 12-26<br />
A22 test port coupler, 12-26<br />
A23 LED front panel, 12-26<br />
A24 transfer switch, 12-26<br />
A25 test set interface, 12-26<br />
A27 inverter<br />
digital control, 12-12<br />
A2 front panel processor<br />
digital control, 12-10<br />
A3 source<br />
external source mode, 12-23<br />
frequency offset, 12-22<br />
harmonic analysis, 12-22<br />
high band theory, 12-19<br />
low band theory, 12-16<br />
operation in other modes, 12-22<br />
source, 12-15<br />
super low band theory, 12-15<br />
theory of operation, 12-2, 12-14<br />
tuned receiver mode, 12-25<br />
A3 source and All phase lock check,<br />
7-8<br />
A4 sampler/mixer, 12-29<br />
A4 sampler/mixer check, 7-6<br />
A5 sampler/mixer, 12-29<br />
A6 sampler/mixer, 12-29<br />
A7 pulse generator<br />
source, 12-15<br />
A7 pulse generator check, 7-32<br />
A8 fuses and voltages, 5-14<br />
A8 post regulator<br />
air flow detector, 12-7<br />
display power, 12-8<br />
green LEDs, 12-7<br />
probe power, 12-8<br />
shutdown circuit, 12-7<br />
theory of operation, 12-7<br />
variable fan circuit, 12-7<br />
A8 post regulator test points, 5-5<br />
A9 CPU<br />
dig&ii control, 12-10<br />
A9 CPU operation check, 6-4<br />
A and B inputs check, 8-4<br />
A and B input traces check, 416<br />
ABUS Cot, 10-13<br />
ABUS node 16 for power check, 415<br />
ABUS Test., lo-10<br />
accessories error messages check,<br />
4-18<br />
accessories inspection, 9-3<br />
accessories troubleshooting, 418<br />
accessories troubleshooting chapter,<br />
9-l<br />
accuracy and range of frequency,<br />
2-18<br />
accuracy of frequency adjustment,<br />
3-48<br />
accuracy of power test, 2-24<br />
adapters, l-4<br />
ADC Hist., lo-11<br />
ADC Lin., lo-10<br />
ADC main, lo-23<br />
ADC offset correction constants<br />
adjustment, 3-17<br />
ADC of%, lo-10<br />
ADC Ofs Cot, 10-13<br />
ADD, 10-6<br />
addresses for <strong>HP</strong>-IB systems, 46
adjustment<br />
A9 Switch Positions, 3-5<br />
ADC offset correction constants<br />
(test 52), 3-17<br />
analog bus correction constants<br />
(test 46), 3-9<br />
cavity oscillator frequency<br />
correction constants (test 54),<br />
3-28<br />
fractional-N frequency range, 3-45<br />
fractional-N spur avoidance and<br />
FM sideband, 3-54<br />
frequency accuracy, 3-48<br />
high/low band transition, 3-52<br />
IF amplifier correction constants<br />
(test 51), 3-16<br />
initialize EEPROMs (test 58), 3-37<br />
option numbers correction constants<br />
(test 56), 3-36<br />
RF output power correction<br />
constants (test 47), 3-11<br />
sampler magnitude correction<br />
constants (test 53), 3-18<br />
sequences for mechanical<br />
adjustments, 3-62<br />
serial number correction constants<br />
(test 55), 3-34<br />
source default correction constants<br />
(test 44), 3-7<br />
source pretune correction constants<br />
(test 48), 3-10<br />
source pretune default correction<br />
constants (test 45), 3-8<br />
source spur avoidance tracking,<br />
3-58<br />
ad@&ments analyzer, 3-l<br />
adjustment tests, 10-3<br />
Adjustment Tests, 1913<br />
ADJUSTklENT TESTS, 10-5<br />
air flow detector, 12-7<br />
ALC ON OFF, lo-19<br />
ALL INT, 10-7<br />
Alter and Normal switch position<br />
adjustment, 3-5<br />
amplifier (IF’) adjustment, 3-16<br />
analog bus, lo-22<br />
ANALOG BUS, lo-25<br />
analog bus check of reference<br />
frequencies, 7-13<br />
analog bus checks YO coil drive, 7-11<br />
analog bus codes, 10-49<br />
analog bus correction constants<br />
adjustment, 3-9<br />
analog bus node 1, 10-27<br />
analog bus node 11, 10-34<br />
analog bus node 12, 10-34<br />
analog bus node 13,14, 10-35<br />
analog bus node 15, 10-36<br />
analog bus node 16, 10-37<br />
analog bus node 17, 10-38<br />
analog bus node 18, 10-39<br />
analog bus node 19, 10-39<br />
analog bus node 2, 10-28<br />
analog bus node 20, 10-40<br />
analog bus node 21, lo-41<br />
analog bus node 23, 10-41<br />
analog bus node 24, 10-42<br />
analog bus node 27, 10-43<br />
analog bus node 29, 10-44<br />
analog bus node 3, 10-29<br />
analog bus node 30, 10-45<br />
analog bus node 4, 10-30<br />
analog bus node 5, 10-31<br />
analog bus node 6, 10-31<br />
analog bus node 7, 10-32<br />
analog bus node 8, 10-32<br />
analog bus node 9, 10-33<br />
analog bus nodes, 10-26<br />
A3, lo-26<br />
ANALOG BUS ON OFF, lo-22<br />
analog in menu, 10-24<br />
analog node 10, 10-33<br />
Index-3
analyzer<br />
theory of operations, 12-1<br />
analyzer adjustments, 3-l<br />
analyzer block diagram, 419<br />
analyzer <strong>HP</strong>-H3 address, 46<br />
analyzer options available, l-7<br />
analyzer (spectrum), l-3<br />
analyzer verification, 2- 1<br />
antistatic wrist strap, l-4<br />
antistatic wrist strap and cord, l-4<br />
antistatic wrist strap cord, l-4<br />
appendix for source group<br />
troubleshooting, 7-38<br />
assemblies<br />
bottom view, 13-8<br />
part numbers, 13-6-8<br />
rebuilt-exchange, 13-3<br />
top view, 13-6<br />
assembly replacement, 14-1<br />
A10 digital IF, 1430<br />
All phase lock, 1430<br />
Al2 reference, 14-30<br />
Al3 frac-N analog, 1430<br />
Al4 frac-N digital, 1430<br />
Al5 preregulator, 14-38<br />
Al7 motherboard, 14-40<br />
A19 graphics processor, 1444<br />
A20 disk drive, 1446<br />
A21 test port-l coupler, 1450<br />
A22 test port-2 coupler, 1450<br />
A23 LED board, 1452<br />
A24 transfer switch, 1454<br />
A25 test set interface, 14-56<br />
A26 high stability frequency<br />
reference, 1458<br />
A3 source, 1422<br />
A4 R-sampler, 1426<br />
A5 A-sampler, 14-26<br />
A6 B-sampler, 1426<br />
A7 pulse generator, 1426<br />
A8 post regulator, 1430<br />
Index4<br />
A9BTl battery, 14-36<br />
A9 CPU, 14-32<br />
Bl fan, 14-60<br />
covers, 146<br />
display, 14-12<br />
display lamp, 1412<br />
front panel, 148<br />
front panel interface, 14-10<br />
keypad, 1410<br />
line fuse, 144<br />
rear panel, 1416<br />
rear panel interface, 14-20<br />
attenuator<br />
theory of operation, 12-2<br />
attenuators (fixed), l-4<br />
attenuator (step), l-3<br />
AUX OUT ON OFF, lo-24<br />
available options, l-7<br />
B<br />
background intensity check for<br />
display, 6-7<br />
backup EEPROM disk, 3-38<br />
bad cables, 9-l<br />
B and A inputs check, 8-4<br />
band (high/low) transition adjustment,<br />
3-52<br />
BAlTERY FAILED. STATE MEMORY<br />
CLEARED, lo-50<br />
BATTERY LOW! STORE SAVE REGS<br />
TO DISK, lo-50<br />
block diagram, 419<br />
digital control group, 6-3<br />
power supply, 5-25<br />
power supply functional group,<br />
5-3<br />
broadband power problems, 7-39<br />
built-in test set, 12-26<br />
LED front panel, 12-26<br />
test port couplers, 12-26<br />
test set interface, 12-26
transfer switch, 12-26<br />
bus<br />
analog, lo-22<br />
bus nodes, 19-26<br />
c<br />
cable inspection, 6-16<br />
cables, l-4<br />
bottom view, 13-12<br />
front view, 13-14<br />
part numbers, 13-19-18<br />
rear view, 13-16<br />
source, 13-18<br />
top view, 13-10<br />
cable test, 9-5<br />
Cal Coef l-12., 10-12<br />
CAL FACTOR SENSOR A, 16-6<br />
CAL FACTOR SENSOR B, 19-6<br />
CALJBRATION ABORTED, lo-50<br />
calibration coefficients, 11-l<br />
calibration device inspection, 9-3<br />
calibration kit 7 mm, 569, l-3<br />
calibration kit device verification,<br />
9-4<br />
calibration kit Type-N, 758, l-3<br />
calibration procedure, 1 l-3<br />
CALIBRATION REQUIRED, lo-51<br />
care of connectors, l-5<br />
CAUTION<br />
OVERLOAD ON INPUT A, POWER<br />
REDUCED, 8-3<br />
OVERLOAD ON INPUT B, POWER<br />
REDUCED, 8-3<br />
OVERLOAD ON INPUT R, POWER<br />
REDUCED, 8-3<br />
cavity oscillator frequency<br />
adjustment, 3-28<br />
cavity oscillator frequency correction<br />
constants adjustment, 3-28<br />
Cav osc Cor., 19-13<br />
CC procedures<br />
ADC offset (test 52), 3-17<br />
analog bus (test 46), 3-9<br />
cavity oscillator frequency (test<br />
54), 3-28<br />
IF amplifier (test 51), 3-16<br />
initialize EEPROMs (test 58), 3-37<br />
option numbers (test 56), 3-36<br />
retrieve correction constant data<br />
from EEPROM backup disk,<br />
3-40<br />
RF output power (test 47), 3-11<br />
sampler magnitude (test 53), 3-18<br />
serial number (test 55), 3-34<br />
source default (test 44), 3-7<br />
source pretune default (test 45),<br />
3-8<br />
source prettme (test 48), 3-10<br />
Unprotected Hardware Option<br />
Numbers, 3-60<br />
center conductor damage, 9-3<br />
certification of kit, 2-7<br />
chassis<br />
part numbers, 13-42-44<br />
check<br />
1st LO signal at sampler/mixer,<br />
8-14<br />
4 MHz REF signal, 8-7<br />
A10 by substitution or signal<br />
examination, 8-8<br />
All phase lock, 7-35<br />
Al2 digital control signals, 7-23<br />
Al2 reference, 7-13<br />
A13/A14 Fractional-N, 7-24<br />
Al4 Divide-by-N Circuit Check,<br />
7-29<br />
A14-to-Al3 digital control signals,<br />
7-29<br />
Al5 Preregulator, 5-9<br />
Al/A2 front panel, 6-13<br />
A3 source and All phase lock, 7-8<br />
A4 sampler/mixer, 7-6
A7 pulse generator, 7-32<br />
A8 fuses and voltages, 5-14<br />
A9 CPU control, 6-4<br />
A and B inputs, 8-4<br />
A and B input traces, 4-16<br />
accessories error messages, 4-18<br />
CPU control, 6-4<br />
digital control, 4-11<br />
disk drive, 4-7<br />
fan voltages, 5-22<br />
FN LO at A12, 7-19<br />
for a faulty assembly, 5-11<br />
<strong>HP</strong>-B3 systems, 46<br />
line voltage, selector switch, fuse,<br />
5-7<br />
motherboard, 5-13<br />
operating temperature, 5-13<br />
operation of A9 CPU, 6-4<br />
phase lock error message, 7-4<br />
phase lock error messages, 413<br />
plotter or printer, 4-7<br />
post regulator voltages, 5-5<br />
power supply, 4-10<br />
power up sequence, 411<br />
preregulator LEDs, 410<br />
rear panel LEDs, 410<br />
receiver, 416<br />
receiver error messages, 4-17<br />
source, 413<br />
the 4 kHz signal, 8-11<br />
trace with sampler correction off,<br />
8-12<br />
YO coil drive with analog bus, 7-11<br />
check front panel cables, 6-16<br />
cleaning of connectors, l-5<br />
CLEAR LIST, 10-6<br />
coax cable, 14<br />
codes for analog bus, 19-49<br />
coefficients, 11-l<br />
comb tooth at 3 GHz, 7-33<br />
Index-6<br />
components related to specific error<br />
terms, 9-3<br />
connection techniques, l-5<br />
connector<br />
care of, l-5<br />
CONTINUE TEST, 10-5<br />
controller <strong>HP</strong>-II3 address, 4-6<br />
controller troubleshooting, 4-8<br />
conventions for symbols, 19-48<br />
correction constants<br />
ADC offset (test 52), 3-17<br />
analog bus (test 46), 3-9<br />
cavity oscillator frequency(test 54),<br />
3-28<br />
display intensity (test 45), 6-7<br />
IF amplifier (test 51), 3-16<br />
initiaiize EEPROMs (test 58), 3-37<br />
option numbers (test 56), 3-36<br />
retrieval from EEPROM backup<br />
disk, 340<br />
RF output power (test 47), 3-11<br />
sampler magnitude (test 53), 3-18<br />
serial number (test 55), 3-34<br />
source default (test 44), 3-7<br />
source pretune default (test 45),<br />
3-8<br />
source pretune (test 48), 3-10<br />
Unprotected Hardware Option<br />
Numbers, 3-60<br />
CORRECTION CONSTANT8 NOT<br />
STORED, lo-51<br />
CORRECTION TURNED OFF, lo-51<br />
counter, 19-23<br />
COUNTER<br />
OFF, lo-24<br />
counter (frequency), l-3<br />
counter readout location, 19-38<br />
CPU<br />
digital control, 12-10<br />
CPU operation check, 6-4
CURRENT PARAMETER NOT IN CAL<br />
SET, lo-51<br />
D<br />
damage to center conductors, 9-3<br />
data that is faulty, 417<br />
DEADLOCK, lo-51<br />
default correction constants<br />
adjustment for source, 3-7<br />
default correction constants<br />
adjustment for source prettme,<br />
3-8<br />
DELETE, 10-6<br />
delete display option, l-8<br />
description of tests, 10-7<br />
DEVICE<br />
not on, not connect, wrong addrs,<br />
lo-52<br />
diagnose softkey, 10-7<br />
diagnostic<br />
error terms, 11-l<br />
diagnostic LEDs for A15, 5-4<br />
diagnostic routines for phase lock,<br />
7-39<br />
diL3gIlOStiCS<br />
internal, 10-2<br />
diagnostics of analyzer, 4-3<br />
diagnostic tests, 6-17<br />
diagram<br />
A4 sampler/mixer to phase lock<br />
cable, 7-7<br />
digital control group, 6-3<br />
diagram of <strong>HP</strong> 87533, 419<br />
diagram of power supply, 5-25<br />
DIF Control, 10-9<br />
DIF Counter, 10-9<br />
digital control<br />
A10 dig&ii IF, 12-10<br />
Al6 rear panel, 12-12<br />
Al8 display, 12-11<br />
A19 GSP, 12-12<br />
Al front panel, 12-10<br />
A27 inverter, 12-12<br />
A2 front panel processor, 12-10<br />
A9 CPU, 12-10<br />
digital signal processor, 12-11<br />
EEPROM, 12-11<br />
main CPU, 12-10<br />
main RAM, 12-11<br />
theory of operation, 12-8<br />
digital control block diagram, 6-3<br />
digital control check, 4-11<br />
digital control lines observed using<br />
L INTCOP as trigger, 8-10<br />
digitai control signals A14to-A13<br />
check, 7-29<br />
digital control sign& check, 7-23<br />
digitai control signals generated from<br />
A14, 7-31<br />
digitai control troubleshooting<br />
chapter, 6-l<br />
digital data lines observed using L<br />
INTCOP as trigger, 8-10<br />
digital IF, 10-33, 12-30<br />
digital control, 12-10<br />
digital voltmeter, l-3<br />
directivity (EDF and EDR), 11-11<br />
disable shutdown circuitry, 5-16<br />
DISK<br />
not on, not connected, wrong addrs,<br />
lo-52<br />
disk drive check, 4-7<br />
disk drive (externai) <strong>HP</strong>-ID address,<br />
46<br />
disk drive replacement, 14-46<br />
disk (fIoppy), l-3<br />
DISK HARDWmE PROBLEM, lo-52<br />
DISK MESSAGE LENGTH ERROR,<br />
lo-52<br />
DISK READ/WRITE ERROR, lo-53<br />
Disp 2 Ex., lo-13<br />
Dispkpu corn., 10-15
display<br />
digitai control, 12-11<br />
power, 12-8<br />
displayed spurs with a biter, 3-30<br />
display intensity, 6-7<br />
display tests, 10-3, 10-15<br />
DISPLAY TESTS, 10-5<br />
DIV FRAC N, lo-25<br />
Divide-by-N Circuit Check, 7-29<br />
DONE, 19-6<br />
DRAM cell, lo-15<br />
DSP ALU, 19-9<br />
DSP Control, 10-9<br />
DSP Intrpt, 10-9<br />
DSP RAM, 10-9<br />
DSP WrLRd, 10-9<br />
E<br />
earth ground wire and static-control<br />
table mat, l-4<br />
EDIT, 19-6<br />
edit iist menu, 10-6<br />
equipment<br />
automated system verification, 2-8<br />
cavity osciliator frequency<br />
adjustment, 3-28<br />
display intensity correction<br />
constants adjustment, 6-7<br />
EEPROM backup dish procedure,<br />
3-38<br />
external source mode frequency<br />
range, 2-21<br />
fractional-N frequency range<br />
adjustment, 3-45<br />
fractional-N spur avoidance and<br />
FM sideband adjustment, 3-54<br />
frequency accuracy adjustment,<br />
3-48<br />
high/Iow band transition<br />
ac@stment, 3-52<br />
IF ampiifier correction constants<br />
adjustment, 3-16<br />
minimum R channel level, 2-31<br />
RF output power correction<br />
constants adjustment, 3-11<br />
sampler magnitude adjustment,<br />
3-18<br />
source spur avoidance tracking<br />
adjustment, 3-58<br />
test port frequency range and<br />
accuracy test, 2-18<br />
test port input noise floor level,<br />
2-37<br />
test port output power accuracy,<br />
2-24<br />
test port output power range and<br />
linearity, 2-27<br />
equipment for service, l-l<br />
error<br />
BATTERY FAZLED. STATE MEMORY<br />
CLEARED, lo-50<br />
BATTERY LOW! STORE SAVE REGS<br />
TO DISK, lo-50<br />
CALIBRATION ABORTED, lo-50<br />
CALIBRATION REQUIRED, lo-51<br />
CORRECTION CONSTANTS NOT<br />
STORED, lo-51<br />
CORRECTION TURNED OFF, lo-51<br />
CURRENT PARAMETER NOT IN<br />
CAL SET, lo-51<br />
DEADLOCK, lo-51<br />
DEVICE: not on, not connect,<br />
wrorvj addrs, lo-52<br />
DISK HARDWARE PROBLEM,<br />
lo-52<br />
DISK MESSAGE LENGTH ERROR,<br />
lo-52<br />
DISK: not on, not connected, wrong<br />
addrs, lo-52<br />
DISK READ/WRITE ERROR, 19-53<br />
-ON FAILED, lo-53
INSUFFICIENT MEMORY, PWR<br />
MTR CAL OFF, lo-53<br />
NO CALIBRATION CURRENTLY IN<br />
PROGRESS, lo-53<br />
NO IF FOUND: CHECK R INPUT<br />
LEVEL, lo-54<br />
NO PHASE LOCK: CHECK R INPUT<br />
LEVEL, 19-54<br />
NO SPACE FOR NEW CAL. CLEAR<br />
REGISTERS, 19-54<br />
NOT ALLOWED DURING POWER<br />
METER CAL, lo-55<br />
NOT ENOUGH SPACE ON DISK<br />
FOR STORE, lo-53<br />
OVERLOAD ON INPUT A, POWER<br />
REDUCED, lo-55<br />
OVERLOAD ON INPUT B, POWER<br />
REDUCED, lo-55<br />
OVERLOAD ON INPUT R, POWER<br />
REDUCED, lo-55<br />
PARALLEL PORT NOT AVAILABLE<br />
FOR COPY, lo-56<br />
PARALLEL PORT NOT AVAILABLE<br />
FOR GPIO, lo-55<br />
PHASE LOCK CAL FAILED, lo-56<br />
PHASE LOCK LOST, lo-56<br />
POSSIBLE FALSE LOCK, lo-57<br />
POWER METER INVALID, lo-57<br />
POWER METER NOT SETTLED,<br />
lo-57<br />
POWER SUPPLY HOT!, lo-57<br />
POWER SUPPLY SHUT DOWN!,<br />
lo-57<br />
POWER UNLEVELED, lo-58<br />
PRINTER: error, 10-58<br />
PRINTER: not handshaking, 10-58<br />
PRINTER: not on, not connected,<br />
wrong addrs, lo-58<br />
PROBE POWER SHUT DOWN!,<br />
19-58<br />
PWR MTR: NOT ON/CONNECTED<br />
OR WRONG ADDRS, lo-59<br />
SAVE FAILED. INSUFFICIENT<br />
MEMORY, lo-59<br />
SELF TEST #II FAILED, lo-59<br />
SOURCE POWER TURNED OFF,<br />
RESET UNDER POWER MENU,<br />
lo-59<br />
SWEEP MODE CHANGED TO CW<br />
TIME SWEEP, lo-60<br />
TEST ABORTED, lo-60<br />
TROUBLE! CHECK SETUP AND<br />
START OVER, lo-60<br />
WRONG DISK FORMAT, INITIALIZE<br />
DISK, lo-60<br />
error-correction procedure, 1 l-3<br />
error message for phase lock, 7-4<br />
error messages, 10-1, 10-50<br />
error messages for receiver failure,<br />
8-3<br />
error term inspection, 9-3<br />
error terms, 11-l<br />
directivity (EDF and EDR), 11-11<br />
isolation (crosstaik, EXF and EXR),<br />
11-14<br />
load Match (ELF and ELR), 11-15<br />
reflection Tracking (ERF and ERR),<br />
11-13<br />
source match (ESF and ESR), 11-12<br />
transmission tracking (ETF and<br />
ETR), 11-16<br />
E-terms, 1 l-l<br />
external source, l-3<br />
external source mode frequency<br />
range, 2-21<br />
external tests, 193,10-11<br />
EXTERNAL TESTS, 19-4<br />
F<br />
failure<br />
Index-9
A11 phase lock and A3 source<br />
check, 7-8<br />
Al/A2 front panel, 6-13<br />
key stuck, 6-14<br />
phase lock error, 7-4<br />
receiver, 8-3<br />
RF power from source, 7-3<br />
failures<br />
<strong>HP</strong>-IB, 6-19<br />
fan<br />
air flow detector, 12-7<br />
variable fan circuit, 12-7<br />
fan speeds, 5-22<br />
fan troubleshooting, 5-22<br />
fan voltages, 5-22<br />
faulty analyzer repair, 42<br />
faulty cables, 9-l<br />
faulty calibration devices or<br />
CoMectors, 9-l<br />
faulty data, 417<br />
faulty group isolation, 49<br />
filter (low pass), l-3<br />
iirmware revision softkey, 19-47<br />
floor level test, 2-37<br />
floppy disk, l-3<br />
FM Coil - plot with 3 point sweep,<br />
7-37<br />
FM sideband and spur avoidance<br />
adjustment, 3-54<br />
FN count., lo-10<br />
FN LO at Al2 check, 7-19<br />
F’N LO waveform at A12J1, 7-19<br />
FRAC N, lo-25<br />
frac-N analog<br />
source, 12-14<br />
Frac N Cont., 199<br />
frac-N digitai<br />
source, 12-14<br />
FRACN TUNE mode HI OUT. signal,<br />
7-34<br />
FRACN TUNE ON OFT, lo-18<br />
Index-10<br />
F’ractionai-N Check, 7-24<br />
fractional-N (digital), 10-43<br />
fractional-N frequency range<br />
acijustment, 3-45<br />
F’ractionai-N Frequency Range<br />
Adjustment Sequence, 3-62<br />
fractional-N spur avoidance and F‘M<br />
sideband a@stment, 3-54<br />
kactionai-N Spur Avoidance and F’M<br />
Sideband Adjustment Sequence,<br />
3-62<br />
frequency accuracy adjustment, 3-48<br />
frequency counter, l-3, 10-23<br />
frequency output in SRC tune mode,<br />
7-8<br />
frequency range and accuracy test,<br />
2-18<br />
frequency range for external source<br />
mode, 2-21<br />
frequency range of fractional-N<br />
adjustment, 3-45<br />
front panel<br />
assembly replacement, 148<br />
digital control, 12-10<br />
part numbers, 13-29-22<br />
front panel key codes, 6-14<br />
front panel probe power voltages,<br />
5-19<br />
front panel processor<br />
digitai control, 12-10<br />
front panel troubleshooting, 6-13<br />
Fr Pan Biag., lo-11<br />
F’r Pan Wr/Rd, 19-9<br />
fuIl two-port error-correction<br />
procedure, 1 l-3<br />
functional group fault location, 49<br />
functional groups<br />
theory of operation, 124<br />
fuse check, 5-7
G<br />
good trace display, 8-5<br />
green LED on Al5<br />
power supply shutdown, 12-6<br />
green LEDs on A8, 12-7<br />
GSP<br />
digital control, 12-12<br />
H<br />
hardkeys, 19-2<br />
hardware<br />
bottom view, 13-30<br />
disk drive, 13-36<br />
front view, 13-32<br />
memory deck, 13-38<br />
part numbers, 13-28-49<br />
preregulator, 13-40<br />
test set deck, 13-34<br />
top view, 13-28<br />
HB FITR SW ON OFF, 1919<br />
Hewlett-Packard servicing, 42<br />
high band REF signal, 7-17<br />
high/Iow band transition adjustment,<br />
3-52<br />
High/Low Band Transition Adjustment<br />
Sequence, 3-62<br />
high quality comb tooth at 3 GHz,<br />
7-33<br />
high stabiiity frequency reference<br />
assembly replacement, 1458<br />
part numbers, 13-26<br />
HI OUT signal in FRACN TUNE mode,<br />
7-34<br />
H MB line, 7-31<br />
how to<br />
adjust ADC offset correction<br />
constants, 3-17<br />
adjust analog bus correction<br />
constanti, 3-9<br />
adjust cavity oscillator frequency<br />
correction constants, 3-28<br />
adjust fractional-N frequency range,<br />
3-45<br />
adjust fractional-N spur avoidance<br />
and FM sideband, 3-54<br />
adjust frequency accuracy, 3-48<br />
adjust hig.hAow band transition,<br />
3-52<br />
adjust IF ampiifIer correction<br />
constants, 3-16<br />
adjustment the analyzer, 3-l<br />
adjust option numbers correction<br />
constants, 3-36<br />
adjust RF output power correction<br />
constants, 3-l 1<br />
adjust sampler magnitude correction<br />
constants, 3-18<br />
adjust serial number correction<br />
corl!stants,3-34<br />
adjust source default correction<br />
constants, 3-7<br />
adjust source pretune correction<br />
constants, 3-10<br />
adjust source pretune default<br />
correction constants, 3-8<br />
adjust source spur avoidance<br />
tracking, 3-58<br />
adjust the anaIyzer using sequences,<br />
3-62<br />
backup the EEPROM disk, 3-38<br />
check display intensity, 6-7<br />
clean connectors, l-5<br />
identify the faulty functional group,<br />
4-9<br />
initialize EEPROMs, 3-37<br />
load sequences from disk, 3-62<br />
position the A9 Switch, 3-5<br />
repair the analyzer, 4-l<br />
retrieve correction constant data<br />
from EEPROM backup disk,<br />
3-40<br />
IndlBx-11
set up the fractional-N frequency<br />
range adjustment, 3-63<br />
set up the fractional-N spur<br />
avoidance and FM sideband<br />
adjustment, 3-64<br />
set up the high/Iow band transition<br />
adjustments, 3-63<br />
test external source mode frequency<br />
range, 2-21<br />
test frequency range and accuracy,<br />
2-18<br />
test minimum R channel level,<br />
2-31<br />
test port input noise floor level,<br />
2-37<br />
test port output frequency range<br />
and accuracy, 2-18<br />
test port output power accuracy,<br />
2-24<br />
test port output power range and<br />
linearity, 2-27<br />
troubleshoot, 41<br />
troubleshoot accessories, 9-l<br />
troubleshoot broadband power<br />
problems, 7-39<br />
troubleshoot digital control group,<br />
6-l<br />
troubleshoot receiver, 8-l<br />
troubleshoot source group, 7-l<br />
verify an analyzer system<br />
automatically, 2-8<br />
<strong>HP</strong> <strong>8753E</strong> adhistments, 3-l<br />
<strong>HP</strong> <strong>8753E</strong> block diagram, 4-19<br />
<strong>HP</strong>-IB addresses, 46<br />
<strong>HP</strong>-IB cable, l-4<br />
<strong>HP</strong>-B3 Failures, 6-19<br />
<strong>HP</strong>-IB mnemonic for service, 10-l<br />
<strong>HP</strong>-IB service mnemonic defmitions,<br />
10-48<br />
<strong>HP</strong>-H3 system check, 46<br />
Index-12<br />
I<br />
IF ampiifier correction constants<br />
adjustment, 3-16<br />
IF GAIN AUTO, 10-21<br />
IF GAIN OFF, lo-21<br />
IF GAIN ON, lo-21<br />
IF Step Cor., 19-13<br />
improper calibration technique, 9-l<br />
Init EEPROM, lo-14<br />
INITlALIzATION FAILED, lo-53<br />
initiaiize EEPROMs, 3-37<br />
initial observations, 43<br />
input noise floor level test, 2-37<br />
inputs (A and B) check, 8-4<br />
input traces check, 416<br />
inspect cables, 6-16<br />
inspect error terms, 9-3<br />
inspection of test port connectors<br />
and calibration devices, 9-3<br />
inspect the accessories, 9-3<br />
INSUFFICIENT MEMORY, PWR MTR<br />
CAL OFF, lo-53<br />
Inten DAC., 19-15<br />
internal diagnostics, 10-2<br />
inted diagnostic tests, 6-17<br />
internal tests, W-3,10-7<br />
INTERNAL TESTS, lo-4<br />
inverter<br />
digital control, 12-12<br />
invoking tests remotely, 10-48<br />
isolation (crosstaik, EXF and EXR),<br />
11-14<br />
K<br />
key codes, 6-14<br />
key faihne identification, 6-14<br />
keys in service menu, 10-l<br />
kit re-certiiication, 2-7<br />
kits<br />
calibration kit 7 mm, 50131, l-3<br />
calibration kit Type-N, 75Q, l-3
tool, l-3<br />
verification kit 7 mm, l-3<br />
L<br />
LED front panel, 12-26<br />
L ENREF line, 7-23<br />
L I-II3 and L LB Lines, 7-24<br />
Iight occiuder, l-3<br />
LIMIT3 NORM/SPCL, 10-5<br />
linearity and range of power test,<br />
2-27<br />
line fuse check, 5-7<br />
line power module<br />
theory of operation, 12-6<br />
line voltage check, 5-7<br />
L INTCOP as trigger to observe control<br />
lines, 8-10<br />
L INTCOP as trigger to observe data<br />
lines, 8-10<br />
L LB and L III3 Lines, 7-24<br />
LO (2ND) waveforms, 7-21<br />
load device verification, 9-4<br />
load Match (ELF and ELR), 11-15<br />
location<br />
diagnostic LEDs for A15, 5-4<br />
post regulator test points, 5-5<br />
power supply cable, 5-8<br />
lock error, 7-4<br />
LO OUT waveform at Al4J2, 7-28<br />
Loss/sENsR LISTS, lo-5<br />
low band REF signal, 7-18<br />
low pass fiber, l-3<br />
M<br />
magnitude of sampler adjustment,<br />
3-18<br />
main ADC, lo-23<br />
Main DRAM, lo-8<br />
MAIN PWR DAC, lo-19<br />
Main VRAM, lo-15<br />
major assemblies<br />
bottom view, 13-8<br />
part numbers, 13-6-8<br />
rebuilt-exchange, 13-3<br />
top view, 13-6<br />
measurement calibration coefficients,<br />
11-l<br />
measurement calibration procedure,<br />
11-3<br />
mechanical adjustment sequences,<br />
3-62<br />
memory<br />
INSUFFICIENT MEMORY, PWR<br />
MTR CAL OFF, lo-53<br />
menu<br />
analog in, lo-24<br />
edit Iist, 10-6<br />
peek/poke, lo-46<br />
service keys, 19-18<br />
service modes, 19-21<br />
test options, 10-5<br />
tests, 10-3<br />
menus for service, 19-l<br />
message<br />
BATTERY FAILED. STATE MEMORY<br />
CLEARED, lo-50<br />
BATTERY LOW! STORE SAVE REGS<br />
TO DISK, lo-50<br />
CALIBRATION ABORTED, lo-50<br />
CALIBRATION REQUIRED, lo-51<br />
CORRECTION CONSl!ANTS N(YT<br />
STORED, lo-51<br />
CORRECTION TURNED OFF, lo-51<br />
CURRENT PARAMETER NOT IN<br />
CAL SET, lo-51<br />
DEADLOCK, lo-51<br />
DEVICE: not on, not connect,<br />
wrong addrs, lo-52<br />
DISK HARDWARE PROBLEM,<br />
lo-52<br />
DISK MESSAGE LENGTH ERROR,<br />
lo-52<br />
Index-13
DISK: not on, not connected, wrong<br />
addrs, lo-52<br />
DISK READ/WRITE ERROR, lo-53<br />
error, 10-50<br />
INIWON FAILED, lo-53<br />
NO CALIBRATION CURRENTLY IN<br />
PROGRESS, lo-53<br />
NO IF FOUND: CHECK R INPUT<br />
LEVEL, lo-54<br />
NO PHASE LOCK: CHECK R INPUT<br />
LEVEL, lo-54<br />
NO SPACE FOR NEW CAL. CLEAR<br />
REGISTERS, 10-54<br />
NOT -WED DURING POWER<br />
METER CAL, lo-55<br />
NOT ENOUGH SPACE ON DISK<br />
FOR STORE, lo-53<br />
OVERLOAD ON INPUT A, POWER<br />
REDUCED, lo-55<br />
OVERLOAD ON INPUT B, POWER<br />
REDUCED, lo-55<br />
OVERLOAD ON INPUT R, POWER<br />
REDUCED, lo-55<br />
PARALLEL PORT NOT AVAILABLE<br />
FOR COPY, lo-56<br />
PARALLEL PORT NOT AVAILABLE<br />
FOR GPIO, lo-55<br />
PHASE LOCK CAL FAILED, lo-56<br />
PHASE LQCK LOST, lo-56<br />
POSSIBLE FALSE LOCK, lo-57<br />
POWER METER INVALID, lo-57<br />
POWER METER NOT SETTLED,<br />
lo-57<br />
POWER SUPPLY HOT!, lo-57<br />
POWER SUPPLY SHUT DOWN!,<br />
lo-57<br />
POWER UNLEVELED, lo-58<br />
PRINTER: error, 10-58<br />
PRINTER: not handshaking, 10-58<br />
PRINTER: not on, not connected,<br />
wrong addrs, lo-58<br />
Index-14<br />
PROBE POWER SHUT DOWN!,<br />
lo-58<br />
PWR MTR: NOT ON/CONNECTED<br />
OR WRONG ADDRS, lo-59<br />
SAVE FAILED. INSUFFICIENT<br />
MEMORY, lo-59<br />
SELF TEST #n FAILED, lo-59<br />
SOURCE POWER TURNED OFF,<br />
RESET UNDER POWER MENU,<br />
lo-59<br />
SWEEP MODE CHANGED TO CW<br />
TIME SWEEP, lo-60<br />
TEST ABORTED, lo-60<br />
TROUBLE! CHECK SETUP AND<br />
START OVER, lo-60<br />
WRONG DISK FORMAT, INITIALIZE<br />
DISK, lo-60<br />
message for phase lock error, 7-4<br />
messages<br />
error, 10-l<br />
meter (power), l-3<br />
microprocessor<br />
theory of operation, 12-3<br />
microwave connector care, l-5<br />
minimum loss pad, l-4<br />
minimum R channel level, 2-31<br />
mnemonic definitions, 10-48<br />
mnemonics for service keys, 10-l<br />
monitor ABUS node 16 for power,<br />
4-15<br />
motherboard check, 5-13<br />
N<br />
NO CALIBRATION CURRENTLY IN<br />
PROGRESS, lo-53<br />
nodes for analog bus, 10-26<br />
NO FILE(S) FOUND ON DISK, lo-54<br />
NO IF FOUND<br />
CHECK R INPUT LEVEL, 7-4,7-38,<br />
lo-54<br />
noise floor level test, 2-37
NO PHASE LOCK<br />
CHECK R INPUT LEVEL, 7-4,7-38,<br />
10-54<br />
Normal and Alter switch position<br />
adjustment, 3-5<br />
NO SPACE FOR NEW CAL. CLEAR<br />
REGISTERS, 19-54<br />
NOT ALLOWED DURING POWER<br />
METER CAL, lo-55<br />
NOT ENOUGH SPACE ON DISK FOR<br />
STORE, lo-53<br />
number (option) adjustment, 3-36<br />
number (serial) adjustment, 3-34<br />
0<br />
offset (ADC) acijustment, 3-17<br />
open and short device verification,<br />
9-6<br />
open loop compared to phase locked<br />
output in SRC tune mode, 7-9<br />
operating temperature check, 5-13<br />
operation check of A9 CPU, 6-4<br />
operation veriikxtion, 2-l<br />
post-repair, 3-2, 1462<br />
Operator’s Check, 4-4<br />
option<br />
lDT, delete display, l-8<br />
Option lD5<br />
assembly replacement, 1458<br />
part numbers, 13-26<br />
Option Cor., 1914<br />
option numbers correction constants<br />
adjustment, 3-36<br />
options<br />
002 harmonic mode, l-7<br />
006 6 GHz operation, l-7<br />
010 time domain, l-7<br />
011 receiver configuration, l-7<br />
075 75Q impedance, l-8<br />
1CM rack mount flange kit without<br />
handles, l-8<br />
1CP rack mount flange kit with<br />
handles, l-8<br />
lD5 high stabiity frequency<br />
reference, l-7<br />
descriptions of, 13-48<br />
options available, l-7<br />
osciiioscope, l-3<br />
oscilloscope check of reference<br />
frequencies, 7-15<br />
output frequency in SRC tune mode,<br />
7-8<br />
overah block diagram, 419<br />
OVERLOAD ON INPUT A, POWER<br />
REDUCED, lo-55<br />
OVERLOAD ON INPUT B, POWER<br />
REDUCED, lo-55<br />
OVERLOAD ON INPUT R, POWER<br />
REDUCED, lo-55<br />
P<br />
P?, lo-58<br />
panel key codes, 6-14<br />
PARALLEL PORT NOT AVAILABLE<br />
FOR COPY, lo-56<br />
PARALLEL PORT NOT AVAILABLE<br />
FOR GPIO, lo-55<br />
patterns test, 19-16<br />
PEEK, 10-46<br />
PEEK/POKE, 10-46<br />
PEEK/POKE ADDRESS, 10-46<br />
peek/poke menu, 19-46<br />
performance test record types, 2-6<br />
performance tests<br />
1. Test Port Output Frequency<br />
Range and Accuracy, 2-18<br />
2. External Source Mode Frequency<br />
Range, 2-21<br />
3. Test Port Output Power Accuracy,<br />
2-24<br />
4. l&t Port Output Power Range<br />
and Linearity, 2-27<br />
Index-16
5. Minimum R Channel Level, 2-31<br />
6. Test Port Input Noise Floor<br />
Level, 2-37<br />
chapter, 2-l<br />
description of, 2-l<br />
post-repair, 3-2, 1462<br />
peripheral equipment<br />
theory of operation, 12-3<br />
peripheral <strong>HP</strong>-IB addresses, 4-6<br />
peripheral troubleshooting, 4-8<br />
phase lock, 10-34<br />
source, 12-15<br />
phase lock (All) check, 7-35<br />
phase lock and A3 source check, 7-8<br />
PHASE LOCK CAL FAILED, 7-4,<br />
7-38, lo-56<br />
phase locked output compared to<br />
open loop in SRC tune mode,<br />
7-9<br />
phase lock error, 7-4<br />
phase lock error messages, 7-38<br />
phase lock error messages check,<br />
413<br />
PHASE LOCK LOST., 7-4, 7-38, lo-56<br />
photometer probe, l-3<br />
PLL AUTO ON OFF, lo-20<br />
PLL DIAG ON OFF, lo-20<br />
PLL PAUSE, lo-20<br />
plotter <strong>HP</strong>-II3 address, 46<br />
plotter or printer check, 47<br />
PLREF waveforms, 7-17<br />
POKE, lo-46<br />
Port 1 Op cl&., lo-11<br />
Port 2 Op chk., lo-11<br />
port input noise floor level test, 2-37<br />
port output power accuracy test,<br />
2-24<br />
POSSIBLE FALSE LOCK, lo-57<br />
Post Reg., 10-9<br />
post regulator<br />
air flow detector, 12-7<br />
Index-16<br />
display power, 12-8<br />
green LEDs, 12-7<br />
probe power, 12-8<br />
shutdown circuit, 12-7<br />
theory of operation, 12-7<br />
variable fan circuit, 12-7<br />
post regulator test point locations,<br />
5-5<br />
post-repair procedures, 3-2, 14-62<br />
power accuracy test, 2-24<br />
power from source, 7-3<br />
POWER LOSS, lo-6<br />
power meter (<strong>HP</strong>-IB), l-3<br />
power meter <strong>HP</strong>-IB address, 46<br />
POWER METER INVALID, lo-57<br />
POWER METER NOT SETTLED,<br />
lo-57<br />
power output check, 413<br />
power problems (broadband), 7-39<br />
power range and linearity test, 2-27<br />
power sensor, l-3<br />
power splitter, l-4<br />
power supply<br />
theory of operation, 12-5<br />
power supply block diagram, 5-25<br />
power supply cable location, 5-8<br />
power supply check, 410<br />
power supply functional group block<br />
diagram, 5-3<br />
POWER SUPPLY HOT!, lo-57<br />
power supply shutdown<br />
Al5 green LED, 12-6<br />
Al5 red LED, 12-6<br />
theory of operation, 12-6<br />
POWER SUPPLY SHUT DOWN!, lo-57<br />
power supply troubleshooting chapter,<br />
5-l<br />
POWER UNLEVELED, lo-58<br />
power up sequence check, 411<br />
precision frequency reference<br />
assembly replacement, 1458
part numbers, 13-26<br />
prereguiated voltages<br />
theory of operation, 12-6<br />
preregulator<br />
theory of operation, 12-5<br />
prereguiator LEDs check, 4-10<br />
preregulator voltages, 5-10<br />
PRESET, lo-7<br />
preset sequence, 4-3, 6-14<br />
Pretune Cor., 10-13<br />
Pretune Def., 10-13<br />
preventive maintenance, 1 l-l<br />
principles of microwave connector<br />
care, l-5<br />
printer, l-3<br />
PRINTER<br />
error, 19-58<br />
not handshaking, 19-58<br />
not on, not connected, wrong addrs,<br />
lo-58<br />
printer <strong>HP</strong>-IB address, 46<br />
probe<br />
power, 12-8<br />
probe (photometer), l-3<br />
PROBE POWER SHUT DOWN!, lo-58<br />
probe power voltages, 5-19<br />
procedure<br />
spur search with a Alter, 3-30<br />
spur search without a filter, 3-31<br />
procedures<br />
A9 Switch Positions, 3-5<br />
ADC Offset Correction Constants<br />
(Test 52), 3-17<br />
Analog Bus Correction Constant<br />
(!lkst 46), 3-9<br />
Cavity Osciliator Prequency<br />
Correction Constants (Test<br />
54), 3-28<br />
EEPROM Backup Disk, 3-38<br />
external source mode frequency<br />
range, 2-21<br />
F’ractionai-N Frequency Range<br />
Adjustment, 3-45<br />
Fractional-N Spur Avoidance and<br />
PM Sideband Adjustment, 3-54<br />
Frequency Accuracy Adjustment,<br />
3-48<br />
High/Low Band Transition<br />
Adjustment, 3-52<br />
IF AmpIifier Correction Constants<br />
(Test 51), 3-16<br />
Initialize EEPROMs (Test 58), 3-37<br />
minimum R channel level, 2-31<br />
Option Numbers Correction<br />
Constant (Test 56), 3-36<br />
retrieve correction constant data<br />
from EEPROM backup disk,<br />
3-40<br />
RF Output Power Correction<br />
constants (l&t 47), 3-11<br />
Sampler Magnitude and Phase<br />
Correction Constants (Test 53),<br />
3-18<br />
Sequences for Mechanical<br />
Adjustments, 3-62<br />
Serial Number Correction Constant<br />
(Test 55), 3-34<br />
Source Default Correction Constants<br />
(l&t 44), 3-7<br />
Source Pretune Correction<br />
Constants (Test 48), 3-10<br />
Source Pretune Defauit Correction<br />
Constants (Test 45), 3-8<br />
Source Spur Avoidance Tracking<br />
Adjustment, 3-58<br />
Test Port Input Noise Floor Level,<br />
2-37<br />
test port output frequency range<br />
and accuracy, 2-18<br />
test port output power accuracy,<br />
2-24<br />
Index-17
test port output power range and<br />
linearity, 2-27<br />
Unprotected Hardware Option<br />
Numbers Correction Constants,<br />
3-60<br />
verify an analyzer system<br />
(automated), 2-8<br />
pulse generator<br />
source, 12-15<br />
pulse generator (A7) check, 7-32<br />
pulses (100 kHz), 7-16<br />
PWR LOSS, 10-5<br />
PWRMTR<br />
NOT ON/CONNECTED OR WRONG<br />
ADDRS, lo-59<br />
B<br />
range and accuracy of frequency,<br />
2-18<br />
R channel level, 2-31<br />
rear panel<br />
assembly replacement, 1416<br />
digital control, 12-12<br />
part numbers, 13-24-26<br />
Rear Panel, 10-9<br />
rear panel interface<br />
assembly replacement, 14-20<br />
rear panel LEDs check, 410<br />
rebuilt-exchange assemblies, 13-3<br />
receiver<br />
digital IF, 12-30<br />
sampler/mixer, 12-29<br />
theory of operation, 12-3, 12-28<br />
receiver check, 416<br />
receiver error messages, 417<br />
receiver failure error messages, 8-3<br />
receiver troubleshooting chapter,<br />
8-l<br />
RECORD ON OFF, 10-5<br />
red LED on Al5<br />
power supply shutdown, 12-6<br />
Index-18<br />
REP (4 MHz) signal check, 8-7<br />
reference<br />
source, 12-14<br />
reference, A12, 10-40<br />
reference (A12) check, 7-13<br />
reference frequencies check using<br />
analog bus, 7-13<br />
reference frequencies check using<br />
oscilloscope, 7-15<br />
reference signal (4 MHz), 7-20<br />
reflection Tracking (ERF’ and ERR),<br />
11-13<br />
REP signal At AllTP9, 7-17<br />
removing<br />
A8, 5-14<br />
line fuse, 5-7<br />
repair procedure, 41<br />
REPEAT ON OFF, 10-5<br />
replaceable parts, 13-l<br />
abbreviations, 13-48<br />
battery, 13-8<br />
cables, bottom, 13-12<br />
cables, front, 13-14<br />
cables, rear, 13-16<br />
cables, source, 13-18<br />
cables, top, 13-10<br />
chassis, inside, 13-44<br />
chwis, outside, 13-42<br />
documentation, 13-46<br />
ESD supplies, 1347<br />
front panel, inside, 13-22<br />
front panel, outside, 13-20<br />
fuse, preregulator, 1340<br />
fuses, post regulator, 13-47<br />
fuses, rear panel, 13-24<br />
handles, 13-47<br />
hardware, bottom, 13-30<br />
hardware, disk drive support, 13-36<br />
hardware, front, 13-32<br />
hardware, memory deck, 13-38<br />
hardware, preregulator, 13-40
hardware, test set deck, 13-34<br />
hardware, top, 13-28<br />
major assemblies, bottom, 13-8<br />
major assemblies, top, 13-6<br />
misceihineous, 1346, 13-47<br />
option descriptions, 13-48<br />
ordering, 13-3<br />
rear panel, 13-24<br />
rear panel, Option lD5, 13-26<br />
rebuilt-exchange assemblies, 13-3<br />
reference designations, 13-48<br />
service tools, 13-46<br />
touch-up paint, 1347<br />
upgrade kits, 13-46<br />
required tools, l-l<br />
RESET MEMORY, lo-46<br />
return analyzer for repair, 42<br />
revision (firmware) softkey, lo-47<br />
RF cable set, l-4<br />
RF output power correction constants<br />
adjustment, 3-l 1<br />
RF power from source, 7-3<br />
RGB outputs, lo-15<br />
ROM, lo-7<br />
S<br />
Sampler Cor., 19-13<br />
SAMF’LER COR ON OFF, lo-21<br />
sampler correction off when checking<br />
the trace, 8-12<br />
sampler magnitude correction<br />
constants adjustment, 3-18<br />
sampler/mixer, 12-29<br />
2nd LO signal, 12-29<br />
high band, 12-29<br />
low band, 12-29<br />
mixer circuit, 12-30<br />
super low band, 12-29<br />
SAVE FAILED. INSUFFICIENT<br />
MEMORY, lo-59<br />
search for spurs with a filter, 3-30<br />
search for spurs without a filter, 3-31<br />
SEGMENT, 10-6<br />
selector switch check, 5-7<br />
self diagnose softkey, 10-7<br />
self-test, 4-3<br />
SELF TEST #n FAILED, lo-59<br />
sensor (power), l-3<br />
sequence check for power up, 4-11<br />
sequence contents, 3-64<br />
sequence contents for Fractional-<br />
N Avoidance and FM Sideband<br />
Acijustment, 3-66<br />
sequence contents for Fractional-N<br />
Frequency Range Adjustment,<br />
3-65<br />
sequence contents for High/Low Band<br />
Transition Adjustment, 3-64<br />
sequence contents for VCO<br />
adjustment, 3-65<br />
sequences<br />
Fractional-N Frequency Range<br />
Adjustment, 3-62<br />
Fractional-N Spur Avoidance and<br />
FM Sideband Adjustment, 3-62<br />
High/Low Band Transition<br />
Adjustment, 3-62<br />
Serial Cor., 10-13<br />
serial number correction constants<br />
a4@rstment, 3-34<br />
service and support options, l-9<br />
service center procedure, 42<br />
service features, 10-18<br />
service key menus, 10-l<br />
service features, 10-18<br />
service key mnemonics, 10-l<br />
service mnemonic definitions, 10-48<br />
SERVICE MODES, lo-18<br />
service modes more menu, 10-21<br />
service test equipment, l-l<br />
service tools list, l-l<br />
servicing the anaiyzer, 42<br />
Index-19
setup<br />
cavity oscillator frequency<br />
correction constant routine,<br />
3-29<br />
external source mode frequency<br />
range, 2-22<br />
fractional-N spur avoidance and<br />
F’M sideband adjustment, 3-55<br />
frequency accuracy adhrstment,<br />
3-49<br />
insertion loss measurement, 3-20<br />
intensity check, 6-9<br />
minimum R channel level, 2-32<br />
mismatch device verification, 2-16<br />
phase lock error troubleshooting,<br />
7-4<br />
RF output correction constants,<br />
3-14<br />
sampler correction routine, 3-22<br />
source power check, 414<br />
test port frequency range and<br />
accuracy test, 2-19<br />
test port input noise floor level,<br />
2-38<br />
test port output power accuracy,<br />
2-25<br />
test port output power range and<br />
linearity, 2-28<br />
transmis&on calibration, 2-13<br />
setup check for disk drive, 4-7<br />
setup check for plotter or printer,<br />
47<br />
short and open device verification,<br />
9-6<br />
shutdown circuit<br />
post regulator, 12-7<br />
shutdown circuit on A8, 12-7<br />
shutdown circuitry disable, 5-16<br />
signal examination for phase lock,<br />
7-36<br />
signal separation<br />
Index-20<br />
built-in test set, 12-26<br />
theory of operation, 12-26<br />
signals required for Al0 assembly<br />
operation, 8-8<br />
SLOPE DAC, lo-19<br />
softkeys, 10-2<br />
source<br />
All phase lock, 12-15<br />
Al2 reference, 12-14<br />
Al3 frac-N analog, 12-14<br />
Al4 frac-N digital, 12-14<br />
A3 source, 12-15<br />
A7 pulse generator, 12-15<br />
external source mode, 12-23<br />
frequency offset, 12-22<br />
harmonic analysis, 12-22<br />
high band theory, 12-19<br />
low band theory, 12-16<br />
operation in other modes, 12-22<br />
source, 12-15<br />
super low band theory, 12-15<br />
theory of operation, 12-2, 12-14<br />
tuned receiver mode, 12-25<br />
source and All phase lock check,<br />
7-8<br />
source attenuator<br />
theory of operation, 12-2<br />
source check, 413<br />
Source Cor., 10-13<br />
Source Def., 10-13<br />
source default correction constants<br />
adjustment, 3-7<br />
Source Ex., l@ll<br />
source (external), l-3<br />
source group assemblies, 7-l<br />
source group troubleshooting<br />
appendix, 7-38<br />
source match (ESP and ESR), 11-12<br />
source mode frequency range, 2-21<br />
SOURCE PLL ON OFT, lo-19<br />
source power, 7-3
SOURCE POWER TURNED OFF,<br />
RESET UNDER POWER MENU,<br />
lo-59<br />
source pretune correction constants<br />
adjustment, 3-10<br />
source prettme default correction<br />
constants adjustment, 3-8<br />
source spur avoidance tracking<br />
adjustment, 3-58<br />
source troubleshooting chapter, 7-l<br />
specifications<br />
external source mode frequency<br />
range, 2-21<br />
minimum R channel level, 2-31<br />
test port input noise floor level,<br />
2-37<br />
test port output frequency range<br />
and accuracy, 2-18<br />
test port output power accuracy,<br />
2-24<br />
test port output power range and<br />
linearity, 2-27<br />
spectrum analyzer, 1-3<br />
speed<br />
fan, 5-22<br />
spikes display (acceptable versus<br />
excessive), 3-59<br />
splitter (power), l-4<br />
spur avoidance and PM sideband<br />
adjustment, 3-54<br />
spur avoidance tracking adjustment,<br />
3-58<br />
SPUR AVOID ON OFF, lo-22<br />
spurs displayed with a filter, 3-30<br />
spur search with a filter, 3-30<br />
spur search without a filter, 3-31<br />
SPUR TEST ON OFF, lo-21<br />
SRAM RAM, lo-8<br />
SRC ADJUST DACS, lo-19<br />
SRC ADJUST MENU, lo-19<br />
SRC TUNE FREQ, lo-19<br />
SRC tune mode frequency output,<br />
7-8<br />
SRC tune mode phase locked output<br />
compared to open loop, 7-9<br />
SRC tune mode waveform integrity,<br />
7-9<br />
SRC TUNE ON OFF, lo-19<br />
stable HI OUT signal in PRACN TUNE<br />
mode, 7-34<br />
Start Troubleshooting chapter, 4-l<br />
static-control table mat and earth<br />
ground wire, l-4<br />
status terms for test, 19-4<br />
step attenuator, 1-3<br />
STORE EEPR ON OFF, lo-21<br />
stuck key identification, 6-14<br />
support and service options, 1-9<br />
SWEEP MODE CHANGED TO CW<br />
TIME SWEEP, lo-60<br />
Sweep Trig., 19-10<br />
switch position adjustment, 3-5<br />
symbol conventions, 19-48<br />
system performance uncorrected,<br />
11-9<br />
system verihcation<br />
description of, 2-l<br />
post-repair, 3-2, 14-62<br />
system verification (automated), 2-8<br />
system verification cycle, 2-7<br />
system verification tests, 193,19-12<br />
Sys Ver hut., 19-12<br />
SYS VER TESTS, lo-4<br />
T<br />
table of service tools, l-l<br />
temperature check, 5-13<br />
terms for test status, 19-4<br />
test 44, 3-7, 19-13<br />
test 45, 3-8, 19-13<br />
test 46, 3-9, lo-13<br />
test 47, 3-11, 19-13<br />
Index-21
test 48, 3-10, 10-13<br />
test 50, 10-13<br />
test 51, 3-16, 10-13<br />
test 52, 3-17, 10-13<br />
test 53, 3-18, 10-13<br />
test 54, 3-28, lo-13<br />
test 55, 3-34, 10-13<br />
test 56, 3-36, 10-14<br />
test 57, 10-14<br />
test 58, 3-37, 10-14<br />
test 59, 10-15<br />
test 60, 10-15<br />
test 61, 10-15<br />
test 62, 10-15<br />
test 63, 10-15<br />
test 64,10-15<br />
test 65, lo-15<br />
test 66, 10-16<br />
test 67-69, 10-16<br />
test 70, 10-16<br />
test 71, 10-16<br />
test 72, 10-16<br />
test 73, 10-16<br />
test 74, 10-16<br />
test 75, 10-17<br />
test 76, 10-17<br />
test 77, 10-17<br />
test 78, 10-17<br />
test 79-80, 1@17<br />
TEST ABORTED, lo-60<br />
test cables, 9-5<br />
test descriptions, 10-7<br />
test equipment for service, l-l<br />
TEST OPTIONS, 10-5<br />
test options menu, 10-5<br />
Test Pat l., lo-16<br />
Test Pat lo., lo-17<br />
Test Pat ll., lo-17<br />
Test Pat 12., lo-17<br />
Test Pat 13., lo-17<br />
n?st Pat 14-15., lo-17<br />
Index-22<br />
Test Pat 24., lo-16<br />
Test Pat 5., lo-16<br />
Test Pat 6., lo-16<br />
Test Pat 7., lo-16<br />
Test Pat 8., lo-16<br />
Test Pat 9, lo-16<br />
test patterns, 10-3<br />
test port connector inspection, 9-3<br />
test port couplers, 12-26<br />
test port input noise floor level, 2-37<br />
test port output frequency range and<br />
accuracy test, 2-18<br />
test port output power accuracy,<br />
2-24<br />
test port output power range and<br />
linearity, 2-27<br />
test record types, 2-6<br />
tests<br />
1. Test Port Output kequency<br />
Range and Accuracy, 2-18<br />
2. External Source Mode F’requency<br />
Range, 2-21<br />
adjustments, 10-13<br />
chapter, 2-l<br />
display, 10-15<br />
external, 10-11<br />
internal, 10-7<br />
minimum R channel level, 2-31<br />
patterns, 10-16<br />
system verifkation, 10-12<br />
Test Port Input Noise Floor Level,<br />
2-37<br />
l&t Port Output Power Accuracy,<br />
2-24<br />
Test Port Output Power Range and<br />
Linearity, 2-27<br />
tests (diagnostics), 6-17<br />
test set, 12-26<br />
LED front panel, 12-26<br />
test port couplers, 12-26<br />
test set interface, 12-26
theory of operation, 12-3<br />
transfer switch, 12-26<br />
test set interface, 12-26<br />
tests menu, 10-3<br />
test status terms, 104<br />
theory of operation, 12-1<br />
+5 V digital supply, 12-6<br />
Al5 green LED, 12-6<br />
Al5 preregulator, 12-5<br />
Al5 red LED, 12-6<br />
A3 source, 12-2, 12-14<br />
A8 green LEDs, 12-7<br />
A8 post regulator, 12-7<br />
A8 shutdown circuit, 12-7<br />
air flow detector, 12-7<br />
digitai control, 12-8<br />
display power, 12-8<br />
functional groups, 124<br />
line power module, 12-6<br />
microprocessor, 12-3<br />
peripheral equipment, 12-3<br />
power supply, 12-5<br />
power supply shutdown, 12-6<br />
preregulated voltages, 12-6<br />
probe power, 12-8<br />
receiver, 12-3, 12-28<br />
signal separation, 12-26<br />
source attenuator, 12-2<br />
test set, 12-3<br />
variable fan circuit, 12-7<br />
tool kit, l-3<br />
tools for service, l-l<br />
trace (good) display, 8-5<br />
trace with sampler correction on and<br />
off, 8-13<br />
tracking for source spur avoidance<br />
adjustment, 3-58<br />
transfer switch, 12-26<br />
transmission tracking (ETP and ETR),<br />
11-16<br />
TROUBLE! CHECK SETUP AND<br />
START OVER, lo-60<br />
troubleshooting<br />
1st LO signal at sampler/mixer,<br />
8-14<br />
A10 by substitution or signal<br />
examination, 8-8<br />
All phase lock, 7-35<br />
All phase lock and A3 source<br />
check, 7-8<br />
Al2 reference, 7-13<br />
A13/A14 Fractional-N, 7-24<br />
Al4 Divide-by-N Circuit Check,<br />
7-29<br />
Al5 preregulator, 5-9<br />
Al/A2 front panel, 6-13<br />
A7 pulse generator, 7-32<br />
accessories, 4-18, 9-l<br />
broadband power problems, 7-39<br />
diagnostics, 4-3<br />
digital control, 6-l<br />
disk drive, 47<br />
fan, 5-22<br />
faulty data, 417<br />
faulty group identification, 4-9<br />
tist step, 41<br />
front panel, 6-13<br />
<strong>HP</strong>-R3 systems, 46<br />
one or more inputs look good, 8-l 1<br />
phase lock error, 74<br />
plotters or printers, 47<br />
receiver, 8-l<br />
receiver error messages, 4-17<br />
self-test, 43<br />
source, 7-l<br />
start, 41<br />
systems with controllers, 4-8<br />
systems with multiple peripherals,<br />
48<br />
when all inputs look bad, 8-6<br />
Index-23
YO coil drive check with analog<br />
bus, 7-11<br />
troubleshooting power supply, 5-l<br />
troubleshooting source group<br />
appendix, 7-38<br />
two-port error-correction procedure,<br />
11-3<br />
U<br />
uncorrected performance, 1 l-9<br />
unprotected hardware option numbers<br />
correction constants, 3-60<br />
USE SENSOR A/B, 10-6<br />
V<br />
variable fan circuit, 12-7<br />
VCO (A14) exercise, 7-27<br />
VCO range check frequencies, 7-24<br />
Ver Dev l., 10-12<br />
Ver Dev 2., lCL12<br />
Ver Dev 3., 10-12<br />
Ver Dev 4., 10-12<br />
veriiication cycle, kit re-certification,<br />
2-7<br />
verification kit 7 mm, l-3<br />
verification procedures<br />
post-repair, 3-2, 14-62<br />
verify calibration kit devices, 9-4<br />
voltage indications<br />
Index-24<br />
post regulator, 12-7<br />
voltages<br />
Al5 preregulator check, 5-10<br />
AS, 5-14<br />
fan, 5-22<br />
front panel probe power, 5-19<br />
YO- and YO+ coil drive voltage<br />
differences with& SOURCE<br />
PLL OFT, 7-13<br />
voltages for post regulator, 5-5<br />
voltmeter, l-3<br />
VRAM bank., lo-15<br />
VRAIWvideo, 10-15<br />
W<br />
warranty explanation, 42<br />
waveform integrity in SRC tune mode,<br />
7-9<br />
wrist strap and cord (antistatic), 14<br />
WRONG DISK FORMAT, INITIALTZE<br />
DISK, lo-60<br />
Y<br />
YO coil drive check with analog bus,<br />
7-11<br />
YO- and YO+ coil drive voltage<br />
differences with& SOURCE PLL<br />
OFT, 7-13